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cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()
In cxl_dvsec_rr_decode() the pci driver expects to retrieve a cxlds, struct cxl_dev_state, from the driver_data field of struct device. While that works for Type 3, drivers for Type 1/2 devices may not put a cxlds in the driver_data field. In preparation for supporting Type 1/2 devices, replace parameter 'struct device' with 'struct cxl_dev_state' in cxl_dvsec_rr_decode(). Remove the unused parameter 'cxl_port' in cxl_dvsec_rr_decode(). Signed-off-by: Alejandro Lucero <alucerop@amd.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20241203162112.5088-1-alucerop@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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4 changed files with 9 additions and 8 deletions
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@ -291,11 +291,11 @@ static int devm_cxl_enable_hdm(struct device *host, struct cxl_hdm *cxlhdm)
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return devm_add_action_or_reset(host, disable_hdm, cxlhdm);
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}
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int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
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int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
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struct cxl_endpoint_dvsec_info *info)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
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struct pci_dev *pdev = to_pci_dev(cxlds->dev);
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struct device *dev = cxlds->dev;
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int hdm_count, rc, i, ranges = 0;
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int d = cxlds->cxl_dvsec;
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u16 cap, ctrl;
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@ -821,7 +821,8 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
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int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
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struct cxl_endpoint_dvsec_info *info);
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int devm_cxl_add_passthrough_decoder(struct cxl_port *port);
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int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
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struct cxl_dev_state;
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int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
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struct cxl_endpoint_dvsec_info *info);
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bool is_cxl_region(struct device *dev);
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@ -98,7 +98,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
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struct cxl_port *root;
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int rc;
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rc = cxl_dvsec_rr_decode(cxlds->dev, port, &info);
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rc = cxl_dvsec_rr_decode(cxlds, &info);
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if (rc < 0)
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return rc;
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@ -228,16 +228,16 @@ int __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds,
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}
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EXPORT_SYMBOL_NS_GPL(__wrap_cxl_hdm_decode_init, "CXL");
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int __wrap_cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
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int __wrap_cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
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struct cxl_endpoint_dvsec_info *info)
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{
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int rc = 0, index;
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struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
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if (ops && ops->is_mock_dev(dev))
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if (ops && ops->is_mock_dev(cxlds->dev))
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rc = 0;
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else
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rc = cxl_dvsec_rr_decode(dev, port, info);
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rc = cxl_dvsec_rr_decode(cxlds, info);
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put_cxl_mock_ops(index);
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return rc;
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