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drm/xe/bo: Update atomic_access attribute on madvise
Update the bo_atomic_access based on user-provided input and determine the migration to smem during a CPU fault v2 (Matthew Brost) - Avoid cpu unmapping if bo is already in smem - check atomics on smem too for ioctl - Add comments v3 - Avoid migration in prefetch v4 (Matthew Brost) - make sanity check function bool - add assert for smem placement - fix doc v5 (Matthew Brost) - NACK atomic fault with DRM_XE_ATOMIC_CPU Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250821173104.3030148-16-himal.prasad.ghimiray@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
This commit is contained in:
Himal Prasad Ghimiray
parent
072e299982
commit
293032eec4
4 changed files with 102 additions and 28 deletions
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@ -1712,6 +1712,18 @@ static void xe_gem_object_close(struct drm_gem_object *obj,
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}
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}
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static bool should_migrate_to_smem(struct xe_bo *bo)
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{
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/*
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* NOTE: The following atomic checks are platform-specific. For example,
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* if a device supports CXL atomics, these may not be necessary or
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* may behave differently.
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*/
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return bo->attr.atomic_access == DRM_XE_ATOMIC_GLOBAL ||
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bo->attr.atomic_access == DRM_XE_ATOMIC_CPU;
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}
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static vm_fault_t xe_gem_fault(struct vm_fault *vmf)
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{
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struct ttm_buffer_object *tbo = vmf->vma->vm_private_data;
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@ -1720,7 +1732,7 @@ static vm_fault_t xe_gem_fault(struct vm_fault *vmf)
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struct xe_bo *bo = ttm_to_xe_bo(tbo);
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bool needs_rpm = bo->flags & XE_BO_FLAG_VRAM_MASK;
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vm_fault_t ret;
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int idx;
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int idx, r = 0;
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if (needs_rpm)
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xe_pm_runtime_get(xe);
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@ -1732,8 +1744,19 @@ static vm_fault_t xe_gem_fault(struct vm_fault *vmf)
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if (drm_dev_enter(ddev, &idx)) {
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trace_xe_bo_cpu_fault(bo);
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ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
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TTM_BO_VM_NUM_PREFAULT);
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if (should_migrate_to_smem(bo)) {
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xe_assert(xe, bo->flags & XE_BO_FLAG_SYSTEM);
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r = xe_bo_migrate(bo, XE_PL_TT);
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if (r == -EBUSY || r == -ERESTARTSYS || r == -EINTR)
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ret = VM_FAULT_NOPAGE;
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else if (r)
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ret = VM_FAULT_SIGBUS;
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}
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if (!ret)
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ret = ttm_bo_vm_fault_reserved(vmf,
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vmf->vma->vm_page_prot,
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TTM_BO_VM_NUM_PREFAULT);
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drm_dev_exit(idx);
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if (ret == VM_FAULT_RETRY &&
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@ -75,7 +75,7 @@ static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma)
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}
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static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma,
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bool atomic, struct xe_vram_region *vram)
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bool need_vram_move, struct xe_vram_region *vram)
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{
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struct xe_bo *bo = xe_vma_bo(vma);
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struct xe_vm *vm = xe_vma_vm(vma);
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@ -85,26 +85,13 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma,
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if (err)
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return err;
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if (atomic && vram) {
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xe_assert(vm->xe, IS_DGFX(vm->xe));
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if (!bo)
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return 0;
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if (xe_vma_is_userptr(vma)) {
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err = -EACCES;
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return err;
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}
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err = need_vram_move ? xe_bo_migrate(bo, vram->placement) :
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xe_bo_validate(bo, vm, true);
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/* Migrate to VRAM, move should invalidate the VMA first */
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err = xe_bo_migrate(bo, vram->placement);
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if (err)
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return err;
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} else if (bo) {
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/* Create backing store if needed */
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err = xe_bo_validate(bo, vm, true);
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if (err)
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return err;
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}
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return 0;
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return err;
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}
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static int handle_vma_pagefault(struct xe_gt *gt, struct xe_vma *vma,
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@ -115,10 +102,14 @@ static int handle_vma_pagefault(struct xe_gt *gt, struct xe_vma *vma,
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struct drm_exec exec;
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struct dma_fence *fence;
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ktime_t end = 0;
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int err;
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int err, needs_vram;
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lockdep_assert_held_write(&vm->lock);
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needs_vram = xe_vma_need_vram_for_atomic(vm->xe, vma, atomic);
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if (needs_vram < 0 || (needs_vram && xe_vma_is_userptr(vma)))
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return needs_vram < 0 ? needs_vram : -EACCES;
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xe_gt_stats_incr(gt, XE_GT_STATS_ID_VMA_PAGEFAULT_COUNT, 1);
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xe_gt_stats_incr(gt, XE_GT_STATS_ID_VMA_PAGEFAULT_KB, xe_vma_size(vma) / 1024);
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@ -141,7 +132,7 @@ retry_userptr:
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/* Lock VM and BOs dma-resv */
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drm_exec_init(&exec, 0, 0);
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drm_exec_until_all_locked(&exec) {
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err = xe_pf_begin(&exec, vma, atomic, tile->mem.vram);
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err = xe_pf_begin(&exec, vma, needs_vram == 1, tile->mem.vram);
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drm_exec_retry_on_contention(&exec);
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if (xe_vm_validate_should_retry(&exec, err, &end))
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err = -EAGAIN;
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@ -576,7 +567,7 @@ static int handle_acc(struct xe_gt *gt, struct acc *acc)
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/* Lock VM and BOs dma-resv */
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drm_exec_init(&exec, 0, 0);
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drm_exec_until_all_locked(&exec) {
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ret = xe_pf_begin(&exec, vma, true, tile->mem.vram);
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ret = xe_pf_begin(&exec, vma, IS_DGFX(vm->xe), tile->mem.vram);
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drm_exec_retry_on_contention(&exec);
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if (ret)
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break;
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@ -4242,15 +4242,18 @@ void xe_vm_snapshot_free(struct xe_vm_snapshot *snap)
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*/
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int xe_vma_need_vram_for_atomic(struct xe_device *xe, struct xe_vma *vma, bool is_atomic)
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{
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u32 atomic_access = xe_vma_bo(vma) ? xe_vma_bo(vma)->attr.atomic_access :
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vma->attr.atomic_access;
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if (!IS_DGFX(xe) || !is_atomic)
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return 0;
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return false;
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/*
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* NOTE: The checks implemented here are platform-specific. For
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* instance, on a device supporting CXL atomics, these would ideally
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* work universally without additional handling.
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*/
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switch (vma->attr.atomic_access) {
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switch (atomic_access) {
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case DRM_XE_ATOMIC_DEVICE:
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return !xe->info.has_device_atomics_on_smem;
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@ -102,6 +102,7 @@ static void madvise_atomic(struct xe_device *xe, struct xe_vm *vm,
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struct xe_vma **vmas, int num_vmas,
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struct drm_xe_madvise *op)
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{
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struct xe_bo *bo;
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int i;
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xe_assert(vm->xe, op->type == DRM_XE_MEM_RANGE_ATTR_ATOMIC);
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@ -114,7 +115,19 @@ static void madvise_atomic(struct xe_device *xe, struct xe_vm *vm,
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continue;
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vmas[i]->attr.atomic_access = op->atomic.val;
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/*TODO: handle bo backed vmas */
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bo = xe_vma_bo(vmas[i]);
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if (!bo)
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continue;
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xe_bo_assert_held(bo);
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bo->attr.atomic_access = op->atomic.val;
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/* Invalidate cpu page table, so bo can migrate to smem in next access */
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if (xe_bo_is_vram(bo) &&
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(bo->attr.atomic_access == DRM_XE_ATOMIC_CPU ||
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bo->attr.atomic_access == DRM_XE_ATOMIC_GLOBAL))
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ttm_bo_unmap_virtual(&bo->ttm);
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}
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}
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@ -262,6 +275,41 @@ static bool madvise_args_are_sane(struct xe_device *xe, const struct drm_xe_madv
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return true;
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}
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static bool check_bo_args_are_sane(struct xe_vm *vm, struct xe_vma **vmas,
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int num_vmas, u32 atomic_val)
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{
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struct xe_device *xe = vm->xe;
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struct xe_bo *bo;
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int i;
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for (i = 0; i < num_vmas; i++) {
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bo = xe_vma_bo(vmas[i]);
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if (!bo)
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continue;
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/*
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* NOTE: The following atomic checks are platform-specific. For example,
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* if a device supports CXL atomics, these may not be necessary or
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* may behave differently.
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*/
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if (XE_IOCTL_DBG(xe, atomic_val == DRM_XE_ATOMIC_CPU &&
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!(bo->flags & XE_BO_FLAG_SYSTEM)))
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return false;
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if (XE_IOCTL_DBG(xe, atomic_val == DRM_XE_ATOMIC_DEVICE &&
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!(bo->flags & XE_BO_FLAG_VRAM0) &&
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!(bo->flags & XE_BO_FLAG_VRAM1) &&
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!(bo->flags & XE_BO_FLAG_SYSTEM &&
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xe->info.has_device_atomics_on_smem)))
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return false;
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if (XE_IOCTL_DBG(xe, atomic_val == DRM_XE_ATOMIC_GLOBAL &&
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(!(bo->flags & XE_BO_FLAG_SYSTEM) ||
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(!(bo->flags & XE_BO_FLAG_VRAM0) &&
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!(bo->flags & XE_BO_FLAG_VRAM1)))))
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return false;
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}
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return true;
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}
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/**
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* xe_vm_madvise_ioctl - Handle MADVise ioctl for a VM
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* @dev: DRM device pointer
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@ -313,6 +361,15 @@ int xe_vm_madvise_ioctl(struct drm_device *dev, void *data, struct drm_file *fil
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goto unlock_vm;
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if (madvise_range.has_bo_vmas) {
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if (args->type == DRM_XE_MEM_RANGE_ATTR_ATOMIC) {
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if (!check_bo_args_are_sane(vm, madvise_range.vmas,
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madvise_range.num_vmas,
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args->atomic.val)) {
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err = -EINVAL;
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goto unlock_vm;
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}
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}
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drm_exec_init(&exec, DRM_EXEC_IGNORE_DUPLICATES | DRM_EXEC_INTERRUPTIBLE_WAIT, 0);
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drm_exec_until_all_locked(&exec) {
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for (int i = 0; i < madvise_range.num_vmas; i++) {
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