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mfd: rk8xx: Add RK801 support
The RK801 is a Power Management IC (PMIC) for multimedia and handheld devices. It contains the following components: - 4 BUCK - 2 LDO - 1 SWITCH Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Link: https://patch.msgid.link/20260112124351.17707-3-chenjh@rock-chips.com Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Joseph Chen
Lee Jones
parent
a8a2add7b1
commit
156442eb6e
4 changed files with 234 additions and 4 deletions
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@ -1371,15 +1371,15 @@ config MFD_RK8XX
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select MFD_CORE
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config MFD_RK8XX_I2C
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tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip"
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tristate "Rockchip RK8xx Power Management Chips"
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depends on I2C && OF
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select MFD_CORE
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select REGMAP_I2C
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select REGMAP_IRQ
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select MFD_RK8XX
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help
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If you say yes here you get support for the RK805, RK808, RK809,
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RK816, RK817 and RK818 Power Management chips.
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If you say yes here you get support for the RK801, RK805, RK808,
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RK809, RK816, RK817 and RK818 Power Management chips.
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This driver provides common support for accessing the device
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through I2C interface. The device supports multiple sub-devices
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including interrupts, RTC, LDO & DCDC regulators, and onkey.
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@ -37,6 +37,11 @@ static const struct resource rk817_rtc_resources[] = {
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DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
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};
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static const struct resource rk801_key_resources[] = {
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DEFINE_RES_IRQ(RK801_IRQ_PWRON_FALL),
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DEFINE_RES_IRQ(RK801_IRQ_PWRON_RISE),
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};
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static const struct resource rk805_key_resources[] = {
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DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
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DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
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@ -57,6 +62,14 @@ static const struct resource rk817_charger_resources[] = {
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DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT),
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};
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static const struct mfd_cell rk801s[] = {
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{ .name = "rk808-regulator", },
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{ .name = "rk805-pwrkey",
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.num_resources = ARRAY_SIZE(rk801_key_resources),
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.resources = &rk801_key_resources[0],
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},
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};
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static const struct mfd_cell rk805s[] = {
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{ .name = "rk808-clkout", },
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{ .name = "rk808-regulator", },
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@ -139,6 +152,15 @@ static const struct mfd_cell rk818s[] = {
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},
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};
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static const struct rk808_reg_data rk801_pre_init_reg[] = {
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{ RK801_SLEEP_CFG_REG, RK801_SLEEP_FUN_MSK, RK801_NONE_FUN },
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{ RK801_SYS_CFG2_REG, RK801_RST_MSK, RK801_RST_RESTART_REG_RESETB },
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{ RK801_INT_CONFIG_REG, RK801_INT_POL_MSK, RK801_INT_ACT_L },
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{ RK801_POWER_FPWM_EN_REG, RK801_PLDO_HRDEC_EN, RK801_PLDO_HRDEC_EN },
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{ RK801_BUCK_DEBUG5_REG, MASK_ALL, 0x54 },
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{ RK801_CON_BACK1_REG, MASK_ALL, 0x18 },
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};
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static const struct rk808_reg_data rk805_pre_init_reg[] = {
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{RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
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RK805_BUCK1_2_ILMAX_4000MA},
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@ -284,6 +306,37 @@ static const struct rk808_reg_data rk818_pre_init_reg[] = {
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VB_LO_SEL_3500MV },
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};
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static const struct regmap_irq rk801_irqs[] = {
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[RK801_IRQ_PWRON_FALL] = {
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.mask = RK801_IRQ_PWRON_FALL_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_PWRON_RISE] = {
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.mask = RK801_IRQ_PWRON_RISE_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_PWRON] = {
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.mask = RK801_IRQ_PWRON_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_PWRON_LP] = {
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.mask = RK801_IRQ_PWRON_LP_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_HOTDIE] = {
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.mask = RK801_IRQ_HOTDIE_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_VDC_RISE] = {
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.mask = RK801_IRQ_VDC_RISE_MSK,
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.reg_offset = 0,
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},
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[RK801_IRQ_VDC_FALL] = {
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.mask = RK801_IRQ_VDC_FALL_MSK,
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.reg_offset = 0,
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},
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};
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static const struct regmap_irq rk805_irqs[] = {
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[RK805_IRQ_PWRON_RISE] = {
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.mask = RK805_IRQ_PWRON_RISE_MSK,
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@ -532,6 +585,17 @@ static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
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REGMAP_IRQ_REG_LINE(23, 8)
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};
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static const struct regmap_irq_chip rk801_irq_chip = {
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.name = "rk801",
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.irqs = rk801_irqs,
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.num_irqs = ARRAY_SIZE(rk801_irqs),
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.num_regs = 1,
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.status_base = RK801_INT_STS0_REG,
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.mask_base = RK801_INT_MASK0_REG,
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.ack_base = RK801_INT_STS0_REG,
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.init_ack_masked = true,
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};
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static const struct regmap_irq_chip rk805_irq_chip = {
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.name = "rk805",
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.irqs = rk805_irqs,
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@ -610,6 +674,10 @@ static int rk808_power_off(struct sys_off_data *data)
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unsigned int reg, bit;
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switch (rk808->variant) {
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case RK801_ID:
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reg = RK801_SYS_CFG2_REG;
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bit = DEV_OFF;
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break;
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case RK805_ID:
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reg = RK805_DEV_CTRL_REG;
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bit = DEV_OFF;
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@ -714,6 +782,13 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
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dev_set_drvdata(dev, rk808);
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switch (rk808->variant) {
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case RK801_ID:
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rk808->regmap_irq_chip = &rk801_irq_chip;
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pre_init_reg = rk801_pre_init_reg;
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nr_pre_init_regs = ARRAY_SIZE(rk801_pre_init_reg);
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cells = rk801s;
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nr_cells = ARRAY_SIZE(rk801s);
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break;
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case RK805_ID:
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rk808->regmap_irq_chip = &rk805_irq_chip;
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pre_init_reg = rk805_pre_init_reg;
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@ -831,6 +906,12 @@ int rk8xx_suspend(struct device *dev)
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int ret = 0;
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switch (rk808->variant) {
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case RK801_ID:
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ret = regmap_update_bits(rk808->regmap,
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RK801_SLEEP_CFG_REG,
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RK801_SLEEP_FUN_MSK,
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RK801_SLEEP_FUN);
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break;
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case RK805_ID:
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ret = regmap_update_bits(rk808->regmap,
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RK805_GPIO_IO_POL_REG,
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
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* Rockchip RK801/RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
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*
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
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* Copyright (C) 2016 PHYTEC Messtechnik GmbH
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@ -21,6 +21,23 @@ struct rk8xx_i2c_platform_data {
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int variant;
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};
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static bool rk801_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case RK801_SYS_STS_REG:
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case RK801_INT_STS0_REG:
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case RK801_SYS_CFG0_REG:
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case RK801_SYS_CFG1_REG:
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case RK801_SYS_CFG2_REG:
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case RK801_SYS_CFG3_REG:
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case RK801_SYS_CFG4_REG:
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case RK801_SLEEP_CFG_REG:
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return true;
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}
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return false;
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}
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static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -124,6 +141,14 @@ static const struct regmap_config rk818_regmap_config = {
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.volatile_reg = rk808_is_volatile_reg,
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};
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static const struct regmap_config rk801_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = RK801_SYS_CFG3_OTP_REG,
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.cache_type = REGCACHE_RBTREE,
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.volatile_reg = rk801_is_volatile_reg,
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};
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static const struct regmap_config rk805_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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@ -164,6 +189,11 @@ static const struct regmap_config rk817_regmap_config = {
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.volatile_reg = rk817_is_volatile_reg,
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};
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static const struct rk8xx_i2c_platform_data rk801_data = {
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.regmap_cfg = &rk801_regmap_config,
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.variant = RK801_ID,
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};
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static const struct rk8xx_i2c_platform_data rk805_data = {
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.regmap_cfg = &rk805_regmap_config,
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.variant = RK805_ID,
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@ -224,6 +254,7 @@ static void rk8xx_i2c_shutdown(struct i2c_client *client)
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static SIMPLE_DEV_PM_OPS(rk8xx_i2c_pm_ops, rk8xx_suspend, rk8xx_resume);
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static const struct of_device_id rk8xx_i2c_of_match[] = {
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{ .compatible = "rockchip,rk801", .data = &rk801_data },
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{ .compatible = "rockchip,rk805", .data = &rk805_data },
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{ .compatible = "rockchip,rk806", .data = &rk806_data },
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{ .compatible = "rockchip,rk808", .data = &rk808_data },
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@ -340,6 +340,123 @@ enum rk818_reg {
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#define RK818_USB_ILMIN_2000MA 0x7
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#define RK818_USB_CHG_SD_VSEL_MASK 0x70
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/* RK801 */
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enum rk801_reg {
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RK801_ID_DCDC1,
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RK801_ID_DCDC2,
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RK801_ID_DCDC4,
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RK801_ID_DCDC3,
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RK801_ID_LDO1,
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RK801_ID_LDO2,
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RK801_ID_SWITCH,
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RK801_ID_MAX,
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};
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#define RK801_SLP_REG_OFFSET 5
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#define RK801_NUM_REGULATORS 7
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#define RK801_HW_SYNC_US 32
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/* RK801 Register Definitions */
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#define RK801_ID_MSB 0x00
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#define RK801_ID_LSB 0x01
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#define RK801_OTP_VER_REG 0x02
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#define RK801_POWER_EN0_REG 0x03
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#define RK801_POWER_EN1_REG 0x04
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#define RK801_POWER_SLP_EN_REG 0x05
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#define RK801_POWER_FPWM_EN_REG 0x06
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#define RK801_SLP_LP_CONFIG_REG 0x07
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#define RK801_BUCK_CONFIG_REG 0x08
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#define RK801_BUCK1_ON_VSEL_REG 0x09
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#define RK801_BUCK2_ON_VSEL_REG 0x0a
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#define RK801_BUCK4_ON_VSEL_REG 0x0b
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#define RK801_LDO1_ON_VSEL_REG 0x0c
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#define RK801_LDO2_ON_VSEL_REG 0x0d
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#define RK801_BUCK1_SLP_VSEL_REG 0x0e
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#define RK801_BUCK2_SLP_VSEL_REG 0x0f
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#define RK801_BUCK4_SLP_VSEL_REG 0x10
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#define RK801_LDO1_SLP_VSEL_REG 0x11
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#define RK801_LDO2_SLP_VSEL_REG 0x12
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#define RK801_LDO_SW_IMAX_REG 0x13
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#define RK801_SYS_STS_REG 0x14
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#define RK801_SYS_CFG0_REG 0x15
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#define RK801_SYS_CFG1_REG 0x16
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#define RK801_SYS_CFG2_REG 0x17
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#define RK801_SYS_CFG3_REG 0x18
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#define RK801_SYS_CFG4_REG 0x19
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#define RK801_SLEEP_CFG_REG 0x1a
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#define RK801_ON_SOURCE_REG 0x1b
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#define RK801_OFF_SOURCE_REG 0x1c
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#define RK801_PWRON_KEY_REG 0x1d
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#define RK801_INT_STS0_REG 0x1e
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#define RK801_INT_MASK0_REG 0x1f
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#define RK801_INT_CONFIG_REG 0x20
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#define RK801_CON_BACK1_REG 0x21
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#define RK801_CON_BACK2_REG 0x22
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#define RK801_DATA_CON0_REG 0x23
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#define RK801_DATA_CON1_REG 0x24
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#define RK801_DATA_CON2_REG 0x25
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#define RK801_DATA_CON3_REG 0x26
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#define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27
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#define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28
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#define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29
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#define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a
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#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b
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#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c
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#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d
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#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e
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#define RK801_BUCK_DEBUG1_REG 0x2f
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#define RK801_BUCK_DEBUG2_REG 0x30
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#define RK801_BUCK_DEBUG3_REG 0x31
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#define RK801_BUCK_DEBUG4_REG 0x32
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#define RK801_BUCK_DEBUG5_REG 0x33
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#define RK801_BUCK_DEBUG7_REG 0x34
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#define RK801_OTP_EN_CON_REG 0x35
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#define RK801_TEST_CON_REG 0x36
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#define RK801_EFUSE_CONTROL_REG 0x37
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#define RK801_SYS_CFG3_OTP_REG 0x38
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/* RK801 IRQ Definitions */
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#define RK801_IRQ_PWRON_FALL 0
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#define RK801_IRQ_PWRON_RISE 1
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#define RK801_IRQ_PWRON 2
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#define RK801_IRQ_PWRON_LP 3
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#define RK801_IRQ_HOTDIE 4
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#define RK801_IRQ_VDC_RISE 5
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#define RK801_IRQ_VDC_FALL 6
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#define RK801_IRQ_PWRON_FALL_MSK BIT(0)
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#define RK801_IRQ_PWRON_RISE_MSK BIT(1)
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#define RK801_IRQ_PWRON_MSK BIT(2)
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#define RK801_IRQ_PWRON_LP_MSK BIT(3)
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#define RK801_IRQ_HOTDIE_MSK BIT(4)
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#define RK801_IRQ_VDC_RISE_MSK BIT(5)
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#define RK801_IRQ_VDC_FALL_MSK BIT(6)
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/* RK801_SLP_LP_CONFIG_REG */
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#define RK801_BUCK_SLP_LP_EN BIT(3)
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#define RK801_PLDO_SLP_LP_EN BIT(1)
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#define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN)
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/* RK801_SLEEP_CFG_REG */
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#define RK801_SLEEP_FUN_MSK 0x3
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#define RK801_NONE_FUN 0x0
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#define RK801_SLEEP_FUN 0x1
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#define RK801_SHUTDOWN_FUN 0x2
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#define RK801_RESET_FUN 0x3
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/* RK801_SYS_CFG2_REG */
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#define RK801_SLEEP_POL_MSK BIT(1)
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#define RK801_SLEEP_ACT_H BIT(1)
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#define RK801_SLEEP_ACT_L 0
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#define RK801_RST_MSK (0x3 << 4)
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#define RK801_RST_RESTART_PMU (0x0 << 4)
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#define RK801_RST_RESTART_REG (0x1 << 4)
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#define RK801_RST_RESTART_REG_RESETB (0x2 << 4)
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/* RK801_INT_CONFIG_REG */
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#define RK801_INT_POL_MSK BIT(1)
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#define RK801_INT_ACT_H BIT(1)
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#define RK801_INT_ACT_L 0
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#define RK801_FPWM_MODE 1
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#define RK801_AUTO_PWM_MODE 0
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#define RK801_PLDO_HRDEC_EN BIT(6)
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/* RK805 */
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enum rk805_reg {
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RK805_ID_DCDC1,
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@ -1332,6 +1449,7 @@ enum {
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};
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enum {
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RK801_ID = 0x8010,
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RK805_ID = 0x8050,
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RK806_ID = 0x8060,
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RK808_ID = 0x0000,
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