From 0879768df24027dad5810cb81a4c73d8ed070a25 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:20 -0400 Subject: [PATCH 001/120] clk: nxp: lpc32xx: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Note that the changes involving LPC32XX_DEFINE_PLL_OPS were done by hand. Signed-off-by: Brian Masney --- drivers/clk/nxp/clk-lpc32xx.c | 59 ++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 26 deletions(-) diff --git a/drivers/clk/nxp/clk-lpc32xx.c b/drivers/clk/nxp/clk-lpc32xx.c index e00f270bc6aa..09ac025e06d4 100644 --- a/drivers/clk/nxp/clk-lpc32xx.c +++ b/drivers/clk/nxp/clk-lpc32xx.c @@ -579,17 +579,17 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, return regmap_update_bits(clk_regmap, clk->reg, 0x1FFFF, val); } -static long clk_hclk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_hclk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw); - u64 m_i, o = rate, i = *parent_rate, d = (u64)rate << 6; + u64 m_i, o = req->rate, i = req->best_parent_rate, d = (u64)req->rate << 6; u64 m = 0, n = 0, p = 0; int p_i, n_i; - pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), *parent_rate, rate); + pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), req->best_parent_rate, req->rate); - if (rate > 266500000) + if (req->rate > 266500000) return -EINVAL; /* Have to check all 20 possibilities to find the minimal M */ @@ -614,9 +614,9 @@ static long clk_hclk_pll_round_rate(struct clk_hw *hw, unsigned long rate, } } - if (d == (u64)rate << 6) { + if (d == (u64)req->rate << 6) { pr_err("%s: %lu: no valid PLL parameters are found\n", - clk_hw_get_name(hw), rate); + clk_hw_get_name(hw), req->rate); return -EINVAL; } @@ -634,22 +634,25 @@ static long clk_hclk_pll_round_rate(struct clk_hw *hw, unsigned long rate, if (!d) pr_debug("%s: %lu: found exact match: %llu/%llu/%llu\n", - clk_hw_get_name(hw), rate, m, n, p); + clk_hw_get_name(hw), req->rate, m, n, p); else pr_debug("%s: %lu: found closest: %llu/%llu/%llu - %llu\n", - clk_hw_get_name(hw), rate, m, n, p, o); + clk_hw_get_name(hw), req->rate, m, n, p, o); - return o; + req->rate = o; + + return 0; } -static long clk_usb_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_usb_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw); struct clk_hw *usb_div_hw, *osc_hw; u64 d_i, n_i, m, o; - pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), *parent_rate, rate); + pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), req->best_parent_rate, + req->rate); /* * The only supported USB clock is 48MHz, with PLL internal constraints @@ -657,7 +660,7 @@ static long clk_usb_pll_round_rate(struct clk_hw *hw, unsigned long rate, * and post-divider must be 4, this slightly simplifies calculation of * USB divider, USB PLL N and M parameters. */ - if (rate != 48000000) + if (req->rate != 48000000) return -EINVAL; /* USB divider clock */ @@ -685,30 +688,30 @@ static long clk_usb_pll_round_rate(struct clk_hw *hw, unsigned long rate, clk->m_div = m; clk->p_div = 2; clk->mode = PLL_NON_INTEGER; - *parent_rate = div64_u64(o, d_i); + req->best_parent_rate = div64_u64(o, d_i); - return rate; + return 0; } } return -EINVAL; } -#define LPC32XX_DEFINE_PLL_OPS(_name, _rc, _sr, _rr) \ +#define LPC32XX_DEFINE_PLL_OPS(_name, _rc, _sr, _dr) \ static const struct clk_ops clk_ ##_name ## _ops = { \ .enable = clk_pll_enable, \ .disable = clk_pll_disable, \ .is_enabled = clk_pll_is_enabled, \ .recalc_rate = _rc, \ .set_rate = _sr, \ - .round_rate = _rr, \ + .determine_rate = _dr, \ } LPC32XX_DEFINE_PLL_OPS(pll_397x, clk_pll_397x_recalc_rate, NULL, NULL); LPC32XX_DEFINE_PLL_OPS(hclk_pll, clk_pll_recalc_rate, - clk_pll_set_rate, clk_hclk_pll_round_rate); + clk_pll_set_rate, clk_hclk_pll_determine_rate); LPC32XX_DEFINE_PLL_OPS(usb_pll, clk_pll_recalc_rate, - clk_pll_set_rate, clk_usb_pll_round_rate); + clk_pll_set_rate, clk_usb_pll_determine_rate); static int clk_ddram_is_enabled(struct clk_hw *hw) { @@ -955,8 +958,8 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, divider->flags, divider->width); } -static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); unsigned int bestdiv; @@ -968,11 +971,15 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, bestdiv &= div_mask(divider->width); bestdiv = _get_div(divider->table, bestdiv, divider->flags, divider->width); - return DIV_ROUND_UP(*prate, bestdiv); + req->rate = DIV_ROUND_UP(req->best_parent_rate, bestdiv); + + return 0; } - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + divider->table, divider->width, divider->flags); + + return 0; } static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -991,7 +998,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops lpc32xx_clk_divider_ops = { .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, + .determine_rate = clk_divider_determine_rate, .set_rate = clk_divider_set_rate, }; From e20c5abec9e3f37f52d97fd962007e0346850f65 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:22 -0400 Subject: [PATCH 002/120] clk: rockchip: half-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/rockchip/clk-half-divider.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/rockchip/clk-half-divider.c b/drivers/clk/rockchip/clk-half-divider.c index 64f7faad2148..fbc018e8afa4 100644 --- a/drivers/clk/rockchip/clk-half-divider.c +++ b/drivers/clk/rockchip/clk-half-divider.c @@ -92,17 +92,19 @@ static int clk_half_divider_bestdiv(struct clk_hw *hw, unsigned long rate, return bestdiv; } -static long clk_half_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_half_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_divider *divider = to_clk_divider(hw); int div; - div = clk_half_divider_bestdiv(hw, rate, prate, + div = clk_half_divider_bestdiv(hw, req->rate, &req->best_parent_rate, divider->width, divider->flags); - return DIV_ROUND_UP_ULL(((u64)*prate * 2), div * 2 + 3); + req->rate = DIV_ROUND_UP_ULL(((u64)req->best_parent_rate * 2), div * 2 + 3); + + return 0; } static int clk_half_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -141,7 +143,7 @@ static int clk_half_divider_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops clk_half_divider_ops = { .recalc_rate = clk_half_divider_recalc_rate, - .round_rate = clk_half_divider_round_rate, + .determine_rate = clk_half_divider_determine_rate, .set_rate = clk_half_divider_set_rate, }; From 9a3b6993613d3fac3b29e44688b865972ff732fd Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:24 -0400 Subject: [PATCH 003/120] clk: sophgo: sg2042-clkgen: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Chen Wang Tested-by: Chen Wang # Pioneerbox Signed-off-by: Brian Masney --- drivers/clk/sophgo/clk-sg2042-clkgen.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sophgo/clk-sg2042-clkgen.c b/drivers/clk/sophgo/clk-sg2042-clkgen.c index 9e61288d34f3..683661b71787 100644 --- a/drivers/clk/sophgo/clk-sg2042-clkgen.c +++ b/drivers/clk/sophgo/clk-sg2042-clkgen.c @@ -176,9 +176,8 @@ static unsigned long sg2042_clk_divider_recalc_rate(struct clk_hw *hw, return ret_rate; } -static long sg2042_clk_divider_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *prate) +static int sg2042_clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sg2042_divider_clock *divider = to_sg2042_clk_divider(hw); unsigned long ret_rate; @@ -192,15 +191,17 @@ static long sg2042_clk_divider_round_rate(struct clk_hw *hw, bestdiv = readl(divider->reg) >> divider->shift; bestdiv &= clk_div_mask(divider->width); } - ret_rate = DIV_ROUND_UP_ULL((u64)*prate, bestdiv); + ret_rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, bestdiv); } else { - ret_rate = divider_round_rate(hw, rate, prate, NULL, + ret_rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, NULL, divider->width, divider->div_flags); } pr_debug("--> %s: divider_round_rate: val = %ld\n", clk_hw_get_name(hw), ret_rate); - return ret_rate; + req->rate = ret_rate; + + return 0; } static int sg2042_clk_divider_set_rate(struct clk_hw *hw, @@ -258,13 +259,13 @@ static int sg2042_clk_divider_set_rate(struct clk_hw *hw, static const struct clk_ops sg2042_clk_divider_ops = { .recalc_rate = sg2042_clk_divider_recalc_rate, - .round_rate = sg2042_clk_divider_round_rate, + .determine_rate = sg2042_clk_divider_determine_rate, .set_rate = sg2042_clk_divider_set_rate, }; static const struct clk_ops sg2042_clk_divider_ro_ops = { .recalc_rate = sg2042_clk_divider_recalc_rate, - .round_rate = sg2042_clk_divider_round_rate, + .determine_rate = sg2042_clk_divider_determine_rate, }; /* From d4c515a21b238844cfc3108405bbb0f210cf6d3b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:25 -0400 Subject: [PATCH 004/120] clk: sophgo: sg2042-pll: remove round_rate() in favor of determine_rate() This driver implements both the determine_rate() and round_rate() clk ops, and the round_rate() clk ops is deprecated. When both are defined, clk_core_determine_round_nolock() from the clk core will only use the determine_rate() clk ops, so let's remove the round_rate() clk ops since it's unused. The implementation of sg2042_clk_pll_determine_rate() calls sg2042_clk_pll_round_rate(), so this folds the two into a single function. Reviewed-by: Chen Wang Tested-by: Chen Wang # Pioneerbox Signed-off-by: Brian Masney --- drivers/clk/sophgo/clk-sg2042-pll.c | 28 ++++++++++------------------ 1 file changed, 10 insertions(+), 18 deletions(-) diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c index e5fb0bb7ac4f..110b6ee06fe4 100644 --- a/drivers/clk/sophgo/clk-sg2042-pll.c +++ b/drivers/clk/sophgo/clk-sg2042-pll.c @@ -346,37 +346,30 @@ static unsigned long sg2042_clk_pll_recalc_rate(struct clk_hw *hw, return rate; } -static long sg2042_clk_pll_round_rate(struct clk_hw *hw, - unsigned long req_rate, - unsigned long *prate) +static int sg2042_clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sg2042_pll_ctrl pctrl_table; unsigned int value; long proper_rate; int ret; - ret = sg2042_get_pll_ctl_setting(&pctrl_table, req_rate, *prate); + ret = sg2042_get_pll_ctl_setting(&pctrl_table, + min(req->rate, req->max_rate), + req->best_parent_rate); if (ret) { proper_rate = 0; goto out; } value = sg2042_pll_ctrl_encode(&pctrl_table); - proper_rate = (long)sg2042_pll_recalc_rate(value, *prate); + proper_rate = (long)sg2042_pll_recalc_rate(value, req->best_parent_rate); out: - pr_debug("--> %s: pll_round_rate: val = %ld\n", - clk_hw_get_name(hw), proper_rate); - return proper_rate; -} - -static int sg2042_clk_pll_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - req->rate = sg2042_clk_pll_round_rate(hw, min(req->rate, req->max_rate), - &req->best_parent_rate); pr_debug("--> %s: pll_determine_rate: val = %ld\n", - clk_hw_get_name(hw), req->rate); + clk_hw_get_name(hw), proper_rate); + req->rate = proper_rate; + return 0; } @@ -417,14 +410,13 @@ out: static const struct clk_ops sg2042_clk_pll_ops = { .recalc_rate = sg2042_clk_pll_recalc_rate, - .round_rate = sg2042_clk_pll_round_rate, .determine_rate = sg2042_clk_pll_determine_rate, .set_rate = sg2042_clk_pll_set_rate, }; static const struct clk_ops sg2042_clk_pll_ro_ops = { .recalc_rate = sg2042_clk_pll_recalc_rate, - .round_rate = sg2042_clk_pll_round_rate, + .determine_rate = sg2042_clk_pll_determine_rate, }; /* From f7a6bed91a19304465f318fd05b2e04670584580 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:26 -0400 Subject: [PATCH 005/120] clk: x86: cgu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/x86/clk-cgu.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/drivers/clk/x86/clk-cgu.c b/drivers/clk/x86/clk-cgu.c index 89b53f280aee..d099667355f8 100644 --- a/drivers/clk/x86/clk-cgu.c +++ b/drivers/clk/x86/clk-cgu.c @@ -132,14 +132,15 @@ lgm_clk_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) divider->flags, divider->width); } -static long -lgm_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lgm_clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lgm_clk_divider *divider = to_lgm_clk_divider(hw); - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, divider->table, + divider->width, divider->flags); + + return 0; } static int @@ -182,7 +183,7 @@ static void lgm_clk_divider_disable(struct clk_hw *hw) static const struct clk_ops lgm_clk_divider_ops = { .recalc_rate = lgm_clk_divider_recalc_rate, - .round_rate = lgm_clk_divider_round_rate, + .determine_rate = lgm_clk_divider_determine_rate, .set_rate = lgm_clk_divider_set_rate, .enable = lgm_clk_divider_enable, .disable = lgm_clk_divider_disable, @@ -487,15 +488,14 @@ lgm_clk_ddiv_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } -static long -lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lgm_clk_ddiv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lgm_clk_ddiv *ddiv = to_lgm_clk_ddiv(hw); u32 div, ddiv1, ddiv2; u64 rate64; - div = DIV_ROUND_CLOSEST_ULL((u64)*prate, rate); + div = DIV_ROUND_CLOSEST_ULL((u64)req->best_parent_rate, req->rate); /* if predivide bit is enabled, modify div by factor of 2.5 */ if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { @@ -503,14 +503,17 @@ lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate, div = DIV_ROUND_CLOSEST_ULL((u64)div, 5); } - if (div <= 0) - return *prate; + if (div <= 0) { + req->rate = req->best_parent_rate; + + return 0; + } if (lgm_clk_get_ddiv_val(div, &ddiv1, &ddiv2) != 0) if (lgm_clk_get_ddiv_val(div + 1, &ddiv1, &ddiv2) != 0) return -EINVAL; - rate64 = *prate; + rate64 = req->best_parent_rate; do_div(rate64, ddiv1); do_div(rate64, ddiv2); @@ -520,7 +523,9 @@ lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate, rate64 = DIV_ROUND_CLOSEST_ULL(rate64, 5); } - return rate64; + req->rate = rate64; + + return 0; } static const struct clk_ops lgm_clk_ddiv_ops = { @@ -528,7 +533,7 @@ static const struct clk_ops lgm_clk_ddiv_ops = { .enable = lgm_clk_ddiv_enable, .disable = lgm_clk_ddiv_disable, .set_rate = lgm_clk_ddiv_set_rate, - .round_rate = lgm_clk_ddiv_round_rate, + .determine_rate = lgm_clk_ddiv_determine_rate, }; int lgm_clk_register_ddiv(struct lgm_clk_provider *ctx, From 0f9cf96a01fd8cb690292a5c24fbfda5c6dd47b2 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 28 Aug 2025 20:38:27 -0400 Subject: [PATCH 006/120] clk: zynqmp: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/zynqmp/divider.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 5a00487ae408..c824eeacd8eb 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -118,9 +118,8 @@ static unsigned long zynqmp_clk_divider_recalc_rate(struct clk_hw *hw, * * Return: 0 on success else error+reason */ -static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *prate) +static int zynqmp_clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct zynqmp_clk_divider *divider = to_zynqmp_clk_divider(hw); const char *clk_name = clk_hw_get_name(hw); @@ -145,17 +144,21 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) bestdiv = 1 << bestdiv; - return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); + req->rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, bestdiv); + + return 0; } width = fls(divider->max_div); - rate = divider_round_rate(hw, rate, prate, NULL, width, divider->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + NULL, width, divider->flags); - if (divider->is_frac && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && (rate % *prate)) - *prate = rate; + if (divider->is_frac && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && + (req->rate % req->best_parent_rate)) + req->best_parent_rate = req->rate; - return rate; + return 0; } /** @@ -199,13 +202,13 @@ static int zynqmp_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops zynqmp_clk_divider_ops = { .recalc_rate = zynqmp_clk_divider_recalc_rate, - .round_rate = zynqmp_clk_divider_round_rate, + .determine_rate = zynqmp_clk_divider_determine_rate, .set_rate = zynqmp_clk_divider_set_rate, }; static const struct clk_ops zynqmp_clk_divider_ro_ops = { .recalc_rate = zynqmp_clk_divider_recalc_rate, - .round_rate = zynqmp_clk_divider_round_rate, + .determine_rate = zynqmp_clk_divider_determine_rate, }; /** From 47b13635dabc14f1c2fdcaa5468b47ddadbdd1b5 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:53 -0400 Subject: [PATCH 007/120] clk: at91: peripheral: fix return value determine_rate() is expected to return an error code, or 0 on success. clk_sam9x5_peripheral_determine_rate() has a branch that returns the parent rate on a certain case. This is the behavior of round_rate(), so let's go ahead and fix this by setting req->rate. Fixes: b4c115c76184f ("clk: at91: clk-peripheral: add support for changeable parent rate") Reviewed-by: Alexander Sverdlin Acked-by: Nicolas Ferre Signed-off-by: Brian Masney --- drivers/clk/at91/clk-peripheral.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index c173a44c800a..629f050a855a 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -279,8 +279,11 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw, long best_diff = LONG_MIN; u32 shift; - if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) - return parent_rate; + if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) { + req->rate = parent_rate; + + return 0; + } /* Fist step: check the available dividers. */ for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { From 9236145ffba286e819a37ce84c3b084127dfa208 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:54 -0400 Subject: [PATCH 008/120] clk: at91: peripheral: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. This driver already has a clk_sam9x5_peripheral_determine_rate() implementation, however it can change the parent rate. The existing round rate does not have this functionality. I could add a check for CLK_SET_RATE_PARENT, and combine the two functions, however there are some other minor differences in the two implementations. I don't have access to this particular hardware. I believe that they could be combined, however it would need to be tested on real hardware. So, let's play it safe and convert the existing round rate implementation to ensure that the driver keeps the same functionality as before. Reviewed-by: Alexander Sverdlin Signed-off-by: Brian Masney --- drivers/clk/at91/clk-peripheral.c | 41 ++++++++++++++++++------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index 629f050a855a..e700f40fd87f 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -335,50 +335,57 @@ end: return 0; } -static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *parent_rate) +static int clk_sam9x5_peripheral_no_parent_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int shift = 0; unsigned long best_rate; unsigned long best_diff; - unsigned long cur_rate = *parent_rate; + unsigned long cur_rate = req->best_parent_rate; unsigned long cur_diff; struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw); - if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) - return *parent_rate; + if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) { + req->rate = req->best_parent_rate; + + return 0; + } if (periph->range.max) { for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { - cur_rate = *parent_rate >> shift; + cur_rate = req->best_parent_rate >> shift; if (cur_rate <= periph->range.max) break; } } - if (rate >= cur_rate) - return cur_rate; + if (req->rate >= cur_rate) { + req->rate = cur_rate; - best_diff = cur_rate - rate; + return 0; + } + + best_diff = cur_rate - req->rate; best_rate = cur_rate; for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { - cur_rate = *parent_rate >> shift; - if (cur_rate < rate) - cur_diff = rate - cur_rate; + cur_rate = req->best_parent_rate >> shift; + if (cur_rate < req->rate) + cur_diff = req->rate - cur_rate; else - cur_diff = cur_rate - rate; + cur_diff = cur_rate - req->rate; if (cur_diff < best_diff) { best_diff = cur_diff; best_rate = cur_rate; } - if (!best_diff || cur_rate < rate) + if (!best_diff || cur_rate < req->rate) break; } - return best_rate; + req->rate = best_rate; + + return 0; } static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw, @@ -430,7 +437,7 @@ static const struct clk_ops sam9x5_peripheral_ops = { .disable = clk_sam9x5_peripheral_disable, .is_enabled = clk_sam9x5_peripheral_is_enabled, .recalc_rate = clk_sam9x5_peripheral_recalc_rate, - .round_rate = clk_sam9x5_peripheral_round_rate, + .determine_rate = clk_sam9x5_peripheral_no_parent_determine_rate, .set_rate = clk_sam9x5_peripheral_set_rate, .save_context = clk_sam9x5_peripheral_save_context, .restore_context = clk_sam9x5_peripheral_restore_context, From 582de809b052892e1338508374f562e823b29566 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:55 -0400 Subject: [PATCH 009/120] clk: fixed-factor: add determine_rate() ops The round_rate() clk ops is deprecated, and determine_rate() should be used instead. We can't just simply convert this driver over initially since other drivers depend on this. So let's go ahead and add a determine_rate() clk ops. Once all of the drivers have been converted, then the round_rate() clk ops can be dropped. Signed-off-by: Brian Masney --- drivers/clk/clk-fixed-factor.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index e62ae8794d44..79b9a8c57d4b 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -30,6 +30,23 @@ static unsigned long clk_factor_recalc_rate(struct clk_hw *hw, return (unsigned long)rate; } +static int clk_factor_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); + + if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { + unsigned long best_parent; + + best_parent = (req->rate / fix->mult) * fix->div; + req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); + } + + req->rate = (req->best_parent_rate / fix->div) * fix->mult; + + return 0; +} + static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { @@ -50,7 +67,7 @@ static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate, { /* * We must report success but we can do so unconditionally because - * clk_factor_round_rate returns values that ensure this call is a + * clk_factor_determine_rate returns values that ensure this call is a * nop. */ @@ -69,6 +86,7 @@ static unsigned long clk_factor_recalc_accuracy(struct clk_hw *hw, } const struct clk_ops clk_fixed_factor_ops = { + .determine_rate = clk_factor_determine_rate, .round_rate = clk_factor_round_rate, .set_rate = clk_factor_set_rate, .recalc_rate = clk_factor_recalc_rate, From ae139c6addbe71ce2459a377c7695494311ef62d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:56 -0400 Subject: [PATCH 010/120] clk: at91: audio-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-audio-pll.c | 42 +++++++++++++++++--------------- 1 file changed, 23 insertions(+), 19 deletions(-) diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c index a92da64c12e1..bf9b635ac9d6 100644 --- a/drivers/clk/at91/clk-audio-pll.c +++ b/drivers/clk/at91/clk-audio-pll.c @@ -270,8 +270,8 @@ static int clk_audio_pll_frac_determine_rate(struct clk_hw *hw, return 0; } -static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_audio_pll_pad_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_hw *pclk = clk_hw_get_parent(hw); long best_rate = -EINVAL; @@ -283,7 +283,7 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, int best_diff = -1; pr_debug("A PLL/PAD: %s, rate = %lu (parent_rate = %lu)\n", __func__, - rate, *parent_rate); + req->rate, req->best_parent_rate); /* * Rate divisor is actually made of two different divisors, multiplied @@ -304,12 +304,12 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, continue; best_parent_rate = clk_hw_round_rate(pclk, - rate * tmp_qd * div); + req->rate * tmp_qd * div); tmp_rate = best_parent_rate / (div * tmp_qd); - tmp_diff = abs(rate - tmp_rate); + tmp_diff = abs(req->rate - tmp_rate); if (best_diff < 0 || best_diff > tmp_diff) { - *parent_rate = best_parent_rate; + req->best_parent_rate = best_parent_rate; best_rate = tmp_rate; best_diff = tmp_diff; } @@ -318,11 +318,13 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, pr_debug("A PLL/PAD: %s, best_rate = %ld, best_parent_rate = %lu\n", __func__, best_rate, best_parent_rate); - return best_rate; + req->rate = best_rate; + + return 0; } -static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_audio_pll_pmc_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_hw *pclk = clk_hw_get_parent(hw); long best_rate = -EINVAL; @@ -333,20 +335,20 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, int best_diff = -1; pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__, - rate, *parent_rate); + req->rate, req->best_parent_rate); - if (!rate) + if (!req->rate) return 0; best_parent_rate = clk_round_rate(pclk->clk, 1); - div = max(best_parent_rate / rate, 1UL); + div = max(best_parent_rate / req->rate, 1UL); for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { - best_parent_rate = clk_round_rate(pclk->clk, rate * div); + best_parent_rate = clk_round_rate(pclk->clk, req->rate * div); tmp_rate = best_parent_rate / div; - tmp_diff = abs(rate - tmp_rate); + tmp_diff = abs(req->rate - tmp_rate); if (best_diff < 0 || best_diff > tmp_diff) { - *parent_rate = best_parent_rate; + req->best_parent_rate = best_parent_rate; best_rate = tmp_rate; best_diff = tmp_diff; tmp_qd = div; @@ -356,9 +358,11 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, } pr_debug("A PLL/PMC: %s, best_rate = %ld, best_parent_rate = %lu (qd = %d)\n", - __func__, best_rate, *parent_rate, tmp_qd - 1); + __func__, best_rate, req->best_parent_rate, tmp_qd - 1); - return best_rate; + req->rate = best_rate; + + return 0; } static int clk_audio_pll_frac_set_rate(struct clk_hw *hw, unsigned long rate, @@ -436,7 +440,7 @@ static const struct clk_ops audio_pll_pad_ops = { .enable = clk_audio_pll_pad_enable, .disable = clk_audio_pll_pad_disable, .recalc_rate = clk_audio_pll_pad_recalc_rate, - .round_rate = clk_audio_pll_pad_round_rate, + .determine_rate = clk_audio_pll_pad_determine_rate, .set_rate = clk_audio_pll_pad_set_rate, }; @@ -444,7 +448,7 @@ static const struct clk_ops audio_pll_pmc_ops = { .enable = clk_audio_pll_pmc_enable, .disable = clk_audio_pll_pmc_disable, .recalc_rate = clk_audio_pll_pmc_recalc_rate, - .round_rate = clk_audio_pll_pmc_round_rate, + .determine_rate = clk_audio_pll_pmc_determine_rate, .set_rate = clk_audio_pll_pmc_set_rate, }; From 1ddde15e99a2033c8e21a9ab34a72f166c4bd385 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:57 -0400 Subject: [PATCH 011/120] clk: at91: h32mx: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-h32mx.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c index 1e6c12eeda10..a9aa93b5a870 100644 --- a/drivers/clk/at91/clk-h32mx.c +++ b/drivers/clk/at91/clk-h32mx.c @@ -40,21 +40,32 @@ static unsigned long clk_sama5d4_h32mx_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_sama5d4_h32mx_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long div; - if (rate > *parent_rate) - return *parent_rate; - div = *parent_rate / 2; - if (rate < div) - return div; + if (req->rate > req->best_parent_rate) { + req->rate = req->best_parent_rate; - if (rate - div < *parent_rate - rate) - return div; + return 0; + } + div = req->best_parent_rate / 2; + if (req->rate < div) { + req->rate = div; - return *parent_rate; + return 0; + } + + if (req->rate - div < req->best_parent_rate - req->rate) { + req->rate = div; + + return 0; + } + + req->rate = req->best_parent_rate; + + return 0; } static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate, @@ -77,7 +88,7 @@ static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops h32mx_ops = { .recalc_rate = clk_sama5d4_h32mx_recalc_rate, - .round_rate = clk_sama5d4_h32mx_round_rate, + .determine_rate = clk_sama5d4_h32mx_determine_rate, .set_rate = clk_sama5d4_h32mx_set_rate, }; From a635d6b4c7a89b49085016239a483f3cb26de330 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:58 -0400 Subject: [PATCH 012/120] clk: at91: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-pll.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 249d6a53cedf..5c5f7398effe 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -231,13 +231,15 @@ static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, return bestrate; } -static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_pll *pll = to_clk_pll(hw); - return clk_pll_get_best_div_mul(pll, rate, *parent_rate, - NULL, NULL, NULL); + req->rate = clk_pll_get_best_div_mul(pll, req->rate, req->best_parent_rate, + NULL, NULL, NULL); + + return 0; } static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -302,7 +304,7 @@ static const struct clk_ops pll_ops = { .unprepare = clk_pll_unprepare, .is_prepared = clk_pll_is_prepared, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_round_rate, + .determine_rate = clk_pll_determine_rate, .set_rate = clk_pll_set_rate, .save_context = clk_pll_save_context, .restore_context = clk_pll_restore_context, From 3c117b696a8a9733fe9b8affc5a13536c60ff730 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:17:59 -0400 Subject: [PATCH 013/120] clk: at91: plldiv: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-plldiv.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c index ba3a1839a96d..3ac09fecc54e 100644 --- a/drivers/clk/at91/clk-plldiv.c +++ b/drivers/clk/at91/clk-plldiv.c @@ -33,21 +33,33 @@ static unsigned long clk_plldiv_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_plldiv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long div; - if (rate > *parent_rate) - return *parent_rate; - div = *parent_rate / 2; - if (rate < div) - return div; + if (req->rate > req->best_parent_rate) { + req->rate = req->best_parent_rate; - if (rate - div < *parent_rate - rate) - return div; + return 0; + } - return *parent_rate; + div = req->best_parent_rate / 2; + if (req->rate < div) { + req->rate = div; + + return 0; + } + + if (req->rate - div < req->best_parent_rate - req->rate) { + req->rate = div; + + return 0; + } + + req->rate = req->best_parent_rate; + + return 0; } static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate, @@ -66,7 +78,7 @@ static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops plldiv_ops = { .recalc_rate = clk_plldiv_recalc_rate, - .round_rate = clk_plldiv_round_rate, + .determine_rate = clk_plldiv_determine_rate, .set_rate = clk_plldiv_set_rate, }; From fcf97201711822d90cea8132ca631e267f5d8c1f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:00 -0400 Subject: [PATCH 014/120] clk: at91: sam9x60-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-sam9x60-pll.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index cefd9948e103..bc1498c5704a 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -230,12 +230,16 @@ static long sam9x60_frac_pll_compute_mul_frac(struct sam9x60_pll_core *core, return tmprate; } -static long sam9x60_frac_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int sam9x60_frac_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw); - return sam9x60_frac_pll_compute_mul_frac(core, rate, *parent_rate, false); + req->rate = sam9x60_frac_pll_compute_mul_frac(core, req->rate, + req->best_parent_rate, + false); + + return 0; } static int sam9x60_frac_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -321,7 +325,7 @@ static const struct clk_ops sam9x60_frac_pll_ops = { .unprepare = sam9x60_frac_pll_unprepare, .is_prepared = sam9x60_frac_pll_is_prepared, .recalc_rate = sam9x60_frac_pll_recalc_rate, - .round_rate = sam9x60_frac_pll_round_rate, + .determine_rate = sam9x60_frac_pll_determine_rate, .set_rate = sam9x60_frac_pll_set_rate, .save_context = sam9x60_frac_pll_save_context, .restore_context = sam9x60_frac_pll_restore_context, @@ -332,7 +336,7 @@ static const struct clk_ops sam9x60_frac_pll_ops_chg = { .unprepare = sam9x60_frac_pll_unprepare, .is_prepared = sam9x60_frac_pll_is_prepared, .recalc_rate = sam9x60_frac_pll_recalc_rate, - .round_rate = sam9x60_frac_pll_round_rate, + .determine_rate = sam9x60_frac_pll_determine_rate, .set_rate = sam9x60_frac_pll_set_rate_chg, .save_context = sam9x60_frac_pll_save_context, .restore_context = sam9x60_frac_pll_restore_context, @@ -487,12 +491,15 @@ static long sam9x60_div_pll_compute_div(struct sam9x60_pll_core *core, return best_rate; } -static long sam9x60_div_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int sam9x60_div_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw); - return sam9x60_div_pll_compute_div(core, parent_rate, rate); + req->rate = sam9x60_div_pll_compute_div(core, &req->best_parent_rate, + req->rate); + + return 0; } static int sam9x60_div_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -601,7 +608,7 @@ static const struct clk_ops sam9x60_div_pll_ops = { .unprepare = sam9x60_div_pll_unprepare, .is_prepared = sam9x60_div_pll_is_prepared, .recalc_rate = sam9x60_div_pll_recalc_rate, - .round_rate = sam9x60_div_pll_round_rate, + .determine_rate = sam9x60_div_pll_determine_rate, .set_rate = sam9x60_div_pll_set_rate, .save_context = sam9x60_div_pll_save_context, .restore_context = sam9x60_div_pll_restore_context, @@ -612,7 +619,7 @@ static const struct clk_ops sam9x60_div_pll_ops_chg = { .unprepare = sam9x60_div_pll_unprepare, .is_prepared = sam9x60_div_pll_is_prepared, .recalc_rate = sam9x60_div_pll_recalc_rate, - .round_rate = sam9x60_div_pll_round_rate, + .determine_rate = sam9x60_div_pll_determine_rate, .set_rate = sam9x60_div_pll_set_rate_chg, .save_context = sam9x60_div_pll_save_context, .restore_context = sam9x60_div_pll_restore_context, @@ -623,7 +630,7 @@ static const struct clk_ops sam9x60_fixed_div_pll_ops = { .unprepare = sam9x60_div_pll_unprepare, .is_prepared = sam9x60_div_pll_is_prepared, .recalc_rate = sam9x60_fixed_div_pll_recalc_rate, - .round_rate = sam9x60_div_pll_round_rate, + .determine_rate = sam9x60_div_pll_determine_rate, .save_context = sam9x60_div_pll_save_context, .restore_context = sam9x60_div_pll_restore_context, }; From a31de1a36e6d2ffa957822e7b7d53bcb2608cb39 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:01 -0400 Subject: [PATCH 015/120] clk: at91: usb: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/at91/clk-usb.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c index b0696a928aa9..e906928cfbf0 100644 --- a/drivers/clk/at91/clk-usb.c +++ b/drivers/clk/at91/clk-usb.c @@ -319,8 +319,8 @@ static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw, return 0; } -static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int at91rm9200_clk_usb_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); struct clk_hw *parent = clk_hw_get_parent(hw); @@ -336,25 +336,27 @@ static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate, if (!usb->divisors[i]) continue; - tmp_parent_rate = rate * usb->divisors[i]; + tmp_parent_rate = req->rate * usb->divisors[i]; tmp_parent_rate = clk_hw_round_rate(parent, tmp_parent_rate); tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]); - if (tmprate < rate) - tmpdiff = rate - tmprate; + if (tmprate < req->rate) + tmpdiff = req->rate - tmprate; else - tmpdiff = tmprate - rate; + tmpdiff = tmprate - req->rate; if (bestdiff < 0 || bestdiff > tmpdiff) { bestrate = tmprate; bestdiff = tmpdiff; - *parent_rate = tmp_parent_rate; + req->best_parent_rate = tmp_parent_rate; } if (!bestdiff) break; } - return bestrate; + req->rate = bestrate; + + return 0; } static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, @@ -384,7 +386,7 @@ static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops at91rm9200_usb_ops = { .recalc_rate = at91rm9200_clk_usb_recalc_rate, - .round_rate = at91rm9200_clk_usb_round_rate, + .determine_rate = at91rm9200_clk_usb_determine_rate, .set_rate = at91rm9200_clk_usb_set_rate, }; From 9c8a3c6ecba07ba37bd12634d1d363be18e8ba60 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:02 -0400 Subject: [PATCH 016/120] clk: baikal-t1: ccu-div: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/baikal-t1/ccu-div.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/clk/baikal-t1/ccu-div.c b/drivers/clk/baikal-t1/ccu-div.c index 8d5fc7158f33..849d1f55765f 100644 --- a/drivers/clk/baikal-t1/ccu-div.c +++ b/drivers/clk/baikal-t1/ccu-div.c @@ -228,15 +228,18 @@ static inline unsigned long ccu_div_var_calc_divider(unsigned long rate, CCU_DIV_CLKDIV_MAX(mask)); } -static long ccu_div_var_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ccu_div_var_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ccu_div *div = to_ccu_div(hw); unsigned long divider; - divider = ccu_div_var_calc_divider(rate, *parent_rate, div->mask); + divider = ccu_div_var_calc_divider(req->rate, req->best_parent_rate, + div->mask); - return ccu_div_calc_freq(*parent_rate, divider); + req->rate = ccu_div_calc_freq(req->best_parent_rate, divider); + + return 0; } /* @@ -308,12 +311,14 @@ static unsigned long ccu_div_fixed_recalc_rate(struct clk_hw *hw, return ccu_div_calc_freq(parent_rate, div->divider); } -static long ccu_div_fixed_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ccu_div_fixed_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ccu_div *div = to_ccu_div(hw); - return ccu_div_calc_freq(*parent_rate, div->divider); + req->rate = ccu_div_calc_freq(req->best_parent_rate, div->divider); + + return 0; } static int ccu_div_fixed_set_rate(struct clk_hw *hw, unsigned long rate, @@ -534,14 +539,14 @@ static const struct clk_ops ccu_div_var_gate_to_set_ops = { .disable = ccu_div_gate_disable, .is_enabled = ccu_div_gate_is_enabled, .recalc_rate = ccu_div_var_recalc_rate, - .round_rate = ccu_div_var_round_rate, + .determine_rate = ccu_div_var_determine_rate, .set_rate = ccu_div_var_set_rate_fast, .debug_init = ccu_div_var_debug_init }; static const struct clk_ops ccu_div_var_nogate_ops = { .recalc_rate = ccu_div_var_recalc_rate, - .round_rate = ccu_div_var_round_rate, + .determine_rate = ccu_div_var_determine_rate, .set_rate = ccu_div_var_set_rate_slow, .debug_init = ccu_div_var_debug_init }; @@ -551,7 +556,7 @@ static const struct clk_ops ccu_div_gate_ops = { .disable = ccu_div_gate_disable, .is_enabled = ccu_div_gate_is_enabled, .recalc_rate = ccu_div_fixed_recalc_rate, - .round_rate = ccu_div_fixed_round_rate, + .determine_rate = ccu_div_fixed_determine_rate, .set_rate = ccu_div_fixed_set_rate, .debug_init = ccu_div_gate_debug_init }; @@ -565,7 +570,7 @@ static const struct clk_ops ccu_div_buf_ops = { static const struct clk_ops ccu_div_fixed_ops = { .recalc_rate = ccu_div_fixed_recalc_rate, - .round_rate = ccu_div_fixed_round_rate, + .determine_rate = ccu_div_fixed_determine_rate, .set_rate = ccu_div_fixed_set_rate, .debug_init = ccu_div_fixed_debug_init }; From eae23ade8f91ae3f6bbbc0e748787ac0b9d222db Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:03 -0400 Subject: [PATCH 017/120] clk: baikal-t1: ccu-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/baikal-t1/ccu-pll.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/baikal-t1/ccu-pll.c b/drivers/clk/baikal-t1/ccu-pll.c index 13ef28001439..357269f41cdc 100644 --- a/drivers/clk/baikal-t1/ccu-pll.c +++ b/drivers/clk/baikal-t1/ccu-pll.c @@ -228,14 +228,16 @@ static void ccu_pll_calc_factors(unsigned long rate, unsigned long parent_rate, } } -static long ccu_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ccu_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long nr = 1, nf = 1, od = 1; - ccu_pll_calc_factors(rate, *parent_rate, &nr, &nf, &od); + ccu_pll_calc_factors(req->rate, req->best_parent_rate, &nr, &nf, &od); - return ccu_pll_calc_freq(*parent_rate, nr, nf, od); + req->rate = ccu_pll_calc_freq(req->best_parent_rate, nr, nf, od); + + return 0; } /* @@ -481,7 +483,7 @@ static const struct clk_ops ccu_pll_gate_to_set_ops = { .disable = ccu_pll_disable, .is_enabled = ccu_pll_is_enabled, .recalc_rate = ccu_pll_recalc_rate, - .round_rate = ccu_pll_round_rate, + .determine_rate = ccu_pll_determine_rate, .set_rate = ccu_pll_set_rate_norst, .debug_init = ccu_pll_debug_init }; @@ -491,7 +493,7 @@ static const struct clk_ops ccu_pll_straight_set_ops = { .disable = ccu_pll_disable, .is_enabled = ccu_pll_is_enabled, .recalc_rate = ccu_pll_recalc_rate, - .round_rate = ccu_pll_round_rate, + .determine_rate = ccu_pll_determine_rate, .set_rate = ccu_pll_set_rate_reset, .debug_init = ccu_pll_debug_init }; From b2b354b075c726ddbd5f2778208392249daa0a39 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:04 -0400 Subject: [PATCH 018/120] clk: cdce925: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-cdce925.c | 50 +++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 21 deletions(-) diff --git a/drivers/clk/clk-cdce925.c b/drivers/clk/clk-cdce925.c index c51818c1af98..0b2ad21e6e4d 100644 --- a/drivers/clk/clk-cdce925.c +++ b/drivers/clk/clk-cdce925.c @@ -128,13 +128,15 @@ static void cdce925_pll_find_rate(unsigned long rate, } } -static long cdce925_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce925_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u16 n, m; - cdce925_pll_find_rate(rate, *parent_rate, &n, &m); - return (long)cdce925_pll_calculate_rate(*parent_rate, n, m); + cdce925_pll_find_rate(req->rate, req->best_parent_rate, &n, &m); + req->rate = (long)cdce925_pll_calculate_rate(req->best_parent_rate, n, m); + + return 0; } static int cdce925_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -266,7 +268,7 @@ static const struct clk_ops cdce925_pll_ops = { .prepare = cdce925_pll_prepare, .unprepare = cdce925_pll_unprepare, .recalc_rate = cdce925_pll_recalc_rate, - .round_rate = cdce925_pll_round_rate, + .determine_rate = cdce925_pll_determine_rate, .set_rate = cdce925_pll_set_rate, }; @@ -420,20 +422,23 @@ static unsigned long cdce925_clk_best_parent_rate( return rate * pdiv_best; } -static long cdce925_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce925_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long l_parent_rate = *parent_rate; - u16 divider = cdce925_calc_divider(rate, l_parent_rate); + unsigned long l_parent_rate = req->best_parent_rate; + u16 divider = cdce925_calc_divider(req->rate, l_parent_rate); - if (l_parent_rate / divider != rate) { - l_parent_rate = cdce925_clk_best_parent_rate(hw, rate); - divider = cdce925_calc_divider(rate, l_parent_rate); - *parent_rate = l_parent_rate; + if (l_parent_rate / divider != req->rate) { + l_parent_rate = cdce925_clk_best_parent_rate(hw, req->rate); + divider = cdce925_calc_divider(req->rate, l_parent_rate); + req->best_parent_rate = l_parent_rate; } if (divider) - return (long)(l_parent_rate / divider); + req->rate = (long)(l_parent_rate / divider); + else + req->rate = 0; + return 0; } @@ -451,7 +456,7 @@ static const struct clk_ops cdce925_clk_ops = { .prepare = cdce925_clk_prepare, .unprepare = cdce925_clk_unprepare, .recalc_rate = cdce925_clk_recalc_rate, - .round_rate = cdce925_clk_round_rate, + .determine_rate = cdce925_clk_determine_rate, .set_rate = cdce925_clk_set_rate, }; @@ -473,14 +478,17 @@ static u16 cdce925_y1_calc_divider(unsigned long rate, return (u16)divider; } -static long cdce925_clk_y1_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce925_clk_y1_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long l_parent_rate = *parent_rate; - u16 divider = cdce925_y1_calc_divider(rate, l_parent_rate); + unsigned long l_parent_rate = req->best_parent_rate; + u16 divider = cdce925_y1_calc_divider(req->rate, l_parent_rate); if (divider) - return (long)(l_parent_rate / divider); + req->rate = (long)(l_parent_rate / divider); + else + req->rate = 0; + return 0; } @@ -498,7 +506,7 @@ static const struct clk_ops cdce925_clk_y1_ops = { .prepare = cdce925_clk_prepare, .unprepare = cdce925_clk_unprepare, .recalc_rate = cdce925_clk_recalc_rate, - .round_rate = cdce925_clk_y1_round_rate, + .determine_rate = cdce925_clk_y1_determine_rate, .set_rate = cdce925_clk_y1_set_rate, }; From 2233ab21bc81dadabed0bd4a9392b7b353445965 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:05 -0400 Subject: [PATCH 019/120] clk: cs2000-cp: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-cs2000-cp.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c index 35cb93ad298a..8800472ba63f 100644 --- a/drivers/clk/clk-cs2000-cp.c +++ b/drivers/clk/clk-cs2000-cp.c @@ -305,15 +305,19 @@ static unsigned long cs2000_recalc_rate(struct clk_hw *hw, return cs2000_ratio_to_rate(ratio, parent_rate, priv->lf_ratio); } -static long cs2000_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cs2000_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct cs2000_priv *priv = hw_to_priv(hw); u32 ratio; - ratio = cs2000_rate_to_ratio(*parent_rate, rate, priv->lf_ratio); + ratio = cs2000_rate_to_ratio(req->best_parent_rate, req->rate, + priv->lf_ratio); - return cs2000_ratio_to_rate(ratio, *parent_rate, priv->lf_ratio); + req->rate = cs2000_ratio_to_rate(ratio, req->best_parent_rate, + priv->lf_ratio); + + return 0; } static int cs2000_select_ratio_mode(struct cs2000_priv *priv, @@ -430,7 +434,7 @@ static u8 cs2000_get_parent(struct clk_hw *hw) static const struct clk_ops cs2000_ops = { .get_parent = cs2000_get_parent, .recalc_rate = cs2000_recalc_rate, - .round_rate = cs2000_round_rate, + .determine_rate = cs2000_determine_rate, .set_rate = cs2000_set_rate, .prepare = cs2000_enable, .unprepare = cs2000_disable, From 986a96226cd3a20836425deb8a281efb8ff37b9d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:06 -0400 Subject: [PATCH 020/120] clk: ep93xx: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Alexander Sverdlin Signed-off-by: Brian Masney --- drivers/clk/clk-ep93xx.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-ep93xx.c b/drivers/clk/clk-ep93xx.c index 4bd8d6ecf6a2..b081ef920e25 100644 --- a/drivers/clk/clk-ep93xx.c +++ b/drivers/clk/clk-ep93xx.c @@ -389,23 +389,25 @@ static unsigned long ep93xx_div_recalc_rate(struct clk_hw *hw, return DIV_ROUND_CLOSEST(parent_rate, clk->div[index]); } -static long ep93xx_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ep93xx_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ep93xx_clk *clk = ep93xx_clk_from(hw); unsigned long best = 0, now; unsigned int i; for (i = 0; i < clk->num_div; i++) { - if ((rate * clk->div[i]) == *parent_rate) - return rate; + if (req->rate * clk->div[i] == req->best_parent_rate) + return 0; - now = DIV_ROUND_CLOSEST(*parent_rate, clk->div[i]); - if (!best || is_best(rate, now, best)) + now = DIV_ROUND_CLOSEST(req->best_parent_rate, clk->div[i]); + if (!best || is_best(req->rate, now, best)) best = now; } - return best; + req->rate = best; + + return 0; } static int ep93xx_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -437,7 +439,7 @@ static const struct clk_ops ep93xx_div_ops = { .disable = ep93xx_clk_disable, .is_enabled = ep93xx_clk_is_enabled, .recalc_rate = ep93xx_div_recalc_rate, - .round_rate = ep93xx_div_round_rate, + .determine_rate = ep93xx_div_determine_rate, .set_rate = ep93xx_div_set_rate, }; From b87d7e655a86a0f7a9b1d98070fd8540781f9b73 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:07 -0400 Subject: [PATCH 021/120] clk: fractional-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-fractional-divider.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index da057172cc90..cd36a6e27f25 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -151,25 +151,32 @@ void clk_fractional_divider_general_approximation(struct clk_hw *hw, } EXPORT_SYMBOL_GPL(clk_fractional_divider_general_approximation); -static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_fd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_fractional_divider *fd = to_clk_fd(hw); unsigned long m, n; u64 ret; - if (!rate || (!clk_hw_can_set_rate_parent(hw) && rate >= *parent_rate)) - return *parent_rate; + if (!req->rate || (!clk_hw_can_set_rate_parent(hw) && req->rate >= req->best_parent_rate)) { + req->rate = req->best_parent_rate; + + return 0; + } if (fd->approximation) - fd->approximation(hw, rate, parent_rate, &m, &n); + fd->approximation(hw, req->rate, &req->best_parent_rate, &m, &n); else - clk_fractional_divider_general_approximation(hw, rate, parent_rate, &m, &n); + clk_fractional_divider_general_approximation(hw, req->rate, + &req->best_parent_rate, + &m, &n); - ret = (u64)*parent_rate * m; + ret = (u64)req->best_parent_rate * m; do_div(ret, n); - return ret; + req->rate = ret; + + return 0; } static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, @@ -250,7 +257,7 @@ static void clk_fd_debug_init(struct clk_hw *hw, struct dentry *dentry) const struct clk_ops clk_fractional_divider_ops = { .recalc_rate = clk_fd_recalc_rate, - .round_rate = clk_fd_round_rate, + .determine_rate = clk_fd_determine_rate, .set_rate = clk_fd_set_rate, #ifdef CONFIG_DEBUG_FS .debug_init = clk_fd_debug_init, From 2ffdd7fbf7af47839ae79aeafc3d33138cf1c72f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:08 -0400 Subject: [PATCH 022/120] clk: gemini: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Linus Walleij Signed-off-by: Brian Masney --- drivers/clk/clk-gemini.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-gemini.c b/drivers/clk/clk-gemini.c index 856b008e07c6..e94589c38568 100644 --- a/drivers/clk/clk-gemini.c +++ b/drivers/clk/clk-gemini.c @@ -126,13 +126,16 @@ static unsigned long gemini_pci_recalc_rate(struct clk_hw *hw, return 33000000; } -static long gemini_pci_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int gemini_pci_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { /* We support 33 and 66 MHz */ - if (rate < 48000000) - return 33000000; - return 66000000; + if (req->rate < 48000000) + req->rate = 33000000; + else + req->rate = 66000000; + + return 0; } static int gemini_pci_set_rate(struct clk_hw *hw, unsigned long rate, @@ -179,7 +182,7 @@ static int gemini_pci_is_enabled(struct clk_hw *hw) static const struct clk_ops gemini_pci_clk_ops = { .recalc_rate = gemini_pci_recalc_rate, - .round_rate = gemini_pci_round_rate, + .determine_rate = gemini_pci_determine_rate, .set_rate = gemini_pci_set_rate, .enable = gemini_pci_enable, .disable = gemini_pci_disable, From 29d6d9e5299dc9fb67cb7176b90984da46cc4f9e Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:09 -0400 Subject: [PATCH 023/120] clk: highbank: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-highbank.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c index 6e68a41a70a1..cc583934ecf2 100644 --- a/drivers/clk/clk-highbank.c +++ b/drivers/clk/clk-highbank.c @@ -130,15 +130,17 @@ static void clk_pll_calc(unsigned long rate, unsigned long ref_freq, *pdivf = divf; } -static long clk_pll_round_rate(struct clk_hw *hwclk, unsigned long rate, - unsigned long *parent_rate) +static int clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 divq, divf; - unsigned long ref_freq = *parent_rate; + unsigned long ref_freq = req->best_parent_rate; - clk_pll_calc(rate, ref_freq, &divq, &divf); + clk_pll_calc(req->rate, ref_freq, &divq, &divf); - return (ref_freq * (divf + 1)) / (1 << divq); + req->rate = (ref_freq * (divf + 1)) / (1 << divq); + + return 0; } static int clk_pll_set_rate(struct clk_hw *hwclk, unsigned long rate, @@ -185,7 +187,7 @@ static const struct clk_ops clk_pll_ops = { .enable = clk_pll_enable, .disable = clk_pll_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_round_rate, + .determine_rate = clk_pll_determine_rate, .set_rate = clk_pll_set_rate, }; @@ -227,16 +229,18 @@ static unsigned long clk_periclk_recalc_rate(struct clk_hw *hwclk, return parent_rate / div; } -static long clk_periclk_round_rate(struct clk_hw *hwclk, unsigned long rate, - unsigned long *parent_rate) +static int clk_periclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 div; - div = *parent_rate / rate; + div = req->best_parent_rate / req->rate; div++; div &= ~0x1; - return *parent_rate / div; + req->rate = req->best_parent_rate / div; + + return 0; } static int clk_periclk_set_rate(struct clk_hw *hwclk, unsigned long rate, @@ -255,7 +259,7 @@ static int clk_periclk_set_rate(struct clk_hw *hwclk, unsigned long rate, static const struct clk_ops periclk_ops = { .recalc_rate = clk_periclk_recalc_rate, - .round_rate = clk_periclk_round_rate, + .determine_rate = clk_periclk_determine_rate, .set_rate = clk_periclk_set_rate, }; From 619a6210f398eb4ff170bb3eb070dc578cf1cd0c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:10 -0400 Subject: [PATCH 024/120] clk: hisilicon: clkdivider-hi6220: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/hisilicon/clkdivider-hi6220.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/hisilicon/clkdivider-hi6220.c b/drivers/clk/hisilicon/clkdivider-hi6220.c index 5348bafe694f..6bae18a84cb6 100644 --- a/drivers/clk/hisilicon/clkdivider-hi6220.c +++ b/drivers/clk/hisilicon/clkdivider-hi6220.c @@ -55,13 +55,15 @@ static unsigned long hi6220_clkdiv_recalc_rate(struct clk_hw *hw, CLK_DIVIDER_ROUND_CLOSEST, dclk->width); } -static long hi6220_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int hi6220_clkdiv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); - return divider_round_rate(hw, rate, prate, dclk->table, - dclk->width, CLK_DIVIDER_ROUND_CLOSEST); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, dclk->table, + dclk->width, CLK_DIVIDER_ROUND_CLOSEST); + + return 0; } static int hi6220_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, @@ -93,7 +95,7 @@ static int hi6220_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops hi6220_clkdiv_ops = { .recalc_rate = hi6220_clkdiv_recalc_rate, - .round_rate = hi6220_clkdiv_round_rate, + .determine_rate = hi6220_clkdiv_determine_rate, .set_rate = hi6220_clkdiv_set_rate, }; From bd6fede0903245bbe62cc1554ff399250776b34b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:11 -0400 Subject: [PATCH 025/120] clk: hisilicon: hi3660-stub: move comma from declaration of DEFINE_CLK_STUB() When trying to use Coccinelle to make changes inside drivers/clk/, it really does not like the trailing comma at the end of the declaration of DEFINE_CLK_STUB, and fails to process this file. It also looks weird to not have commas to separate the various array members of hi3660_stub_clks. Let's move the trailing comma out of the define so that Coccinelle can be ran against this source file. Signed-off-by: Brian Masney --- drivers/clk/hisilicon/clk-hi3660-stub.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3660-stub.c b/drivers/clk/hisilicon/clk-hi3660-stub.c index 3a653d54bee0..b0a996385301 100644 --- a/drivers/clk/hisilicon/clk-hi3660-stub.c +++ b/drivers/clk/hisilicon/clk-hi3660-stub.c @@ -34,7 +34,7 @@ .num_parents = 0, \ .flags = CLK_GET_RATE_NOCACHE, \ }, \ - }, + } #define to_stub_clk(_hw) container_of(_hw, struct hi3660_stub_clk, hw) @@ -102,10 +102,10 @@ static const struct clk_ops hi3660_stub_clk_ops = { }; static struct hi3660_stub_clk hi3660_stub_clks[HI3660_CLK_STUB_NUM] = { - DEFINE_CLK_STUB(HI3660_CLK_STUB_CLUSTER0, 0x0001030A, "cpu-cluster.0") - DEFINE_CLK_STUB(HI3660_CLK_STUB_CLUSTER1, 0x0002030A, "cpu-cluster.1") - DEFINE_CLK_STUB(HI3660_CLK_STUB_GPU, 0x0003030A, "clk-g3d") - DEFINE_CLK_STUB(HI3660_CLK_STUB_DDR, 0x00040309, "clk-ddrc") + DEFINE_CLK_STUB(HI3660_CLK_STUB_CLUSTER0, 0x0001030A, "cpu-cluster.0"), + DEFINE_CLK_STUB(HI3660_CLK_STUB_CLUSTER1, 0x0002030A, "cpu-cluster.1"), + DEFINE_CLK_STUB(HI3660_CLK_STUB_GPU, 0x0003030A, "clk-g3d"), + DEFINE_CLK_STUB(HI3660_CLK_STUB_DDR, 0x00040309, "clk-ddrc"), }; static struct clk_hw *hi3660_stub_clk_hw_get(struct of_phandle_args *clkspec, From 97827aa9721844c874cbac54af4b95bad9c21fab Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:12 -0400 Subject: [PATCH 026/120] clk: hisilicon: hi3660-stub: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/hisilicon/clk-hi3660-stub.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3660-stub.c b/drivers/clk/hisilicon/clk-hi3660-stub.c index b0a996385301..7c8b00ee6019 100644 --- a/drivers/clk/hisilicon/clk-hi3660-stub.c +++ b/drivers/clk/hisilicon/clk-hi3660-stub.c @@ -67,14 +67,14 @@ static unsigned long hi3660_stub_clk_recalc_rate(struct clk_hw *hw, return stub_clk->rate; } -static long hi3660_stub_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int hi3660_stub_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { /* * LPM3 handles rate rounding so just return whatever * rate is requested. */ - return rate; + return 0; } static int hi3660_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -97,7 +97,7 @@ static int hi3660_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops hi3660_stub_clk_ops = { .recalc_rate = hi3660_stub_clk_recalc_rate, - .round_rate = hi3660_stub_clk_round_rate, + .determine_rate = hi3660_stub_clk_determine_rate, .set_rate = hi3660_stub_clk_set_rate, }; From d983ced6cfe906468d0c63b1eae2880f4d2639c9 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:13 -0400 Subject: [PATCH 027/120] clk: hisilicon: hi6220-stub: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/hisilicon/clk-hi6220-stub.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi6220-stub.c b/drivers/clk/hisilicon/clk-hi6220-stub.c index a8319795ed1c..bf99cfafafa0 100644 --- a/drivers/clk/hisilicon/clk-hi6220-stub.c +++ b/drivers/clk/hisilicon/clk-hi6220-stub.c @@ -161,11 +161,11 @@ static int hi6220_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate, return ret; } -static long hi6220_stub_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int hi6220_stub_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct hi6220_stub_clk *stub_clk = to_stub_clk(hw); - unsigned long new_rate = rate / 1000; /* kHz */ + unsigned long new_rate = req->rate / 1000; /* kHz */ switch (stub_clk->id) { case HI6220_STUB_ACPU0: @@ -181,12 +181,14 @@ static long hi6220_stub_clk_round_rate(struct clk_hw *hw, unsigned long rate, break; } - return new_rate; + req->rate = new_rate; + + return 0; } static const struct clk_ops hi6220_stub_clk_ops = { .recalc_rate = hi6220_stub_clk_recalc_rate, - .round_rate = hi6220_stub_clk_round_rate, + .determine_rate = hi6220_stub_clk_determine_rate, .set_rate = hi6220_stub_clk_set_rate, }; From 93fc8a13df28fb59c3d0aeb8ba65bbd5a72dad0f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:14 -0400 Subject: [PATCH 028/120] clk: ingenic: cgu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Paul Cercueil Signed-off-by: Brian Masney --- drivers/clk/ingenic/cgu.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 0c9c8344ad11..91e7ac0cc334 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -174,14 +174,16 @@ ingenic_pll_calc(const struct ingenic_cgu_clk_info *clk_info, n * od); } -static long -ingenic_pll_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *prate) +static int ingenic_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk); - return ingenic_pll_calc(clk_info, req_rate, *prate, NULL, NULL, NULL); + req->rate = ingenic_pll_calc(clk_info, req->rate, req->best_parent_rate, + NULL, NULL, NULL); + + return 0; } static inline int ingenic_pll_check_stable(struct ingenic_cgu *cgu, @@ -317,7 +319,7 @@ static int ingenic_pll_is_enabled(struct clk_hw *hw) static const struct clk_ops ingenic_pll_ops = { .recalc_rate = ingenic_pll_recalc_rate, - .round_rate = ingenic_pll_round_rate, + .determine_rate = ingenic_pll_determine_rate, .set_rate = ingenic_pll_set_rate, .enable = ingenic_pll_enable, From 2c52ae540c1f26ac7af86b7fa5a0789889436c2e Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:15 -0400 Subject: [PATCH 029/120] clk: ingenic: jz4780-cgu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/ingenic/jz4780-cgu.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/clk/ingenic/jz4780-cgu.c b/drivers/clk/ingenic/jz4780-cgu.c index b1dadc0a5e75..07e2f3c5c454 100644 --- a/drivers/clk/ingenic/jz4780-cgu.c +++ b/drivers/clk/ingenic/jz4780-cgu.c @@ -128,19 +128,19 @@ static unsigned long jz4780_otg_phy_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long jz4780_otg_phy_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *parent_rate) +static int jz4780_otg_phy_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - if (req_rate < 15600000) - return 12000000; + if (req->rate < 15600000) + req->rate = 12000000; + else if (req->rate < 21600000) + req->rate = 19200000; + else if (req->rate < 36000000) + req->rate = 24000000; + else + req->rate = 48000000; - if (req_rate < 21600000) - return 19200000; - - if (req_rate < 36000000) - return 24000000; - - return 48000000; + return 0; } static int jz4780_otg_phy_set_rate(struct clk_hw *hw, unsigned long req_rate, @@ -212,7 +212,7 @@ static int jz4780_otg_phy_is_enabled(struct clk_hw *hw) static const struct clk_ops jz4780_otg_phy_ops = { .recalc_rate = jz4780_otg_phy_recalc_rate, - .round_rate = jz4780_otg_phy_round_rate, + .determine_rate = jz4780_otg_phy_determine_rate, .set_rate = jz4780_otg_phy_set_rate, .enable = jz4780_otg_phy_enable, From 888b3f35c01da7964120e79a9cfae6e1445c3e60 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:16 -0400 Subject: [PATCH 030/120] clk: ingenic: x1000-cgu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Paul Cercueil Signed-off-by: Brian Masney --- drivers/clk/ingenic/x1000-cgu.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/clk/ingenic/x1000-cgu.c b/drivers/clk/ingenic/x1000-cgu.c index feb03eed4fe8..d80886caf393 100644 --- a/drivers/clk/ingenic/x1000-cgu.c +++ b/drivers/clk/ingenic/x1000-cgu.c @@ -84,16 +84,17 @@ static unsigned long x1000_otg_phy_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long x1000_otg_phy_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *parent_rate) +static int x1000_otg_phy_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - if (req_rate < 18000000) - return 12000000; + if (req->rate < 18000000) + req->rate = 12000000; + else if (req->rate < 36000000) + req->rate = 24000000; + else + req->rate = 48000000; - if (req_rate < 36000000) - return 24000000; - - return 48000000; + return 0; } static int x1000_otg_phy_set_rate(struct clk_hw *hw, unsigned long req_rate, @@ -161,7 +162,7 @@ static int x1000_usb_phy_is_enabled(struct clk_hw *hw) static const struct clk_ops x1000_otg_phy_ops = { .recalc_rate = x1000_otg_phy_recalc_rate, - .round_rate = x1000_otg_phy_round_rate, + .determine_rate = x1000_otg_phy_determine_rate, .set_rate = x1000_otg_phy_set_rate, .enable = x1000_usb_phy_enable, From 94f872e762725deb751e0fc56a9d8fe187945d2b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:17 -0400 Subject: [PATCH 031/120] clk: lmk04832: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-lmk04832.c | 53 ++++++++++++++++++++++---------------- 1 file changed, 31 insertions(+), 22 deletions(-) diff --git a/drivers/clk/clk-lmk04832.c b/drivers/clk/clk-lmk04832.c index 2bcf422f0b04..b2107b31efa2 100644 --- a/drivers/clk/clk-lmk04832.c +++ b/drivers/clk/clk-lmk04832.c @@ -491,28 +491,33 @@ static long lmk04832_calc_pll2_params(unsigned long prate, unsigned long rate, return DIV_ROUND_CLOSEST(prate * 2 * pll2_p * pll2_n, pll2_r); } -static long lmk04832_vco_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lmk04832_vco_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); unsigned int n, p, r; long vco_rate; int ret; - ret = lmk04832_check_vco_ranges(lmk, rate); + ret = lmk04832_check_vco_ranges(lmk, req->rate); if (ret < 0) return ret; - vco_rate = lmk04832_calc_pll2_params(*prate, rate, &n, &p, &r); + vco_rate = lmk04832_calc_pll2_params(req->best_parent_rate, req->rate, + &n, &p, &r); if (vco_rate < 0) { dev_err(lmk->dev, "PLL2 parameters out of range\n"); - return vco_rate; + req->rate = vco_rate; + + return 0; } - if (rate != vco_rate) + if (req->rate != vco_rate) return -EINVAL; - return vco_rate; + req->rate = vco_rate; + + return 0; } static int lmk04832_vco_set_rate(struct clk_hw *hw, unsigned long rate, @@ -579,7 +584,7 @@ static const struct clk_ops lmk04832_vco_ops = { .prepare = lmk04832_vco_prepare, .unprepare = lmk04832_vco_unprepare, .recalc_rate = lmk04832_vco_recalc_rate, - .round_rate = lmk04832_vco_round_rate, + .determine_rate = lmk04832_vco_determine_rate, .set_rate = lmk04832_vco_set_rate, }; @@ -888,25 +893,27 @@ static unsigned long lmk04832_sclk_recalc_rate(struct clk_hw *hw, return DIV_ROUND_CLOSEST(prate, sysref_div); } -static long lmk04832_sclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lmk04832_sclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lmk04832 *lmk = container_of(hw, struct lmk04832, sclk); unsigned long sclk_rate; unsigned int sysref_div; - sysref_div = DIV_ROUND_CLOSEST(*prate, rate); - sclk_rate = DIV_ROUND_CLOSEST(*prate, sysref_div); + sysref_div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); + sclk_rate = DIV_ROUND_CLOSEST(req->best_parent_rate, sysref_div); if (sysref_div < 0x07 || sysref_div > 0x1fff) { dev_err(lmk->dev, "SYSREF divider out of range\n"); return -EINVAL; } - if (rate != sclk_rate) + if (req->rate != sclk_rate) return -EINVAL; - return sclk_rate; + req->rate = sclk_rate; + + return 0; } static int lmk04832_sclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -945,7 +952,7 @@ static const struct clk_ops lmk04832_sclk_ops = { .prepare = lmk04832_sclk_prepare, .unprepare = lmk04832_sclk_unprepare, .recalc_rate = lmk04832_sclk_recalc_rate, - .round_rate = lmk04832_sclk_round_rate, + .determine_rate = lmk04832_sclk_determine_rate, .set_rate = lmk04832_sclk_set_rate, }; @@ -1069,26 +1076,28 @@ static unsigned long lmk04832_dclk_recalc_rate(struct clk_hw *hw, return rate; } -static long lmk04832_dclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lmk04832_dclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct lmk_dclk *dclk = container_of(hw, struct lmk_dclk, hw); struct lmk04832 *lmk = dclk->lmk; unsigned long dclk_rate; unsigned int dclk_div; - dclk_div = DIV_ROUND_CLOSEST(*prate, rate); - dclk_rate = DIV_ROUND_CLOSEST(*prate, dclk_div); + dclk_div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); + dclk_rate = DIV_ROUND_CLOSEST(req->best_parent_rate, dclk_div); if (dclk_div < 1 || dclk_div > 0x3ff) { dev_err(lmk->dev, "%s_div out of range\n", clk_hw_get_name(hw)); return -EINVAL; } - if (rate != dclk_rate) + if (req->rate != dclk_rate) return -EINVAL; - return dclk_rate; + req->rate = dclk_rate; + + return 0; } static int lmk04832_dclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1158,7 +1167,7 @@ static const struct clk_ops lmk04832_dclk_ops = { .prepare = lmk04832_dclk_prepare, .unprepare = lmk04832_dclk_unprepare, .recalc_rate = lmk04832_dclk_recalc_rate, - .round_rate = lmk04832_dclk_round_rate, + .determine_rate = lmk04832_dclk_determine_rate, .set_rate = lmk04832_dclk_set_rate, }; From bb40a2ef4fc9d7cef4b03e1b1906b512d9693dd9 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:18 -0400 Subject: [PATCH 032/120] clk: loongson1: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-loongson1.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-loongson1.c b/drivers/clk/clk-loongson1.c index a3467aa6790f..f9f060d08a5f 100644 --- a/drivers/clk/clk-loongson1.c +++ b/drivers/clk/clk-loongson1.c @@ -93,14 +93,16 @@ static unsigned long ls1x_divider_recalc_rate(struct clk_hw *hw, d->flags, d->width); } -static long ls1x_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int ls1x_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ls1x_clk *ls1x_clk = to_ls1x_clk(hw); const struct ls1x_clk_div_data *d = ls1x_clk->data; - return divider_round_rate(hw, rate, prate, d->table, - d->width, d->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + d->table, d->width, d->flags); + + return 0; } static int ls1x_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -146,7 +148,7 @@ static int ls1x_divider_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops ls1x_clk_divider_ops = { .recalc_rate = ls1x_divider_recalc_rate, - .round_rate = ls1x_divider_round_rate, + .determine_rate = ls1x_divider_determine_rate, .set_rate = ls1x_divider_set_rate, }; From 4f8ccd92870d6be4c11ae4440ee7c3ded4d4bd70 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:19 -0400 Subject: [PATCH 033/120] clk: max9485: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-max9485.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/clk/clk-max9485.c b/drivers/clk/clk-max9485.c index be9020b6c789..0515e3e41162 100644 --- a/drivers/clk/clk-max9485.c +++ b/drivers/clk/clk-max9485.c @@ -159,29 +159,32 @@ static unsigned long max9485_clkout_recalc_rate(struct clk_hw *hw, return 0; } -static long max9485_clkout_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int max9485_clkout_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { const struct max9485_rate *curr, *prev = NULL; for (curr = max9485_rates; curr->out != 0; curr++) { /* Exact matches */ - if (curr->out == rate) - return rate; + if (curr->out == req->rate) + return 0; /* * Find the first entry that has a frequency higher than the * requested one. */ - if (curr->out > rate) { + if (curr->out > req->rate) { unsigned int mid; /* * If this is the first entry, clamp the value to the * lowest possible frequency. */ - if (!prev) - return curr->out; + if (!prev) { + req->rate = curr->out; + + return 0; + } /* * Otherwise, determine whether the previous entry or @@ -189,14 +192,18 @@ static long max9485_clkout_round_rate(struct clk_hw *hw, unsigned long rate, */ mid = prev->out + ((curr->out - prev->out) / 2); - return (mid > rate) ? prev->out : curr->out; + req->rate = mid > req->rate ? prev->out : curr->out; + + return 0; } prev = curr; } /* If the last entry was still too high, clamp the value */ - return prev->out; + req->rate = prev->out; + + return 0; } struct max9485_clk { @@ -221,7 +228,7 @@ static const struct max9485_clk max9485_clks[MAX9485_NUM_CLKS] = { .parent_index = -1, .ops = { .set_rate = max9485_clkout_set_rate, - .round_rate = max9485_clkout_round_rate, + .determine_rate = max9485_clkout_determine_rate, .recalc_rate = max9485_clkout_recalc_rate, }, }, From 7b45988fcf7895b2f044c216e09ba3b68764a24d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:20 -0400 Subject: [PATCH 034/120] clk: milbeaut: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-milbeaut.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-milbeaut.c b/drivers/clk/clk-milbeaut.c index 18c20aff45f7..b4f9b7143eaa 100644 --- a/drivers/clk/clk-milbeaut.c +++ b/drivers/clk/clk-milbeaut.c @@ -386,8 +386,8 @@ static unsigned long m10v_clk_divider_recalc_rate(struct clk_hw *hw, divider->flags, divider->width); } -static long m10v_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int m10v_clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct m10v_clk_divider *divider = to_m10v_div(hw); @@ -398,13 +398,19 @@ static long m10v_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, val = readl(divider->reg) >> divider->shift; val &= clk_div_mask(divider->width); - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); + req->rate = divider_ro_round_rate(hw, req->rate, + &req->best_parent_rate, + divider->table, + divider->width, + divider->flags, val); + + return 0; } - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + divider->table, divider->width, divider->flags); + + return 0; } static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -450,7 +456,7 @@ static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops m10v_clk_divider_ops = { .recalc_rate = m10v_clk_divider_recalc_rate, - .round_rate = m10v_clk_divider_round_rate, + .determine_rate = m10v_clk_divider_determine_rate, .set_rate = m10v_clk_divider_set_rate, }; From 2ffc3f1f39647e522a19a917ec105a96301c5d74 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:21 -0400 Subject: [PATCH 035/120] clk: mmp: audio: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mmp/clk-audio.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mmp/clk-audio.c b/drivers/clk/mmp/clk-audio.c index 88d798d510cd..ed27fc796c94 100644 --- a/drivers/clk/mmp/clk-audio.c +++ b/drivers/clk/mmp/clk-audio.c @@ -164,23 +164,23 @@ static unsigned long audio_pll_recalc_rate(struct clk_hw *hw, return 0; } -static long audio_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int audio_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned int prediv; unsigned int postdiv; long rounded = 0; for (prediv = 0; prediv < ARRAY_SIZE(predivs); prediv++) { - if (predivs[prediv].parent_rate != *parent_rate) + if (predivs[prediv].parent_rate != req->best_parent_rate) continue; for (postdiv = 0; postdiv < ARRAY_SIZE(postdivs); postdiv++) { long freq = predivs[prediv].freq_vco; freq /= postdivs[postdiv].divisor; - if (freq == rate) - return rate; - if (freq < rate) + if (freq == req->rate) + return 0; + if (freq < req->rate) continue; if (rounded && freq > rounded) continue; @@ -188,7 +188,9 @@ static long audio_pll_round_rate(struct clk_hw *hw, unsigned long rate, } } - return rounded; + req->rate = rounded; + + return 0; } static int audio_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -228,7 +230,7 @@ static int audio_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops audio_pll_ops = { .recalc_rate = audio_pll_recalc_rate, - .round_rate = audio_pll_round_rate, + .determine_rate = audio_pll_determine_rate, .set_rate = audio_pll_set_rate, }; From 4a7aeef18bc568e05962ba7c25f0782970fe5d1d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:22 -0400 Subject: [PATCH 036/120] clk: mmp: frac: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mmp/clk-frac.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c index 6556f6ada2e8..0b1bb01346f0 100644 --- a/drivers/clk/mmp/clk-frac.c +++ b/drivers/clk/mmp/clk-frac.c @@ -21,8 +21,8 @@ #define to_clk_factor(hw) container_of(hw, struct mmp_clk_factor, hw) -static long clk_factor_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_factor_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct mmp_clk_factor *factor = to_clk_factor(hw); u64 rate = 0, prev_rate; @@ -33,19 +33,20 @@ static long clk_factor_round_rate(struct clk_hw *hw, unsigned long drate, d = &factor->ftbl[i]; prev_rate = rate; - rate = (u64)(*prate) * d->denominator; + rate = (u64)(req->best_parent_rate) * d->denominator; do_div(rate, d->numerator * factor->masks->factor); - if (rate > drate) + if (rate > req->rate) break; } - if ((i == 0) || (i == factor->ftbl_cnt)) { - return rate; - } else { - if ((drate - prev_rate) > (rate - drate)) - return rate; - else - return prev_rate; - } + + if ((i == 0) || (i == factor->ftbl_cnt)) + req->rate = rate; + else if ((req->rate - prev_rate) > (rate - req->rate)) + req->rate = rate; + else + req->rate = prev_rate; + + return 0; } static unsigned long clk_factor_recalc_rate(struct clk_hw *hw, @@ -160,7 +161,7 @@ static int clk_factor_init(struct clk_hw *hw) static const struct clk_ops clk_factor_ops = { .recalc_rate = clk_factor_recalc_rate, - .round_rate = clk_factor_round_rate, + .determine_rate = clk_factor_determine_rate, .set_rate = clk_factor_set_rate, .init = clk_factor_init, }; From 772e2dc59c9c5ec419b3db8f867c0d65d44a9590 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:23 -0400 Subject: [PATCH 037/120] clk: multiplier: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-multiplier.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-multiplier.c b/drivers/clk/clk-multiplier.c index e507aa958da9..6f2955d408b6 100644 --- a/drivers/clk/clk-multiplier.c +++ b/drivers/clk/clk-multiplier.c @@ -112,14 +112,16 @@ static unsigned long __bestmult(struct clk_hw *hw, unsigned long rate, return bestmult; } -static long clk_multiplier_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_multiplier_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_multiplier *mult = to_clk_multiplier(hw); - unsigned long factor = __bestmult(hw, rate, parent_rate, + unsigned long factor = __bestmult(hw, req->rate, &req->best_parent_rate, mult->width, mult->flags); - return *parent_rate * factor; + req->rate = req->best_parent_rate * factor; + + return 0; } static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate, @@ -150,7 +152,7 @@ static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops clk_multiplier_ops = { .recalc_rate = clk_multiplier_recalc_rate, - .round_rate = clk_multiplier_round_rate, + .determine_rate = clk_multiplier_determine_rate, .set_rate = clk_multiplier_set_rate, }; EXPORT_SYMBOL_GPL(clk_multiplier_ops); From da730b17aae9daa221e6de2c48303b3fb684f683 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:24 -0400 Subject: [PATCH 038/120] clk: mxs: div: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. The change to call div->ops->determine_rate() instead of div->ops->round_rate() was done by hand. Signed-off-by: Brian Masney --- drivers/clk/mxs/clk-div.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c index 0a78ef380646..8afe1a9c1552 100644 --- a/drivers/clk/mxs/clk-div.c +++ b/drivers/clk/mxs/clk-div.c @@ -40,12 +40,12 @@ static unsigned long clk_div_recalc_rate(struct clk_hw *hw, return div->ops->recalc_rate(&div->divider.hw, parent_rate); } -static long clk_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_div *div = to_clk_div(hw); - return div->ops->round_rate(&div->divider.hw, rate, prate); + return div->ops->determine_rate(&div->divider.hw, req); } static int clk_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -63,7 +63,7 @@ static int clk_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops clk_div_ops = { .recalc_rate = clk_div_recalc_rate, - .round_rate = clk_div_round_rate, + .determine_rate = clk_div_determine_rate, .set_rate = clk_div_set_rate, }; From 755e4880f950221b6944b33dcab94093940d02b9 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:25 -0400 Subject: [PATCH 039/120] clk: mxs: frac: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mxs/clk-frac.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c index bba0d840dd76..73f514fb84ff 100644 --- a/drivers/clk/mxs/clk-frac.c +++ b/drivers/clk/mxs/clk-frac.c @@ -44,18 +44,18 @@ static unsigned long clk_frac_recalc_rate(struct clk_hw *hw, return tmp_rate >> frac->width; } -static long clk_frac_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_frac_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_frac *frac = to_clk_frac(hw); - unsigned long parent_rate = *prate; + unsigned long parent_rate = req->best_parent_rate; u32 div; u64 tmp, tmp_rate, result; - if (rate > parent_rate) + if (req->rate > parent_rate) return -EINVAL; - tmp = rate; + tmp = req->rate; tmp <<= frac->width; do_div(tmp, parent_rate); div = tmp; @@ -67,7 +67,9 @@ static long clk_frac_round_rate(struct clk_hw *hw, unsigned long rate, result = tmp_rate >> frac->width; if ((result << frac->width) < tmp_rate) result += 1; - return result; + req->rate = result; + + return 0; } static int clk_frac_set_rate(struct clk_hw *hw, unsigned long rate, @@ -103,7 +105,7 @@ static int clk_frac_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops clk_frac_ops = { .recalc_rate = clk_frac_recalc_rate, - .round_rate = clk_frac_round_rate, + .determine_rate = clk_frac_determine_rate, .set_rate = clk_frac_set_rate, }; From b248bd3c0525feb7d0e2d2ca5930e5e95261eb4c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:26 -0400 Subject: [PATCH 040/120] clk: mxs: ref: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mxs/clk-ref.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c index 2297259da89a..a99ee4cd2ece 100644 --- a/drivers/clk/mxs/clk-ref.c +++ b/drivers/clk/mxs/clk-ref.c @@ -57,22 +57,24 @@ static unsigned long clk_ref_recalc_rate(struct clk_hw *hw, return tmp; } -static long clk_ref_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_ref_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long parent_rate = *prate; + unsigned long parent_rate = req->best_parent_rate; u64 tmp = parent_rate; u8 frac; - tmp = tmp * 18 + rate / 2; - do_div(tmp, rate); + tmp = tmp * 18 + req->rate / 2; + do_div(tmp, req->rate); frac = clamp(tmp, 18, 35); tmp = parent_rate; tmp *= 18; do_div(tmp, frac); - return tmp; + req->rate = tmp; + + return 0; } static int clk_ref_set_rate(struct clk_hw *hw, unsigned long rate, @@ -104,7 +106,7 @@ static const struct clk_ops clk_ref_ops = { .enable = clk_ref_enable, .disable = clk_ref_disable, .recalc_rate = clk_ref_recalc_rate, - .round_rate = clk_ref_round_rate, + .determine_rate = clk_ref_determine_rate, .set_rate = clk_ref_set_rate, }; From 215f8aa095a1e3384ab5d84bae6b86cab0e491be Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:27 -0400 Subject: [PATCH 041/120] clk: nuvoton: ma35d1-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/nuvoton/clk-ma35d1-divider.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/nuvoton/clk-ma35d1-divider.c b/drivers/clk/nuvoton/clk-ma35d1-divider.c index bb8c23d2b895..e39f53d5bf45 100644 --- a/drivers/clk/nuvoton/clk-ma35d1-divider.c +++ b/drivers/clk/nuvoton/clk-ma35d1-divider.c @@ -39,12 +39,16 @@ static unsigned long ma35d1_clkdiv_recalc_rate(struct clk_hw *hw, unsigned long CLK_DIVIDER_ROUND_CLOSEST, dclk->width); } -static long ma35d1_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) +static int ma35d1_clkdiv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); - return divider_round_rate(hw, rate, prate, dclk->table, - dclk->width, CLK_DIVIDER_ROUND_CLOSEST); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + dclk->table, dclk->width, + CLK_DIVIDER_ROUND_CLOSEST); + + return 0; } static int ma35d1_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) @@ -71,7 +75,7 @@ static int ma35d1_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigne static const struct clk_ops ma35d1_adc_clkdiv_ops = { .recalc_rate = ma35d1_clkdiv_recalc_rate, - .round_rate = ma35d1_clkdiv_round_rate, + .determine_rate = ma35d1_clkdiv_determine_rate, .set_rate = ma35d1_clkdiv_set_rate, }; From cd9e9bbfd93be277e316ee854614e2c4cd502fa8 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:28 -0400 Subject: [PATCH 042/120] clk: nuvoton: ma35d1-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/nuvoton/clk-ma35d1-pll.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/clk/nuvoton/clk-ma35d1-pll.c b/drivers/clk/nuvoton/clk-ma35d1-pll.c index ff3fb8b87c24..4620acfe47e8 100644 --- a/drivers/clk/nuvoton/clk-ma35d1-pll.c +++ b/drivers/clk/nuvoton/clk-ma35d1-pll.c @@ -244,35 +244,43 @@ static unsigned long ma35d1_clk_pll_recalc_rate(struct clk_hw *hw, unsigned long return 0; } -static long ma35d1_clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ma35d1_clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); u32 reg_ctl[3] = { 0 }; unsigned long pll_freq; long ret; - if (*parent_rate < PLL_FREF_MIN_FREQ || *parent_rate > PLL_FREF_MAX_FREQ) + if (req->best_parent_rate < PLL_FREF_MIN_FREQ || req->best_parent_rate > PLL_FREF_MAX_FREQ) return -EINVAL; - ret = ma35d1_pll_find_closest(pll, rate, *parent_rate, reg_ctl, &pll_freq); + ret = ma35d1_pll_find_closest(pll, req->rate, req->best_parent_rate, + reg_ctl, &pll_freq); if (ret < 0) return ret; switch (pll->id) { case CAPLL: reg_ctl[0] = readl_relaxed(pll->ctl0_base); - pll_freq = ma35d1_calc_smic_pll_freq(reg_ctl[0], *parent_rate); - return pll_freq; + pll_freq = ma35d1_calc_smic_pll_freq(reg_ctl[0], req->best_parent_rate); + req->rate = pll_freq; + + return 0; case DDRPLL: case APLL: case EPLL: case VPLL: reg_ctl[0] = readl_relaxed(pll->ctl0_base); reg_ctl[1] = readl_relaxed(pll->ctl1_base); - pll_freq = ma35d1_calc_pll_freq(pll->mode, reg_ctl, *parent_rate); - return pll_freq; + pll_freq = ma35d1_calc_pll_freq(pll->mode, reg_ctl, req->best_parent_rate); + req->rate = pll_freq; + + return 0; } + + req->rate = 0; + return 0; } @@ -311,12 +319,12 @@ static const struct clk_ops ma35d1_clk_pll_ops = { .unprepare = ma35d1_clk_pll_unprepare, .set_rate = ma35d1_clk_pll_set_rate, .recalc_rate = ma35d1_clk_pll_recalc_rate, - .round_rate = ma35d1_clk_pll_round_rate, + .determine_rate = ma35d1_clk_pll_determine_rate, }; static const struct clk_ops ma35d1_clk_fixed_pll_ops = { .recalc_rate = ma35d1_clk_pll_recalc_rate, - .round_rate = ma35d1_clk_pll_round_rate, + .determine_rate = ma35d1_clk_pll_determine_rate, }; struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, const char *name, From b46a3d323a5b7942e65025254c13801d0f475f02 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:29 -0400 Subject: [PATCH 043/120] clk: nxp: lpc18xx-cgu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/nxp/clk-lpc18xx-cgu.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/nxp/clk-lpc18xx-cgu.c b/drivers/clk/nxp/clk-lpc18xx-cgu.c index 81efa885069b..30e0b283ca60 100644 --- a/drivers/clk/nxp/clk-lpc18xx-cgu.c +++ b/drivers/clk/nxp/clk-lpc18xx-cgu.c @@ -370,23 +370,25 @@ static unsigned long lpc18xx_pll0_recalc_rate(struct clk_hw *hw, return 0; } -static long lpc18xx_pll0_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int lpc18xx_pll0_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long m; - if (*prate < rate) { + if (req->best_parent_rate < req->rate) { pr_warn("%s: pll dividers not supported\n", __func__); return -EINVAL; } - m = DIV_ROUND_UP_ULL(*prate, rate * 2); + m = DIV_ROUND_UP_ULL(req->best_parent_rate, req->rate * 2); if (m <= 0 && m > LPC18XX_PLL0_MSEL_MAX) { - pr_warn("%s: unable to support rate %lu\n", __func__, rate); + pr_warn("%s: unable to support rate %lu\n", __func__, req->rate); return -EINVAL; } - return 2 * *prate * m; + req->rate = 2 * req->best_parent_rate * m; + + return 0; } static int lpc18xx_pll0_set_rate(struct clk_hw *hw, unsigned long rate, @@ -443,7 +445,7 @@ static int lpc18xx_pll0_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops lpc18xx_pll0_ops = { .recalc_rate = lpc18xx_pll0_recalc_rate, - .round_rate = lpc18xx_pll0_round_rate, + .determine_rate = lpc18xx_pll0_determine_rate, .set_rate = lpc18xx_pll0_set_rate, }; From 1c7452aa7577d8b521eae162a5a51d7408902985 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:31 -0400 Subject: [PATCH 044/120] clk: pistachio: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/pistachio/clk-pll.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/clk/pistachio/clk-pll.c b/drivers/clk/pistachio/clk-pll.c index 025b9df76cdb..d05337915e2b 100644 --- a/drivers/clk/pistachio/clk-pll.c +++ b/drivers/clk/pistachio/clk-pll.c @@ -139,19 +139,23 @@ pll_get_params(struct pistachio_clk_pll *pll, unsigned long fref, return NULL; } -static long pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { struct pistachio_clk_pll *pll = to_pistachio_pll(hw); unsigned int i; for (i = 0; i < pll->nr_rates; i++) { - if (i > 0 && pll->rates[i].fref == *parent_rate && - pll->rates[i].fout <= rate) - return pll->rates[i - 1].fout; + if (i > 0 && pll->rates[i].fref == req->best_parent_rate && + pll->rates[i].fout <= req->rate) { + req->rate = pll->rates[i - 1].fout; + + return 0; + } } - return pll->rates[0].fout; + req->rate = pll->rates[0].fout; + + return 0; } static int pll_gf40lp_frac_enable(struct clk_hw *hw) @@ -300,7 +304,7 @@ static const struct clk_ops pll_gf40lp_frac_ops = { .disable = pll_gf40lp_frac_disable, .is_enabled = pll_gf40lp_frac_is_enabled, .recalc_rate = pll_gf40lp_frac_recalc_rate, - .round_rate = pll_round_rate, + .determine_rate = pll_determine_rate, .set_rate = pll_gf40lp_frac_set_rate, }; @@ -432,7 +436,7 @@ static const struct clk_ops pll_gf40lp_laint_ops = { .disable = pll_gf40lp_laint_disable, .is_enabled = pll_gf40lp_laint_is_enabled, .recalc_rate = pll_gf40lp_laint_recalc_rate, - .round_rate = pll_round_rate, + .determine_rate = pll_determine_rate, .set_rate = pll_gf40lp_laint_set_rate, }; From 6a67550bc4da6f4f852a2593f893db3c9840a9c7 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:32 -0400 Subject: [PATCH 045/120] clk: scpi: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-scpi.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-scpi.c b/drivers/clk/clk-scpi.c index 19d530d52e64..0b592de7bdb2 100644 --- a/drivers/clk/clk-scpi.c +++ b/drivers/clk/clk-scpi.c @@ -32,8 +32,8 @@ static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw, return clk->scpi_ops->clk_get_val(clk->id); } -static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int scpi_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { /* * We can't figure out what rate it will be, so just return the @@ -41,7 +41,7 @@ static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, * after the rate is set and we'll know what rate the clock is * running at then. */ - return rate; + return 0; } static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -54,7 +54,7 @@ static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops scpi_clk_ops = { .recalc_rate = scpi_clk_recalc_rate, - .round_rate = scpi_clk_round_rate, + .determine_rate = scpi_clk_determine_rate, .set_rate = scpi_clk_set_rate, }; @@ -92,12 +92,14 @@ static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw, return opp->freq; } -static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int scpi_dvfs_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct scpi_clk *clk = to_scpi_clk(hw); - return __scpi_dvfs_round_rate(clk, rate); + req->rate = __scpi_dvfs_round_rate(clk, req->rate); + + return 0; } static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate) @@ -124,7 +126,7 @@ static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops scpi_dvfs_ops = { .recalc_rate = scpi_dvfs_recalc_rate, - .round_rate = scpi_dvfs_round_rate, + .determine_rate = scpi_dvfs_determine_rate, .set_rate = scpi_dvfs_set_rate, }; From cf93c12ba4342f5b93ff7dd3dfedb299aa4f2552 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:33 -0400 Subject: [PATCH 046/120] clk: si514: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-si514.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-si514.c b/drivers/clk/clk-si514.c index 1127c35ce57d..f61590d70575 100644 --- a/drivers/clk/clk-si514.c +++ b/drivers/clk/clk-si514.c @@ -227,20 +227,28 @@ static unsigned long si514_recalc_rate(struct clk_hw *hw, return si514_calc_rate(&settings); } -static long si514_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si514_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_si514_muldiv settings; int err; - if (!rate) + if (!req->rate) { + req->rate = 0; + return 0; + } - err = si514_calc_muldiv(&settings, rate); - if (err) - return err; + err = si514_calc_muldiv(&settings, req->rate); + if (err) { + req->rate = err; - return si514_calc_rate(&settings); + return 0; + } + + req->rate = si514_calc_rate(&settings); + + return 0; } /* @@ -289,7 +297,7 @@ static const struct clk_ops si514_clk_ops = { .unprepare = si514_unprepare, .is_prepared = si514_is_prepared, .recalc_rate = si514_recalc_rate, - .round_rate = si514_round_rate, + .determine_rate = si514_determine_rate, .set_rate = si514_set_rate, }; From 6a5626809ca6e6d696bf9e5039e6370d2c128888 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:34 -0400 Subject: [PATCH 047/120] clk: si521xx: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-si521xx.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-si521xx.c b/drivers/clk/clk-si521xx.c index 4f7b74f889f1..4ed4e1a5f4f2 100644 --- a/drivers/clk/clk-si521xx.c +++ b/drivers/clk/clk-si521xx.c @@ -164,15 +164,17 @@ static unsigned long si521xx_diff_recalc_rate(struct clk_hw *hw, return (unsigned long)rate; } -static long si521xx_diff_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int si521xx_diff_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long best_parent; - best_parent = (rate / SI521XX_DIFF_MULT) * SI521XX_DIFF_DIV; - *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); + best_parent = (req->rate / SI521XX_DIFF_MULT) * SI521XX_DIFF_DIV; + req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); - return (*prate / SI521XX_DIFF_DIV) * SI521XX_DIFF_MULT; + req->rate = (req->best_parent_rate / SI521XX_DIFF_DIV) * SI521XX_DIFF_MULT; + + return 0; } static int si521xx_diff_set_rate(struct clk_hw *hw, unsigned long rate, @@ -208,7 +210,7 @@ static void si521xx_diff_unprepare(struct clk_hw *hw) } static const struct clk_ops si521xx_diff_clk_ops = { - .round_rate = si521xx_diff_round_rate, + .determine_rate = si521xx_diff_determine_rate, .set_rate = si521xx_diff_set_rate, .recalc_rate = si521xx_diff_recalc_rate, .prepare = si521xx_diff_prepare, From 90d00a531ea1d785f98de9dce668915928b0dd52 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:35 -0400 Subject: [PATCH 048/120] clk: si5341: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-si5341.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c index 5004888c7eca..2499b771cd83 100644 --- a/drivers/clk/clk-si5341.c +++ b/drivers/clk/clk-si5341.c @@ -663,8 +663,8 @@ static unsigned long si5341_synth_clk_recalc_rate(struct clk_hw *hw, return f; } -static long si5341_synth_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si5341_synth_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_si5341_synth *synth = to_clk_si5341_synth(hw); u64 f; @@ -672,15 +672,21 @@ static long si5341_synth_clk_round_rate(struct clk_hw *hw, unsigned long rate, /* The synthesizer accuracy is such that anything in range will work */ f = synth->data->freq_vco; do_div(f, SI5341_SYNTH_N_MAX); - if (rate < f) - return f; + if (req->rate < f) { + req->rate = f; + + return 0; + } f = synth->data->freq_vco; do_div(f, SI5341_SYNTH_N_MIN); - if (rate > f) - return f; + if (req->rate > f) { + req->rate = f; - return rate; + return 0; + } + + return 0; } static int si5341_synth_program(struct clk_si5341_synth *synth, @@ -741,7 +747,7 @@ static const struct clk_ops si5341_synth_clk_ops = { .prepare = si5341_synth_clk_prepare, .unprepare = si5341_synth_clk_unprepare, .recalc_rate = si5341_synth_clk_recalc_rate, - .round_rate = si5341_synth_clk_round_rate, + .determine_rate = si5341_synth_clk_determine_rate, .set_rate = si5341_synth_clk_set_rate, }; From 0d4ccc375673da246050430817f409c392d0ef0b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:36 -0400 Subject: [PATCH 049/120] clk: si544: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-si544.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-si544.c b/drivers/clk/clk-si544.c index ca3473efa314..09c06ecec1a5 100644 --- a/drivers/clk/clk-si544.c +++ b/drivers/clk/clk-si544.c @@ -307,16 +307,16 @@ static unsigned long si544_recalc_rate(struct clk_hw *hw, return si544_calc_rate(&settings); } -static long si544_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si544_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_si544 *data = to_clk_si544(hw); - if (!is_valid_frequency(data, rate)) + if (!is_valid_frequency(data, req->rate)) return -EINVAL; /* The accuracy is less than 1 Hz, so any rate is possible */ - return rate; + return 0; } /* Calculates the maximum "small" change, 950 * rate / 1000000 */ @@ -408,7 +408,7 @@ static const struct clk_ops si544_clk_ops = { .unprepare = si544_unprepare, .is_prepared = si544_is_prepared, .recalc_rate = si544_recalc_rate, - .round_rate = si544_round_rate, + .determine_rate = si544_determine_rate, .set_rate = si544_set_rate, }; From 3859ce9eeb326ebda5d5dd1ca4db733da6c9891f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:37 -0400 Subject: [PATCH 050/120] clk: si570: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-si570.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/clk/clk-si570.c b/drivers/clk/clk-si570.c index e97fe90443a6..b0b1830dd430 100644 --- a/drivers/clk/clk-si570.c +++ b/drivers/clk/clk-si570.c @@ -246,34 +246,40 @@ static unsigned long si570_recalc_rate(struct clk_hw *hw, return rate; } -static long si570_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si570_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int err; u64 rfreq; unsigned int n1, hs_div; struct clk_si570 *data = to_clk_si570(hw); - if (!rate) - return 0; + if (!req->rate) { + req->rate = 0; - if (div64_u64(abs(rate - data->frequency) * 10000LL, + return 0; + } + + if (div64_u64(abs(req->rate - data->frequency) * 10000LL, data->frequency) < 35) { - rfreq = div64_u64((data->rfreq * rate) + - div64_u64(data->frequency, 2), data->frequency); + rfreq = div64_u64((data->rfreq * req->rate) + + div64_u64(data->frequency, 2), + data->frequency); n1 = data->n1; hs_div = data->hs_div; } else { - err = si570_calc_divs(rate, data, &rfreq, &n1, &hs_div); + err = si570_calc_divs(req->rate, data, &rfreq, &n1, &hs_div); if (err) { dev_err(&data->i2c_client->dev, "unable to round rate\n"); + req->rate = 0; + return 0; } } - return rate; + return 0; } /** @@ -368,7 +374,7 @@ static int si570_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops si570_clk_ops = { .recalc_rate = si570_recalc_rate, - .round_rate = si570_round_rate, + .determine_rate = si570_determine_rate, .set_rate = si570_set_rate, }; From ff04a06db62669d8c4b69ebb02812b2a9f21d4b8 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:38 -0400 Subject: [PATCH 051/120] clk: sifive: sifive-prci: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Note that the changes to the three header files were done by hand. Reviewed-by: Samuel Holland Signed-off-by: Brian Masney --- drivers/clk/sifive/fu540-prci.h | 2 +- drivers/clk/sifive/fu740-prci.h | 2 +- drivers/clk/sifive/sifive-prci.c | 11 ++++++----- drivers/clk/sifive/sifive-prci.h | 4 ++-- 4 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/clk/sifive/fu540-prci.h b/drivers/clk/sifive/fu540-prci.h index e0173324f3c5..d45193c210b4 100644 --- a/drivers/clk/sifive/fu540-prci.h +++ b/drivers/clk/sifive/fu540-prci.h @@ -49,7 +49,7 @@ static struct __prci_wrpll_data sifive_fu540_prci_gemgxlpll_data = { static const struct clk_ops sifive_fu540_prci_wrpll_clk_ops = { .set_rate = sifive_prci_wrpll_set_rate, - .round_rate = sifive_prci_wrpll_round_rate, + .determine_rate = sifive_prci_wrpll_determine_rate, .recalc_rate = sifive_prci_wrpll_recalc_rate, .enable = sifive_prci_clock_enable, .disable = sifive_prci_clock_disable, diff --git a/drivers/clk/sifive/fu740-prci.h b/drivers/clk/sifive/fu740-prci.h index f31cd30fc395..c605a899d97d 100644 --- a/drivers/clk/sifive/fu740-prci.h +++ b/drivers/clk/sifive/fu740-prci.h @@ -55,7 +55,7 @@ static struct __prci_wrpll_data sifive_fu740_prci_cltxpll_data = { static const struct clk_ops sifive_fu740_prci_wrpll_clk_ops = { .set_rate = sifive_prci_wrpll_set_rate, - .round_rate = sifive_prci_wrpll_round_rate, + .determine_rate = sifive_prci_wrpll_determine_rate, .recalc_rate = sifive_prci_wrpll_recalc_rate, .enable = sifive_prci_clock_enable, .disable = sifive_prci_clock_disable, diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index caba0400f8a2..4d1cc7adb2b3 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -183,9 +183,8 @@ unsigned long sifive_prci_wrpll_recalc_rate(struct clk_hw *hw, return wrpll_calc_output_rate(&pwd->c, parent_rate); } -long sifive_prci_wrpll_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *parent_rate) +int sifive_prci_wrpll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct __prci_clock *pc = clk_hw_to_prci_clock(hw); struct __prci_wrpll_data *pwd = pc->pwd; @@ -193,9 +192,11 @@ long sifive_prci_wrpll_round_rate(struct clk_hw *hw, memcpy(&c, &pwd->c, sizeof(c)); - wrpll_configure_for_rate(&c, rate, *parent_rate); + wrpll_configure_for_rate(&c, req->rate, req->best_parent_rate); - return wrpll_calc_output_rate(&c, *parent_rate); + req->rate = wrpll_calc_output_rate(&c, req->best_parent_rate); + + return 0; } int sifive_prci_wrpll_set_rate(struct clk_hw *hw, diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h index 91658a88af4e..d74b2bddd08a 100644 --- a/drivers/clk/sifive/sifive-prci.h +++ b/drivers/clk/sifive/sifive-prci.h @@ -291,8 +291,8 @@ void sifive_prci_hfpclkpllsel_use_hfclk(struct __prci_data *pd); void sifive_prci_hfpclkpllsel_use_hfpclkpll(struct __prci_data *pd); /* Linux clock framework integration */ -long sifive_prci_wrpll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate); +int sifive_prci_wrpll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req); int sifive_prci_wrpll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate); int sifive_clk_is_enabled(struct clk_hw *hw); From 897c23b906cdc271380cef55ea81301f0dd70593 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:39 -0400 Subject: [PATCH 052/120] clk: sophgo: cv18xx-ip: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Alexander Sverdlin Signed-off-by: Brian Masney --- drivers/clk/sophgo/clk-cv18xx-ip.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/sophgo/clk-cv18xx-ip.c b/drivers/clk/sophgo/clk-cv18xx-ip.c index b186e64d4813..c2b58faf0938 100644 --- a/drivers/clk/sophgo/clk-cv18xx-ip.c +++ b/drivers/clk/sophgo/clk-cv18xx-ip.c @@ -45,10 +45,12 @@ static unsigned long gate_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long gate_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int gate_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return *parent_rate; + req->rate = req->best_parent_rate; + + return 0; } static int gate_set_rate(struct clk_hw *hw, unsigned long rate, @@ -63,7 +65,7 @@ const struct clk_ops cv1800_clk_gate_ops = { .is_enabled = gate_is_enabled, .recalc_rate = gate_recalc_rate, - .round_rate = gate_round_rate, + .determine_rate = gate_determine_rate, .set_rate = gate_set_rate, }; From 19271e0d45221ce5767cd9ba50334f8479f09b3a Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:44 -0400 Subject: [PATCH 053/120] clk: sparx5: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-sparx5.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-sparx5.c b/drivers/clk/clk-sparx5.c index 0fad0c1a0186..b2facc9c95d4 100644 --- a/drivers/clk/clk-sparx5.c +++ b/drivers/clk/clk-sparx5.c @@ -213,19 +213,21 @@ static unsigned long s5_pll_recalc_rate(struct clk_hw *hw, return conf.freq; } -static long s5_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int s5_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct s5_pll_conf conf; - return s5_calc_params(rate, *parent_rate, &conf); + req->rate = s5_calc_params(req->rate, req->best_parent_rate, &conf); + + return 0; } static const struct clk_ops s5_pll_ops = { .enable = s5_pll_enable, .disable = s5_pll_disable, .set_rate = s5_pll_set_rate, - .round_rate = s5_pll_round_rate, + .determine_rate = s5_pll_determine_rate, .recalc_rate = s5_pll_recalc_rate, }; From deb4740a5ff89957309b0479210af7448f1846f2 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:45 -0400 Subject: [PATCH 054/120] clk: sprd: div: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Chunyan Zhang Signed-off-by: Brian Masney --- drivers/clk/sprd/div.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/clk/sprd/div.c b/drivers/clk/sprd/div.c index 936782c24127..013423881968 100644 --- a/drivers/clk/sprd/div.c +++ b/drivers/clk/sprd/div.c @@ -9,13 +9,16 @@ #include "div.h" -static long sprd_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int sprd_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sprd_div *cd = hw_to_sprd_div(hw); - return divider_round_rate(&cd->common.hw, rate, parent_rate, NULL, - cd->div.width, 0); + req->rate = divider_round_rate(&cd->common.hw, req->rate, + &req->best_parent_rate, + NULL, cd->div.width, 0); + + return 0; } unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common, @@ -75,7 +78,7 @@ static int sprd_div_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops sprd_div_ops = { .recalc_rate = sprd_div_recalc_rate, - .round_rate = sprd_div_round_rate, + .determine_rate = sprd_div_determine_rate, .set_rate = sprd_div_set_rate, }; EXPORT_SYMBOL_GPL(sprd_div_ops); From c349d81d6b9a0d5edcfd6183078cd18957fb0ea6 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:46 -0400 Subject: [PATCH 055/120] clk: sprd: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Chunyan Zhang Signed-off-by: Brian Masney --- drivers/clk/sprd/pll.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c index 13a322b2535a..bc6610d5fcb7 100644 --- a/drivers/clk/sprd/pll.c +++ b/drivers/clk/sprd/pll.c @@ -254,16 +254,16 @@ static int sprd_pll_clk_prepare(struct clk_hw *hw) return 0; } -static long sprd_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int sprd_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return rate; + return 0; } const struct clk_ops sprd_pll_ops = { .prepare = sprd_pll_clk_prepare, .recalc_rate = sprd_pll_recalc_rate, - .round_rate = sprd_pll_round_rate, + .determine_rate = sprd_pll_determine_rate, .set_rate = sprd_pll_set_rate, }; EXPORT_SYMBOL_GPL(sprd_pll_ops); From 78d4c18e636833cfd3670ddd96d42d0d21318769 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:47 -0400 Subject: [PATCH 056/120] clk: st: clkgen-fsyn: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/st/clkgen-fsyn.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index 40df1db102a7..e06e7e5cc1a5 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -375,22 +375,21 @@ static int clk_fs660c32_vco_get_params(unsigned long input, return 0; } -static long quadfs_pll_fs660c32_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *prate) +static int quadfs_pll_fs660c32_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct stm_fs params; - if (clk_fs660c32_vco_get_params(*prate, rate, ¶ms)) - return rate; + if (clk_fs660c32_vco_get_params(req->best_parent_rate, req->rate, ¶ms)) + return 0; - clk_fs660c32_vco_get_rate(*prate, ¶ms, &rate); + clk_fs660c32_vco_get_rate(req->best_parent_rate, ¶ms, &req->rate); pr_debug("%s: %s new rate %ld [ndiv=%u]\n", __func__, clk_hw_get_name(hw), - rate, (unsigned int)params.ndiv); + req->rate, (unsigned int)params.ndiv); - return rate; + return 0; } static int quadfs_pll_fs660c32_set_rate(struct clk_hw *hw, unsigned long rate, @@ -436,7 +435,7 @@ static const struct clk_ops st_quadfs_pll_c32_ops = { .disable = quadfs_pll_disable, .is_enabled = quadfs_pll_is_enabled, .recalc_rate = quadfs_pll_fs660c32_recalc_rate, - .round_rate = quadfs_pll_fs660c32_round_rate, + .determine_rate = quadfs_pll_fs660c32_determine_rate, .set_rate = quadfs_pll_fs660c32_set_rate, }; @@ -814,19 +813,21 @@ static unsigned long quadfs_recalc_rate(struct clk_hw *hw, return rate; } -static long quadfs_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int quadfs_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct stm_fs params; - rate = quadfs_find_best_rate(hw, rate, *prate, ¶ms); + req->rate = quadfs_find_best_rate(hw, req->rate, + req->best_parent_rate, ¶ms); pr_debug("%s: %s new rate %ld [sdiv=0x%x,md=0x%x,pe=0x%x,nsdiv3=%u]\n", __func__, clk_hw_get_name(hw), - rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv, - (unsigned int)params.pe, (unsigned int)params.nsdiv); + req->rate, (unsigned int)params.sdiv, + (unsigned int)params.mdiv, + (unsigned int)params.pe, (unsigned int)params.nsdiv); - return rate; + return 0; } @@ -873,7 +874,7 @@ static const struct clk_ops st_quadfs_ops = { .enable = quadfs_fsynth_enable, .disable = quadfs_fsynth_disable, .is_enabled = quadfs_fsynth_is_enabled, - .round_rate = quadfs_round_rate, + .determine_rate = quadfs_determine_rate, .set_rate = quadfs_set_rate, .recalc_rate = quadfs_recalc_rate, }; From 639baa3ce27f43224a9e7904d85395935dd4b04f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:48 -0400 Subject: [PATCH 057/120] clk: st: clkgen-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Note that prior to running the Coccinelle: - round_rate_stm_pll4600c28() was renamed to stm_pll4600c28_round_rate() - round_rate_stm_pll3200c32() was renamed to stm_pll3200c32_round_rate() Signed-off-by: Brian Masney --- drivers/clk/st/clkgen-pll.c | 38 +++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index b36e4d803636..c258ff87a171 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c @@ -395,25 +395,28 @@ static unsigned long recalc_stm_pll3200c32(struct clk_hw *hw, return rate; } -static long round_rate_stm_pll3200c32(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int stm_pll3200c32_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct stm_pll params; - if (!clk_pll3200c32_get_params(*prate, rate, ¶ms)) - clk_pll3200c32_get_rate(*prate, ¶ms, &rate); + if (!clk_pll3200c32_get_params(req->best_parent_rate, req->rate, ¶ms)) + clk_pll3200c32_get_rate(req->best_parent_rate, ¶ms, + &req->rate); else { pr_debug("%s: %s rate %ld Invalid\n", __func__, - __clk_get_name(hw->clk), rate); + __clk_get_name(hw->clk), req->rate); + req->rate = 0; + return 0; } pr_debug("%s: %s new rate %ld [ndiv=%u] [idf=%u]\n", __func__, __clk_get_name(hw->clk), - rate, (unsigned int)params.ndiv, + req->rate, (unsigned int)params.ndiv, (unsigned int)params.idf); - return rate; + return 0; } static int set_rate_stm_pll3200c32(struct clk_hw *hw, unsigned long rate, @@ -549,25 +552,28 @@ static unsigned long recalc_stm_pll4600c28(struct clk_hw *hw, return rate; } -static long round_rate_stm_pll4600c28(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int stm_pll4600c28_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct stm_pll params; - if (!clk_pll4600c28_get_params(*prate, rate, ¶ms)) { - clk_pll4600c28_get_rate(*prate, ¶ms, &rate); + if (!clk_pll4600c28_get_params(req->best_parent_rate, req->rate, ¶ms)) { + clk_pll4600c28_get_rate(req->best_parent_rate, ¶ms, + &req->rate); } else { pr_debug("%s: %s rate %ld Invalid\n", __func__, - __clk_get_name(hw->clk), rate); + __clk_get_name(hw->clk), req->rate); + req->rate = 0; + return 0; } pr_debug("%s: %s new rate %ld [ndiv=%u] [idf=%u]\n", __func__, __clk_get_name(hw->clk), - rate, (unsigned int)params.ndiv, + req->rate, (unsigned int)params.ndiv, (unsigned int)params.idf); - return rate; + return 0; } static int set_rate_stm_pll4600c28(struct clk_hw *hw, unsigned long rate, @@ -628,7 +634,7 @@ static const struct clk_ops stm_pll3200c32_a9_ops = { .disable = clkgen_pll_disable, .is_enabled = clkgen_pll_is_enabled, .recalc_rate = recalc_stm_pll3200c32, - .round_rate = round_rate_stm_pll3200c32, + .determine_rate = stm_pll3200c32_determine_rate, .set_rate = set_rate_stm_pll3200c32, }; @@ -637,7 +643,7 @@ static const struct clk_ops stm_pll4600c28_ops = { .disable = clkgen_pll_disable, .is_enabled = clkgen_pll_is_enabled, .recalc_rate = recalc_stm_pll4600c28, - .round_rate = round_rate_stm_pll4600c28, + .determine_rate = stm_pll4600c28_determine_rate, .set_rate = set_rate_stm_pll4600c28, }; From 028b0eb1c9e66470f9a15e758a3757d13911919b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:49 -0400 Subject: [PATCH 058/120] clk: stm32f4: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-stm32f4.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 719cddc82ae6..b5d4d48432a0 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -443,8 +443,8 @@ static unsigned long clk_apb_mul_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long clk_apb_mul_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_apb_mul_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_apb_mul *am = to_clk_apb_mul(hw); unsigned long mult = 1; @@ -453,12 +453,14 @@ static long clk_apb_mul_round_rate(struct clk_hw *hw, unsigned long rate, mult = 2; if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { - unsigned long best_parent = rate / mult; + unsigned long best_parent = req->rate / mult; - *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); + req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); } - return *prate * mult; + req->rate = req->best_parent_rate * mult; + + return 0; } static int clk_apb_mul_set_rate(struct clk_hw *hw, unsigned long rate, @@ -474,7 +476,7 @@ static int clk_apb_mul_set_rate(struct clk_hw *hw, unsigned long rate, } static const struct clk_ops clk_apb_mul_factor_ops = { - .round_rate = clk_apb_mul_round_rate, + .determine_rate = clk_apb_mul_determine_rate, .set_rate = clk_apb_mul_set_rate, .recalc_rate = clk_apb_mul_recalc_rate, }; @@ -670,21 +672,23 @@ static unsigned long stm32f4_pll_recalc(struct clk_hw *hw, return parent_rate * n; } -static long stm32f4_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int stm32f4_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_gate *gate = to_clk_gate(hw); struct stm32f4_pll *pll = to_stm32f4_pll(gate); unsigned long n; - n = rate / *prate; + n = req->rate / req->best_parent_rate; if (n < pll->n_start) n = pll->n_start; else if (n > 432) n = 432; - return *prate * n; + req->rate = req->best_parent_rate * n; + + return 0; } static void stm32f4_pll_set_ssc(struct clk_hw *hw, unsigned long parent_rate, @@ -749,7 +753,7 @@ static const struct clk_ops stm32f4_pll_gate_ops = { .disable = stm32f4_pll_disable, .is_enabled = stm32f4_pll_is_enabled, .recalc_rate = stm32f4_pll_recalc, - .round_rate = stm32f4_pll_round_rate, + .determine_rate = stm32f4_pll_determine_rate, .set_rate = stm32f4_pll_set_rate, }; From cd1cb38836c0fc597718f300f7d19fcea1117a3c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:50 -0400 Subject: [PATCH 059/120] clk: stm32: stm32-core: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Gabriel Fernandez Signed-off-by: Brian Masney --- drivers/clk/stm32/clk-stm32-core.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c index 933e3cde0795..72825b9c36a4 100644 --- a/drivers/clk/stm32/clk-stm32-core.c +++ b/drivers/clk/stm32/clk-stm32-core.c @@ -351,14 +351,14 @@ static int clk_stm32_divider_set_rate(struct clk_hw *hw, unsigned long rate, return ret; } -static long clk_stm32_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_stm32_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_stm32_div *div = to_clk_stm32_divider(hw); const struct stm32_div_cfg *divider; if (div->div_id == NO_STM32_DIV) - return rate; + return 0; divider = &div->clock_data->dividers[div->div_id]; @@ -369,14 +369,22 @@ static long clk_stm32_divider_round_rate(struct clk_hw *hw, unsigned long rate, val = readl(div->base + divider->offset) >> divider->shift; val &= clk_div_mask(divider->width); - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); + req->rate = divider_ro_round_rate(hw, req->rate, + &req->best_parent_rate, + divider->table, + divider->width, + divider->flags, val); + + return 0; } - return divider_round_rate_parent(hw, clk_hw_get_parent(hw), - rate, prate, divider->table, - divider->width, divider->flags); + req->rate = divider_round_rate_parent(hw, clk_hw_get_parent(hw), + req->rate, + &req->best_parent_rate, + divider->table, + divider->width, divider->flags); + + return 0; } static unsigned long clk_stm32_divider_recalc_rate(struct clk_hw *hw, @@ -392,7 +400,7 @@ static unsigned long clk_stm32_divider_recalc_rate(struct clk_hw *hw, const struct clk_ops clk_stm32_divider_ops = { .recalc_rate = clk_stm32_divider_recalc_rate, - .round_rate = clk_stm32_divider_round_rate, + .determine_rate = clk_stm32_divider_determine_rate, .set_rate = clk_stm32_divider_set_rate, }; From 81c438b53bfdcf915475c14e9e3ad409c665de06 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:51 -0400 Subject: [PATCH 060/120] clk: stm32: stm32mp1: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Gabriel Fernandez Signed-off-by: Brian Masney --- drivers/clk/stm32/clk-stm32mp1.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index b8b45ed22f98..2d9ccd96ec98 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -970,12 +970,15 @@ static unsigned long __bestmult(struct clk_hw *hw, unsigned long rate, return mult; } -static long timer_ker_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int timer_ker_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long factor = __bestmult(hw, rate, *parent_rate); + unsigned long factor = __bestmult(hw, req->rate, + req->best_parent_rate); - return *parent_rate * factor; + req->rate = req->best_parent_rate * factor; + + return 0; } static int timer_ker_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1026,7 +1029,7 @@ static unsigned long timer_ker_recalc_rate(struct clk_hw *hw, static const struct clk_ops timer_ker_ops = { .recalc_rate = timer_ker_recalc_rate, - .round_rate = timer_ker_round_rate, + .determine_rate = timer_ker_determine_rate, .set_rate = timer_ker_set_rate, }; From eb785c6f395b98f4d1b6c8e2575e03676711736d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:52 -0400 Subject: [PATCH 061/120] clk: tps68470: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-tps68470.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-tps68470.c b/drivers/clk/clk-tps68470.c index 38f44b5b9b1b..9511248c6bc9 100644 --- a/drivers/clk/clk-tps68470.c +++ b/drivers/clk/clk-tps68470.c @@ -146,12 +146,14 @@ static unsigned int tps68470_clk_cfg_lookup(unsigned long rate) return best_idx; } -static long tps68470_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int tps68470_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned int idx = tps68470_clk_cfg_lookup(rate); + unsigned int idx = tps68470_clk_cfg_lookup(req->rate); - return clk_freqs[idx].freq; + req->rate = clk_freqs[idx].freq; + + return 0; } static int tps68470_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -186,7 +188,7 @@ static const struct clk_ops tps68470_clk_ops = { .prepare = tps68470_clk_prepare, .unprepare = tps68470_clk_unprepare, .recalc_rate = tps68470_clk_recalc_rate, - .round_rate = tps68470_clk_round_rate, + .determine_rate = tps68470_clk_determine_rate, .set_rate = tps68470_clk_set_rate, }; From 9e3372b2ebac86591a41151bdd073a9942ca9a46 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:53 -0400 Subject: [PATCH 062/120] clk: versaclock3: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-versaclock3.c | 70 ++++++++++++++++++++--------------- 1 file changed, 41 insertions(+), 29 deletions(-) diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c index 9fe27dace111..1849863dbd67 100644 --- a/drivers/clk/clk-versaclock3.c +++ b/drivers/clk/clk-versaclock3.c @@ -289,22 +289,25 @@ static unsigned long vc3_pfd_recalc_rate(struct clk_hw *hw, return rate; } -static long vc3_pfd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc3_pfd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw); const struct vc3_pfd_data *pfd = vc3->data; unsigned long idiv; /* PLL cannot operate with input clock above 50 MHz. */ - if (rate > 50000000) + if (req->rate > 50000000) return -EINVAL; /* CLKIN within range of PLL input, feed directly to PLL. */ - if (*parent_rate <= 50000000) - return *parent_rate; + if (req->best_parent_rate <= 50000000) { + req->rate = req->best_parent_rate; - idiv = DIV_ROUND_UP(*parent_rate, rate); + return 0; + } + + idiv = DIV_ROUND_UP(req->best_parent_rate, req->rate); if (pfd->num == VC3_PFD1 || pfd->num == VC3_PFD3) { if (idiv > 63) return -EINVAL; @@ -313,7 +316,9 @@ static long vc3_pfd_round_rate(struct clk_hw *hw, unsigned long rate, return -EINVAL; } - return *parent_rate / idiv; + req->rate = req->best_parent_rate / idiv; + + return 0; } static int vc3_pfd_set_rate(struct clk_hw *hw, unsigned long rate, @@ -354,7 +359,7 @@ static int vc3_pfd_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc3_pfd_ops = { .recalc_rate = vc3_pfd_recalc_rate, - .round_rate = vc3_pfd_round_rate, + .determine_rate = vc3_pfd_determine_rate, .set_rate = vc3_pfd_set_rate, }; @@ -385,36 +390,38 @@ static unsigned long vc3_pll_recalc_rate(struct clk_hw *hw, return rate; } -static long vc3_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc3_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw); const struct vc3_pll_data *pll = vc3->data; u64 div_frc; - if (rate < pll->vco.min) - rate = pll->vco.min; - if (rate > pll->vco.max) - rate = pll->vco.max; + if (req->rate < pll->vco.min) + req->rate = pll->vco.min; + if (req->rate > pll->vco.max) + req->rate = pll->vco.max; - vc3->div_int = rate / *parent_rate; + vc3->div_int = req->rate / req->best_parent_rate; if (pll->num == VC3_PLL2) { if (vc3->div_int > 0x7ff) - rate = *parent_rate * 0x7ff; + req->rate = req->best_parent_rate * 0x7ff; /* Determine best fractional part, which is 16 bit wide */ - div_frc = rate % *parent_rate; + div_frc = req->rate % req->best_parent_rate; div_frc *= BIT(16) - 1; - vc3->div_frc = min_t(u64, div64_ul(div_frc, *parent_rate), U16_MAX); - rate = (*parent_rate * - (vc3->div_int * VC3_2_POW_16 + vc3->div_frc) / VC3_2_POW_16); + vc3->div_frc = min_t(u64, + div64_ul(div_frc, req->best_parent_rate), + U16_MAX); + req->rate = (req->best_parent_rate * + (vc3->div_int * VC3_2_POW_16 + vc3->div_frc) / VC3_2_POW_16); } else { - rate = *parent_rate * vc3->div_int; + req->rate = req->best_parent_rate * vc3->div_int; } - return rate; + return 0; } static int vc3_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -441,7 +448,7 @@ static int vc3_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc3_pll_ops = { .recalc_rate = vc3_pll_recalc_rate, - .round_rate = vc3_pll_round_rate, + .determine_rate = vc3_pll_determine_rate, .set_rate = vc3_pll_set_rate, }; @@ -498,8 +505,8 @@ static unsigned long vc3_div_recalc_rate(struct clk_hw *hw, div_data->flags, div_data->width); } -static long vc3_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc3_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw); const struct vc3_div_data *div_data = vc3->data; @@ -511,11 +518,16 @@ static long vc3_div_round_rate(struct clk_hw *hw, unsigned long rate, bestdiv >>= div_data->shift; bestdiv &= VC3_DIV_MASK(div_data->width); bestdiv = vc3_get_div(div_data->table, bestdiv, div_data->flags); - return DIV_ROUND_UP(*parent_rate, bestdiv); + req->rate = DIV_ROUND_UP(req->best_parent_rate, bestdiv); + + return 0; } - return divider_round_rate(hw, rate, parent_rate, div_data->table, - div_data->width, div_data->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + div_data->table, + div_data->width, div_data->flags); + + return 0; } static int vc3_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -534,7 +546,7 @@ static int vc3_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc3_div_ops = { .recalc_rate = vc3_div_recalc_rate, - .round_rate = vc3_div_round_rate, + .determine_rate = vc3_div_determine_rate, .set_rate = vc3_div_set_rate, }; From ff03cca71ebd54eba32ba7628bc7b3ee1cc2e79f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:54 -0400 Subject: [PATCH 063/120] clk: vt8500: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-vt8500.c | 59 ++++++++++++++++++++++++---------------- 1 file changed, 35 insertions(+), 24 deletions(-) diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index 2a74a713ad59..eae5b3fbfb82 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -128,30 +128,31 @@ static unsigned long vt8500_dclk_recalc_rate(struct clk_hw *hw, return parent_rate / div; } -static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int vt8500_dclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_device *cdev = to_clk_device(hw); u32 divisor; - if (rate == 0) + if (req->rate == 0) return 0; - divisor = *prate / rate; + divisor = req->best_parent_rate / req->rate; /* If prate / rate would be decimal, incr the divisor */ - if (rate * divisor < *prate) + if (req->rate * divisor < req->best_parent_rate) divisor++; /* * If this is a request for SDMMC we have to adjust the divisor * when >31 to use the fixed predivisor */ - if ((cdev->div_mask == 0x3F) && (divisor > 31)) { + if ((cdev->div_mask == 0x3F) && (divisor > 31)) divisor = 64 * ((divisor / 64) + 1); - } - return *prate / divisor; + req->rate = req->best_parent_rate / divisor; + + return 0; } static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -202,7 +203,7 @@ static const struct clk_ops vt8500_gated_clk_ops = { }; static const struct clk_ops vt8500_divisor_clk_ops = { - .round_rate = vt8500_dclk_round_rate, + .determine_rate = vt8500_dclk_determine_rate, .set_rate = vt8500_dclk_set_rate, .recalc_rate = vt8500_dclk_recalc_rate, }; @@ -211,7 +212,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = { .enable = vt8500_dclk_enable, .disable = vt8500_dclk_disable, .is_enabled = vt8500_dclk_is_enabled, - .round_rate = vt8500_dclk_round_rate, + .determine_rate = vt8500_dclk_determine_rate, .set_rate = vt8500_dclk_set_rate, .recalc_rate = vt8500_dclk_recalc_rate, }; @@ -594,8 +595,8 @@ static int vtwm_pll_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } -static long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int vtwm_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_pll *pll = to_clk_pll(hw); u32 filter, mul, div1, div2; @@ -604,33 +605,43 @@ static long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, switch (pll->type) { case PLL_TYPE_VT8500: - ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1); + ret = vt8500_find_pll_bits(req->rate, req->best_parent_rate, + &mul, &div1); if (!ret) - round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1); + round_rate = VT8500_BITS_TO_FREQ(req->best_parent_rate, + mul, div1); break; case PLL_TYPE_WM8650: - ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2); + ret = wm8650_find_pll_bits(req->rate, req->best_parent_rate, + &mul, &div1, &div2); if (!ret) - round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); + round_rate = WM8650_BITS_TO_FREQ(req->best_parent_rate, + mul, div1, div2); break; case PLL_TYPE_WM8750: - ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); + ret = wm8750_find_pll_bits(req->rate, req->best_parent_rate, + &filter, &mul, &div1, &div2); if (!ret) - round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2); + round_rate = WM8750_BITS_TO_FREQ(req->best_parent_rate, + mul, div1, div2); break; case PLL_TYPE_WM8850: - ret = wm8850_find_pll_bits(rate, *prate, &mul, &div1, &div2); + ret = wm8850_find_pll_bits(req->rate, req->best_parent_rate, + &mul, &div1, &div2); if (!ret) - round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2); + round_rate = WM8850_BITS_TO_FREQ(req->best_parent_rate, + mul, div1, div2); break; default: - ret = -EINVAL; + return -EINVAL; } if (ret) - return ret; + req->rate = ret; + else + req->rate = round_rate; - return round_rate; + return 0; } static unsigned long vtwm_pll_recalc_rate(struct clk_hw *hw, @@ -665,7 +676,7 @@ static unsigned long vtwm_pll_recalc_rate(struct clk_hw *hw, } static const struct clk_ops vtwm_pll_ops = { - .round_rate = vtwm_pll_round_rate, + .determine_rate = vtwm_pll_determine_rate, .set_rate = vtwm_pll_set_rate, .recalc_rate = vtwm_pll_recalc_rate, }; From d616db080a0b9e006c2b3f57a2a8f3bfc67dc8e0 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:55 -0400 Subject: [PATCH 064/120] clk: wm831x: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Richard Fitzgerald Signed-off-by: Brian Masney --- drivers/clk/clk-wm831x.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c index 34e9d4d541e2..263e927138c2 100644 --- a/drivers/clk/clk-wm831x.c +++ b/drivers/clk/clk-wm831x.c @@ -133,18 +133,20 @@ static unsigned long wm831x_fll_recalc_rate(struct clk_hw *hw, return 0; } -static long wm831x_fll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *unused) +static int wm831x_fll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int best = 0; int i; for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++) - if (abs(wm831x_fll_auto_rates[i] - rate) < - abs(wm831x_fll_auto_rates[best] - rate)) + if (abs(wm831x_fll_auto_rates[i] - req->rate) < + abs(wm831x_fll_auto_rates[best] - req->rate)) best = i; - return wm831x_fll_auto_rates[best]; + req->rate = wm831x_fll_auto_rates[best]; + + return 0; } static int wm831x_fll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -214,7 +216,7 @@ static const struct clk_ops wm831x_fll_ops = { .is_prepared = wm831x_fll_is_prepared, .prepare = wm831x_fll_prepare, .unprepare = wm831x_fll_unprepare, - .round_rate = wm831x_fll_round_rate, + .determine_rate = wm831x_fll_determine_rate, .recalc_rate = wm831x_fll_recalc_rate, .set_rate = wm831x_fll_set_rate, .get_parent = wm831x_fll_get_parent, From f95ed76fbe61ee473ed682f93de3578cf6c60a1a Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:57 -0400 Subject: [PATCH 065/120] clk: xgene: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-xgene.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c index 96946a8e2854..92e39f3237c2 100644 --- a/drivers/clk/clk-xgene.c +++ b/drivers/clk/clk-xgene.c @@ -271,23 +271,28 @@ static unsigned long xgene_clk_pmd_recalc_rate(struct clk_hw *hw, return ret; } -static long xgene_clk_pmd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int xgene_clk_pmd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct xgene_clk_pmd *fd = to_xgene_clk_pmd(hw); u64 ret, scale; - if (!rate || rate >= *parent_rate) - return *parent_rate; + if (!req->rate || req->rate >= req->best_parent_rate) { + req->rate = req->best_parent_rate; + + return 0; + } /* freq = parent_rate * scaler / denom */ - ret = rate * fd->denom; - scale = DIV_ROUND_UP_ULL(ret, *parent_rate); + ret = req->rate * fd->denom; + scale = DIV_ROUND_UP_ULL(ret, req->best_parent_rate); - ret = (u64)*parent_rate * scale; + ret = (u64)req->best_parent_rate * scale; do_div(ret, fd->denom); - return ret; + req->rate = ret; + + return 0; } static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate, @@ -333,7 +338,7 @@ static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops xgene_clk_pmd_ops = { .recalc_rate = xgene_clk_pmd_recalc_rate, - .round_rate = xgene_clk_pmd_round_rate, + .determine_rate = xgene_clk_pmd_determine_rate, .set_rate = xgene_clk_pmd_set_rate, }; @@ -593,23 +598,25 @@ static int xgene_clk_set_rate(struct clk_hw *hw, unsigned long rate, return parent_rate / divider_save; } -static long xgene_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int xgene_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct xgene_clk *pclk = to_xgene_clk(hw); - unsigned long parent_rate = *prate; + unsigned long parent_rate = req->best_parent_rate; u32 divider; if (pclk->param.divider_reg) { /* Let's compute the divider */ - if (rate > parent_rate) - rate = parent_rate; - divider = parent_rate / rate; /* Rounded down */ + if (req->rate > parent_rate) + req->rate = parent_rate; + divider = parent_rate / req->rate; /* Rounded down */ } else { divider = 1; } - return parent_rate / divider; + req->rate = parent_rate / divider; + + return 0; } static const struct clk_ops xgene_clk_ops = { @@ -618,7 +625,7 @@ static const struct clk_ops xgene_clk_ops = { .is_enabled = xgene_clk_is_enabled, .recalc_rate = xgene_clk_recalc_rate, .set_rate = xgene_clk_set_rate, - .round_rate = xgene_clk_round_rate, + .determine_rate = xgene_clk_determine_rate, }; static struct clk *xgene_register_clk(struct device *dev, From 18fdeebb4d1d3d30a0c2994e8150ce1f85e7d8c1 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:58 -0400 Subject: [PATCH 066/120] clk: xilinx: xlnx-clock-wizard: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 55 ++++++++++++---------- 1 file changed, 30 insertions(+), 25 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 0295a13a811c..3ee14770212a 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -322,8 +322,8 @@ err_reconfig: return err; } -static long clk_wzrd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_wzrd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u8 div; @@ -331,9 +331,11 @@ static long clk_wzrd_round_rate(struct clk_hw *hw, unsigned long rate, * since we don't change parent rate we just round rate to closest * achievable */ - div = DIV_ROUND_CLOSEST(*prate, rate); + div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); - return *prate / div; + req->rate = req->best_parent_rate / div; + + return 0; } static int clk_wzrd_get_divisors_ver(struct clk_hw *hw, unsigned long rate, @@ -642,14 +644,14 @@ static unsigned long clk_wzrd_recalc_rate_all_ver(struct clk_hw *hw, divider->flags, divider->width); } -static long clk_wzrd_round_rate_all(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_wzrd_determine_rate_all(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); u32 m, d, o; int err; - err = clk_wzrd_get_divisors(hw, rate, *prate); + err = clk_wzrd_get_divisors(hw, req->rate, req->best_parent_rate); if (err) return err; @@ -657,19 +659,20 @@ static long clk_wzrd_round_rate_all(struct clk_hw *hw, unsigned long rate, d = divider->d; o = divider->o; - rate = div_u64(*prate * (m * 1000 + divider->m_frac), d * (o * 1000 + divider->o_frac)); - return rate; + req->rate = div_u64(req->best_parent_rate * (m * 1000 + divider->m_frac), + d * (o * 1000 + divider->o_frac)); + return 0; } -static long clk_wzrd_ver_round_rate_all(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_wzrd_ver_determine_rate_all(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); unsigned long int_freq; u32 m, d, o, div, f; int err; - err = clk_wzrd_get_divisors_ver(hw, rate, *prate); + err = clk_wzrd_get_divisors_ver(hw, req->rate, req->best_parent_rate); if (err) return err; @@ -678,36 +681,38 @@ static long clk_wzrd_ver_round_rate_all(struct clk_hw *hw, unsigned long rate, o = divider->o; div = d * o; - int_freq = divider_recalc_rate(hw, *prate * m, div, divider->table, + int_freq = divider_recalc_rate(hw, req->best_parent_rate * m, div, + divider->table, divider->flags, divider->width); - if (rate > int_freq) { - f = DIV_ROUND_CLOSEST_ULL(rate * WZRD_FRAC_POINTS, int_freq); - rate = DIV_ROUND_CLOSEST(int_freq * f, WZRD_FRAC_POINTS); + if (req->rate > int_freq) { + f = DIV_ROUND_CLOSEST_ULL(req->rate * WZRD_FRAC_POINTS, + int_freq); + req->rate = DIV_ROUND_CLOSEST(int_freq * f, WZRD_FRAC_POINTS); } - return rate; + return 0; } static const struct clk_ops clk_wzrd_ver_divider_ops = { - .round_rate = clk_wzrd_round_rate, + .determine_rate = clk_wzrd_determine_rate, .set_rate = clk_wzrd_ver_dynamic_reconfig, .recalc_rate = clk_wzrd_recalc_rate_ver, }; static const struct clk_ops clk_wzrd_ver_div_all_ops = { - .round_rate = clk_wzrd_ver_round_rate_all, + .determine_rate = clk_wzrd_ver_determine_rate_all, .set_rate = clk_wzrd_dynamic_all_ver, .recalc_rate = clk_wzrd_recalc_rate_all_ver, }; static const struct clk_ops clk_wzrd_clk_divider_ops = { - .round_rate = clk_wzrd_round_rate, + .determine_rate = clk_wzrd_determine_rate, .set_rate = clk_wzrd_dynamic_reconfig, .recalc_rate = clk_wzrd_recalc_rate, }; static const struct clk_ops clk_wzrd_clk_div_all_ops = { - .round_rate = clk_wzrd_round_rate_all, + .determine_rate = clk_wzrd_determine_rate_all, .set_rate = clk_wzrd_dynamic_all, .recalc_rate = clk_wzrd_recalc_rate_all, }; @@ -769,14 +774,14 @@ static int clk_wzrd_dynamic_reconfig_f(struct clk_hw *hw, unsigned long rate, WZRD_USEC_POLL, WZRD_TIMEOUT_POLL); } -static long clk_wzrd_round_rate_f(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_wzrd_determine_rate_f(struct clk_hw *hw, + struct clk_rate_request *req) { - return rate; + return 0; } static const struct clk_ops clk_wzrd_clk_divider_ops_f = { - .round_rate = clk_wzrd_round_rate_f, + .determine_rate = clk_wzrd_determine_rate_f, .set_rate = clk_wzrd_dynamic_reconfig_f, .recalc_rate = clk_wzrd_recalc_ratef, }; From 5352b65041cbb546d8c4d386762370e6ad0d1f42 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:18:59 -0400 Subject: [PATCH 067/120] clk: xilinx: xlnx_vcu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/xilinx/xlnx_vcu.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c index 1ded67bee06c..02699bc0f82c 100644 --- a/drivers/clk/xilinx/xlnx_vcu.c +++ b/drivers/clk/xilinx/xlnx_vcu.c @@ -311,18 +311,21 @@ static int xvcu_pll_set_div(struct vcu_pll *pll, int div) return 0; } -static long xvcu_pll_round_rate(struct clk_hw *hw, - unsigned long rate, unsigned long *parent_rate) +static int xvcu_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vcu_pll *pll = to_vcu_pll(hw); unsigned int feedback_div; - rate = clamp_t(unsigned long, rate, pll->fvco_min, pll->fvco_max); + req->rate = clamp_t(unsigned long, req->rate, pll->fvco_min, + pll->fvco_max); - feedback_div = DIV_ROUND_CLOSEST_ULL(rate, *parent_rate); + feedback_div = DIV_ROUND_CLOSEST_ULL(req->rate, req->best_parent_rate); feedback_div = clamp_t(unsigned int, feedback_div, 25, 125); - return *parent_rate * feedback_div; + req->rate = req->best_parent_rate * feedback_div; + + return 0; } static unsigned long xvcu_pll_recalc_rate(struct clk_hw *hw, @@ -394,7 +397,7 @@ static void xvcu_pll_disable(struct clk_hw *hw) static const struct clk_ops vcu_pll_ops = { .enable = xvcu_pll_enable, .disable = xvcu_pll_disable, - .round_rate = xvcu_pll_round_rate, + .determine_rate = xvcu_pll_determine_rate, .recalc_rate = xvcu_pll_recalc_rate, .set_rate = xvcu_pll_set_rate, }; From 193650c7a87339da14e34b5fe81585535ee77708 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:01 -0400 Subject: [PATCH 068/120] clk: zynqmp: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/zynqmp/pll.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 7411a7fd50ac..630a3936c97c 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -98,29 +98,29 @@ static inline void zynqmp_pll_set_mode(struct clk_hw *hw, bool on) * * Return: Frequency closest to @rate the hardware can generate */ -static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int zynqmp_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 fbdiv; u32 mult, div; /* Let rate fall inside the range PS_PLL_VCO_MIN ~ PS_PLL_VCO_MAX */ - if (rate > PS_PLL_VCO_MAX) { - div = DIV_ROUND_UP(rate, PS_PLL_VCO_MAX); - rate = rate / div; + if (req->rate > PS_PLL_VCO_MAX) { + div = DIV_ROUND_UP(req->rate, PS_PLL_VCO_MAX); + req->rate = req->rate / div; } - if (rate < PS_PLL_VCO_MIN) { - mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate); - rate = rate * mult; + if (req->rate < PS_PLL_VCO_MIN) { + mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, req->rate); + req->rate = req->rate * mult; } - fbdiv = DIV_ROUND_CLOSEST(rate, *prate); + fbdiv = DIV_ROUND_CLOSEST(req->rate, req->best_parent_rate); if (fbdiv < PLL_FBDIV_MIN || fbdiv > PLL_FBDIV_MAX) { fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX); - rate = *prate * fbdiv; + req->rate = req->best_parent_rate * fbdiv; } - return rate; + return 0; } /** @@ -294,7 +294,7 @@ static const struct clk_ops zynqmp_pll_ops = { .enable = zynqmp_pll_enable, .disable = zynqmp_pll_disable, .is_enabled = zynqmp_pll_is_enabled, - .round_rate = zynqmp_pll_round_rate, + .determine_rate = zynqmp_pll_determine_rate, .recalc_rate = zynqmp_pll_recalc_rate, .set_rate = zynqmp_pll_set_rate, }; From 1547747b55d5d6c045cd94f4c4595b8f38d3b21c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:02 -0400 Subject: [PATCH 069/120] clk: zynq: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/zynq/pll.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c index e5f8fb704df2..5eca1c14981a 100644 --- a/drivers/clk/zynq/pll.c +++ b/drivers/clk/zynq/pll.c @@ -48,18 +48,20 @@ struct zynq_pll { * @prate: Clock frequency of parent clock * Return: frequency closest to @rate the hardware can generate. */ -static long zynq_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int zynq_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 fbdiv; - fbdiv = DIV_ROUND_CLOSEST(rate, *prate); + fbdiv = DIV_ROUND_CLOSEST(req->rate, req->best_parent_rate); if (fbdiv < PLL_FBDIV_MIN) fbdiv = PLL_FBDIV_MIN; else if (fbdiv > PLL_FBDIV_MAX) fbdiv = PLL_FBDIV_MAX; - return *prate * fbdiv; + req->rate = req->best_parent_rate * fbdiv; + + return 0; } /** @@ -167,7 +169,7 @@ static const struct clk_ops zynq_pll_ops = { .enable = zynq_pll_enable, .disable = zynq_pll_disable, .is_enabled = zynq_pll_is_enabled, - .round_rate = zynq_pll_round_rate, + .determine_rate = zynq_pll_determine_rate, .recalc_rate = zynq_pll_recalc_rate }; From 151831541ae0f2a5d207a152a510b9ff5e8105cc Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:03 -0400 Subject: [PATCH 070/120] clk: actions: owl-composite: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/actions/owl-composite.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/actions/owl-composite.c b/drivers/clk/actions/owl-composite.c index 48f177f6ce9c..00b74f8bc437 100644 --- a/drivers/clk/actions/owl-composite.c +++ b/drivers/clk/actions/owl-composite.c @@ -122,13 +122,13 @@ static int owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate, rate, parent_rate); } -static long owl_comp_fix_fact_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_comp_fix_fact_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_composite *comp = hw_to_owl_comp(hw); struct clk_fixed_factor *fix_fact_hw = &comp->rate.fix_fact_hw; - return comp->fix_fact_ops->round_rate(&fix_fact_hw->hw, rate, parent_rate); + return comp->fix_fact_ops->determine_rate(&fix_fact_hw->hw, req); } static unsigned long owl_comp_fix_fact_recalc_rate(struct clk_hw *hw, @@ -193,7 +193,7 @@ const struct clk_ops owl_comp_fix_fact_ops = { .is_enabled = owl_comp_is_enabled, /* fix_fact_ops */ - .round_rate = owl_comp_fix_fact_round_rate, + .determine_rate = owl_comp_fix_fact_determine_rate, .recalc_rate = owl_comp_fix_fact_recalc_rate, .set_rate = owl_comp_fix_fact_set_rate, }; From 1b04e12a8bcc3315f1546f2b2a6b2ccca8c4696c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:04 -0400 Subject: [PATCH 071/120] clk: actions: owl-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/actions/owl-divider.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/clk/actions/owl-divider.c b/drivers/clk/actions/owl-divider.c index cddac00fe324..118f1393c678 100644 --- a/drivers/clk/actions/owl-divider.c +++ b/drivers/clk/actions/owl-divider.c @@ -23,13 +23,16 @@ long owl_divider_helper_round_rate(struct owl_clk_common *common, div_hw->div_flags); } -static long owl_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_divider *div = hw_to_owl_divider(hw); - return owl_divider_helper_round_rate(&div->common, &div->div_hw, - rate, parent_rate); + req->rate = owl_divider_helper_round_rate(&div->common, &div->div_hw, + req->rate, + &req->best_parent_rate); + + return 0; } unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common, @@ -89,6 +92,6 @@ static int owl_divider_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops owl_divider_ops = { .recalc_rate = owl_divider_recalc_rate, - .round_rate = owl_divider_round_rate, + .determine_rate = owl_divider_determine_rate, .set_rate = owl_divider_set_rate, }; From 670f7b27117c139e6470ce35c31506ff7147ea72 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:05 -0400 Subject: [PATCH 072/120] clk: actions: owl-factor: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/actions/owl-factor.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/actions/owl-factor.c b/drivers/clk/actions/owl-factor.c index 64f316cf7cfc..12f41f6bacd6 100644 --- a/drivers/clk/actions/owl-factor.c +++ b/drivers/clk/actions/owl-factor.c @@ -130,14 +130,16 @@ long owl_factor_helper_round_rate(struct owl_clk_common *common, return *parent_rate * mul / div; } -static long owl_factor_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_factor_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_factor *factor = hw_to_owl_factor(hw); struct owl_factor_hw *factor_hw = &factor->factor_hw; - return owl_factor_helper_round_rate(&factor->common, factor_hw, - rate, parent_rate); + req->rate = owl_factor_helper_round_rate(&factor->common, factor_hw, + req->rate, &req->best_parent_rate); + + return 0; } unsigned long owl_factor_helper_recalc_rate(struct owl_clk_common *common, @@ -214,7 +216,7 @@ static int owl_factor_set_rate(struct clk_hw *hw, unsigned long rate, } const struct clk_ops owl_factor_ops = { - .round_rate = owl_factor_round_rate, + .determine_rate = owl_factor_determine_rate, .recalc_rate = owl_factor_recalc_rate, .set_rate = owl_factor_set_rate, }; From 234b3015358e4fd2271d187d216f91a829bd6255 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:06 -0400 Subject: [PATCH 073/120] clk: actions: owl-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/actions/owl-pll.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/clk/actions/owl-pll.c b/drivers/clk/actions/owl-pll.c index 155f313986b4..869690b79cc1 100644 --- a/drivers/clk/actions/owl-pll.c +++ b/drivers/clk/actions/owl-pll.c @@ -56,8 +56,8 @@ static const struct clk_pll_table *_get_pll_table( return table; } -static long owl_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_pll *pll = hw_to_owl_pll(hw); struct owl_pll_hw *pll_hw = &pll->pll_hw; @@ -65,17 +65,24 @@ static long owl_pll_round_rate(struct clk_hw *hw, unsigned long rate, u32 mul; if (pll_hw->table) { - clkt = _get_pll_table(pll_hw->table, rate); - return clkt->rate; + clkt = _get_pll_table(pll_hw->table, req->rate); + req->rate = clkt->rate; + + return 0; } /* fixed frequency */ - if (pll_hw->width == 0) - return pll_hw->bfreq; + if (pll_hw->width == 0) { + req->rate = pll_hw->bfreq; - mul = owl_pll_calculate_mul(pll_hw, rate); + return 0; + } - return pll_hw->bfreq * mul; + mul = owl_pll_calculate_mul(pll_hw, req->rate); + + req->rate = pll_hw->bfreq * mul; + + return 0; } static unsigned long owl_pll_recalc_rate(struct clk_hw *hw, @@ -188,7 +195,7 @@ const struct clk_ops owl_pll_ops = { .enable = owl_pll_enable, .disable = owl_pll_disable, .is_enabled = owl_pll_is_enabled, - .round_rate = owl_pll_round_rate, + .determine_rate = owl_pll_determine_rate, .recalc_rate = owl_pll_recalc_rate, .set_rate = owl_pll_set_rate, }; From 3b8f82ca44ddfb1d78f212313145797c5f4f3158 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:07 -0400 Subject: [PATCH 074/120] clk: apple-nco: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Janne Grunau Signed-off-by: Brian Masney --- drivers/clk/clk-apple-nco.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-apple-nco.c b/drivers/clk/clk-apple-nco.c index 457a48d48941..d3ced4a0f029 100644 --- a/drivers/clk/clk-apple-nco.c +++ b/drivers/clk/clk-apple-nco.c @@ -212,13 +212,15 @@ static unsigned long applnco_recalc_rate(struct clk_hw *hw, ((u64) div) * incbase + inc1); } -static long applnco_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int applnco_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long lo = *parent_rate / (COARSE_DIV_OFFSET + LFSR_TBLSIZE) + 1; - unsigned long hi = *parent_rate / COARSE_DIV_OFFSET; + unsigned long lo = req->best_parent_rate / (COARSE_DIV_OFFSET + LFSR_TBLSIZE) + 1; + unsigned long hi = req->best_parent_rate / COARSE_DIV_OFFSET; - return clamp(rate, lo, hi); + req->rate = clamp(req->rate, lo, hi); + + return 0; } static int applnco_enable(struct clk_hw *hw) @@ -246,7 +248,7 @@ static void applnco_disable(struct clk_hw *hw) static const struct clk_ops applnco_ops = { .set_rate = applnco_set_rate, .recalc_rate = applnco_recalc_rate, - .round_rate = applnco_round_rate, + .determine_rate = applnco_determine_rate, .enable = applnco_enable, .disable = applnco_disable, .is_enabled = applnco_is_enabled, From fccbfc5d77983b3449e55942a2248b2718cd4be4 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:08 -0400 Subject: [PATCH 075/120] clk: axs10x: i2s_pll_clock: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/axs10x/i2s_pll_clock.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c index 9667ce898428..6f3e1151b354 100644 --- a/drivers/clk/axs10x/i2s_pll_clock.c +++ b/drivers/clk/axs10x/i2s_pll_clock.c @@ -108,21 +108,21 @@ static unsigned long i2s_pll_recalc_rate(struct clk_hw *hw, return ((parent_rate / idiv) * fbdiv) / odiv; } -static long i2s_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int i2s_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct i2s_pll_clk *clk = to_i2s_pll_clk(hw); - const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate); + const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(req->best_parent_rate); int i; if (!pll_cfg) { - dev_err(clk->dev, "invalid parent rate=%ld\n", *prate); + dev_err(clk->dev, "invalid parent rate=%ld\n", req->best_parent_rate); return -EINVAL; } for (i = 0; pll_cfg[i].rate != 0; i++) - if (pll_cfg[i].rate == rate) - return rate; + if (pll_cfg[i].rate == req->rate) + return 0; return -EINVAL; } @@ -156,7 +156,7 @@ static int i2s_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops i2s_pll_ops = { .recalc_rate = i2s_pll_recalc_rate, - .round_rate = i2s_pll_round_rate, + .determine_rate = i2s_pll_determine_rate, .set_rate = i2s_pll_set_rate, }; From 8987b993571005d152186b0cde130a03792aae2a Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:09 -0400 Subject: [PATCH 076/120] clk: axs10x: pll_clock: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/axs10x/pll_clock.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/axs10x/pll_clock.c b/drivers/clk/axs10x/pll_clock.c index 6c7a2b62b406..c7ca473ee76c 100644 --- a/drivers/clk/axs10x/pll_clock.c +++ b/drivers/clk/axs10x/pll_clock.c @@ -149,8 +149,8 @@ static unsigned long axs10x_pll_recalc_rate(struct clk_hw *hw, return rate; } -static long axs10x_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int axs10x_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int i; long best_rate; @@ -163,11 +163,13 @@ static long axs10x_pll_round_rate(struct clk_hw *hw, unsigned long rate, best_rate = pll_cfg[0].rate; for (i = 1; pll_cfg[i].rate != 0; i++) { - if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate)) + if (abs(req->rate - pll_cfg[i].rate) < abs(req->rate - best_rate)) best_rate = pll_cfg[i].rate; } - return best_rate; + req->rate = best_rate; + + return 0; } static int axs10x_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -208,7 +210,7 @@ static int axs10x_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops axs10x_pll_ops = { .recalc_rate = axs10x_pll_recalc_rate, - .round_rate = axs10x_pll_round_rate, + .determine_rate = axs10x_pll_determine_rate, .set_rate = axs10x_pll_set_rate, }; From e84e82e5760ade3b909254d20ac67b51d26b101b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:10 -0400 Subject: [PATCH 077/120] clk: bcm: iproc-asiu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/bcm/clk-iproc-asiu.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/clk/bcm/clk-iproc-asiu.c b/drivers/clk/bcm/clk-iproc-asiu.c index dcacf55c55ae..83ec13da9b2e 100644 --- a/drivers/clk/bcm/clk-iproc-asiu.c +++ b/drivers/clk/bcm/clk-iproc-asiu.c @@ -98,22 +98,27 @@ static unsigned long iproc_asiu_clk_recalc_rate(struct clk_hw *hw, return clk->rate; } -static long iproc_asiu_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int iproc_asiu_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned int div; - if (rate == 0 || *parent_rate == 0) + if (req->rate == 0 || req->best_parent_rate == 0) return -EINVAL; - if (rate == *parent_rate) - return *parent_rate; + if (req->rate == req->best_parent_rate) + return 0; - div = DIV_ROUND_CLOSEST(*parent_rate, rate); - if (div < 2) - return *parent_rate; + div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); + if (div < 2) { + req->rate = req->best_parent_rate; - return *parent_rate / div; + return 0; + } + + req->rate = req->best_parent_rate / div; + + return 0; } static int iproc_asiu_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -168,7 +173,7 @@ static const struct clk_ops iproc_asiu_ops = { .enable = iproc_asiu_clk_enable, .disable = iproc_asiu_clk_disable, .recalc_rate = iproc_asiu_clk_recalc_rate, - .round_rate = iproc_asiu_clk_round_rate, + .determine_rate = iproc_asiu_clk_determine_rate, .set_rate = iproc_asiu_clk_set_rate, }; From 64613d7fb42f99e955ef4c46b5772b820c3b169d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:11 -0400 Subject: [PATCH 078/120] clk: bm1880: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-bm1880.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-bm1880.c b/drivers/clk/clk-bm1880.c index 002f7360b1c6..dac190bc6e19 100644 --- a/drivers/clk/clk-bm1880.c +++ b/drivers/clk/clk-bm1880.c @@ -608,8 +608,8 @@ static unsigned long bm1880_clk_div_recalc_rate(struct clk_hw *hw, return rate; } -static long bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int bm1880_clk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw); struct bm1880_div_clock *div = &div_hw->div; @@ -621,13 +621,18 @@ static long bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate, val = readl(reg_addr) >> div->shift; val &= clk_div_mask(div->width); - return divider_ro_round_rate(hw, rate, prate, div->table, - div->width, div->flags, - val); + req->rate = divider_ro_round_rate(hw, req->rate, + &req->best_parent_rate, + div->table, + div->width, div->flags, val); + + return 0; } - return divider_round_rate(hw, rate, prate, div->table, - div->width, div->flags); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + div->table, div->width, div->flags); + + return 0; } static int bm1880_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -665,7 +670,7 @@ static int bm1880_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops bm1880_clk_div_ops = { .recalc_rate = bm1880_clk_div_recalc_rate, - .round_rate = bm1880_clk_div_round_rate, + .determine_rate = bm1880_clk_div_determine_rate, .set_rate = bm1880_clk_div_set_rate, }; From ab0fde4ef51c75f7668e58c3ef889fbe802d7316 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:12 -0400 Subject: [PATCH 079/120] clk: cdce706: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-cdce706.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c index d0705bb03a2a..a495d313b02f 100644 --- a/drivers/clk/clk-cdce706.c +++ b/drivers/clk/clk-cdce706.c @@ -183,8 +183,8 @@ static unsigned long cdce706_pll_recalc_rate(struct clk_hw *hw, return 0; } -static long cdce706_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce706_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct cdce706_hw_data *hwd = to_hw_data(hw); unsigned long mul, div; @@ -192,9 +192,9 @@ static long cdce706_pll_round_rate(struct clk_hw *hw, unsigned long rate, dev_dbg(&hwd->dev_data->client->dev, "%s, rate: %lu, parent_rate: %lu\n", - __func__, rate, *parent_rate); + __func__, req->rate, req->best_parent_rate); - rational_best_approximation(rate, *parent_rate, + rational_best_approximation(req->rate, req->best_parent_rate, CDCE706_PLL_N_MAX, CDCE706_PLL_M_MAX, &mul, &div); hwd->mul = mul; @@ -204,9 +204,11 @@ static long cdce706_pll_round_rate(struct clk_hw *hw, unsigned long rate, "%s, pll: %d, mul: %lu, div: %lu\n", __func__, hwd->idx, mul, div); - res = (u64)*parent_rate * hwd->mul; + res = (u64)req->best_parent_rate * hwd->mul; do_div(res, hwd->div); - return res; + req->rate = res; + + return 0; } static int cdce706_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -251,7 +253,7 @@ static int cdce706_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops cdce706_pll_ops = { .recalc_rate = cdce706_pll_recalc_rate, - .round_rate = cdce706_pll_round_rate, + .determine_rate = cdce706_pll_determine_rate, .set_rate = cdce706_pll_set_rate, }; From 23603ba6eff5b16b6e361ee5d8f1933934bbe619 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:13 -0400 Subject: [PATCH 080/120] clk: hsdk-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-hsdk-pll.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-hsdk-pll.c b/drivers/clk/clk-hsdk-pll.c index 921523fc26f2..7d56a47c2aa7 100644 --- a/drivers/clk/clk-hsdk-pll.c +++ b/drivers/clk/clk-hsdk-pll.c @@ -197,8 +197,8 @@ static unsigned long hsdk_pll_recalc_rate(struct clk_hw *hw, return rate; } -static long hsdk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int hsdk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int i; unsigned long best_rate; @@ -211,13 +211,15 @@ static long hsdk_pll_round_rate(struct clk_hw *hw, unsigned long rate, best_rate = pll_cfg[0].rate; for (i = 1; pll_cfg[i].rate != 0; i++) { - if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate)) + if (abs(req->rate - pll_cfg[i].rate) < abs(req->rate - best_rate)) best_rate = pll_cfg[i].rate; } dev_dbg(clk->dev, "chosen best rate: %lu\n", best_rate); - return best_rate; + req->rate = best_rate; + + return 0; } static int hsdk_pll_comm_update_rate(struct hsdk_pll_clk *clk, @@ -296,7 +298,7 @@ static int hsdk_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops hsdk_pll_ops = { .recalc_rate = hsdk_pll_recalc_rate, - .round_rate = hsdk_pll_round_rate, + .determine_rate = hsdk_pll_determine_rate, .set_rate = hsdk_pll_set_rate, }; From 5c2b6d0fdb637ee840f03127fabcff00a69845dc Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:14 -0400 Subject: [PATCH 081/120] clk: mediatek: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mediatek/clk-pll.c | 13 ++++++++----- drivers/clk/mediatek/clk-pll.h | 3 +-- drivers/clk/mediatek/clk-pllfh.c | 2 +- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c index ce453e1718e5..139d3bfcf45f 100644 --- a/drivers/clk/mediatek/clk-pll.c +++ b/drivers/clk/mediatek/clk-pll.c @@ -200,16 +200,19 @@ unsigned long mtk_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) return __mtk_pll_recalc_rate(pll, parent_rate, pcw, postdiv); } -long mtk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +int mtk_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); u32 pcw = 0; int postdiv; - mtk_pll_calc_values(pll, &pcw, &postdiv, rate, *prate); + mtk_pll_calc_values(pll, &pcw, &postdiv, req->rate, + req->best_parent_rate); - return __mtk_pll_recalc_rate(pll, *prate, pcw, postdiv); + req->rate = __mtk_pll_recalc_rate(pll, req->best_parent_rate, pcw, + postdiv); + + return 0; } int mtk_pll_prepare(struct clk_hw *hw) @@ -279,7 +282,7 @@ const struct clk_ops mtk_pll_ops = { .prepare = mtk_pll_prepare, .unprepare = mtk_pll_unprepare, .recalc_rate = mtk_pll_recalc_rate, - .round_rate = mtk_pll_round_rate, + .determine_rate = mtk_pll_determine_rate, .set_rate = mtk_pll_set_rate, }; diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h index 285c8db958b3..670fa2e9b898 100644 --- a/drivers/clk/mediatek/clk-pll.h +++ b/drivers/clk/mediatek/clk-pll.h @@ -96,8 +96,7 @@ void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, u32 freq, u32 fin); int mtk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate); -long mtk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate); +int mtk_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll, const struct mtk_pll_data *data, diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c index 094ec8a26d66..83630ee07ee9 100644 --- a/drivers/clk/mediatek/clk-pllfh.c +++ b/drivers/clk/mediatek/clk-pllfh.c @@ -42,7 +42,7 @@ static const struct clk_ops mtk_pllfh_ops = { .prepare = mtk_pll_prepare, .unprepare = mtk_pll_unprepare, .recalc_rate = mtk_pll_recalc_rate, - .round_rate = mtk_pll_round_rate, + .determine_rate = mtk_pll_determine_rate, .set_rate = mtk_fhctl_set_rate, }; From e9f039c08cdc9b38665aee9a88ae21f59c09ba8c Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:15 -0400 Subject: [PATCH 082/120] clk: microchip: core: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/microchip/clk-core.c | 44 ++++++++++++++++++++------------ 1 file changed, 27 insertions(+), 17 deletions(-) diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c index 6fbc6dc50ca3..3e03e10539c7 100644 --- a/drivers/clk/microchip/clk-core.c +++ b/drivers/clk/microchip/clk-core.c @@ -155,11 +155,13 @@ static unsigned long pbclk_recalc_rate(struct clk_hw *hw, return parent_rate / pbclk_read_pbdiv(pb); } -static long pbclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int pbclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return calc_best_divided_rate(rate, *parent_rate, - PB_DIV_MAX, PB_DIV_MIN); + req->rate = calc_best_divided_rate(req->rate, req->best_parent_rate, + PB_DIV_MAX, PB_DIV_MIN); + + return 0; } static int pbclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -207,7 +209,7 @@ const struct clk_ops pic32_pbclk_ops = { .disable = pbclk_disable, .is_enabled = pbclk_is_enabled, .recalc_rate = pbclk_recalc_rate, - .round_rate = pbclk_round_rate, + .determine_rate = pbclk_determine_rate, .set_rate = pbclk_set_rate, }; @@ -372,16 +374,18 @@ static unsigned long roclk_recalc_rate(struct clk_hw *hw, return roclk_calc_rate(parent_rate, rodiv, rotrim); } -static long roclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int roclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 rotrim, rodiv; /* calculate dividers for new rate */ - roclk_calc_div_trim(rate, *parent_rate, &rodiv, &rotrim); + roclk_calc_div_trim(req->rate, req->best_parent_rate, &rodiv, &rotrim); /* caclulate new rate (rounding) based on new rodiv & rotrim */ - return roclk_calc_rate(*parent_rate, rodiv, rotrim); + req->rate = roclk_calc_rate(req->best_parent_rate, rodiv, rotrim); + + return 0; } static int roclk_determine_rate(struct clk_hw *hw, @@ -665,12 +669,15 @@ static unsigned long spll_clk_recalc_rate(struct clk_hw *hw, return rate64; } -static long spll_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int spll_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct pic32_sys_pll *pll = clkhw_to_spll(hw); - return spll_calc_mult_div(pll, rate, *parent_rate, NULL, NULL); + req->rate = spll_calc_mult_div(pll, req->rate, req->best_parent_rate, + NULL, NULL); + + return 0; } static int spll_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -725,7 +732,7 @@ static int spll_clk_set_rate(struct clk_hw *hw, unsigned long rate, /* SPLL clock operation */ const struct clk_ops pic32_spll_ops = { .recalc_rate = spll_clk_recalc_rate, - .round_rate = spll_clk_round_rate, + .determine_rate = spll_clk_determine_rate, .set_rate = spll_clk_set_rate, }; @@ -780,10 +787,13 @@ static unsigned long sclk_get_rate(struct clk_hw *hw, unsigned long parent_rate) return parent_rate / div; } -static long sclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int sclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return calc_best_divided_rate(rate, *parent_rate, SLEW_SYSDIV, 1); + req->rate = calc_best_divided_rate(req->rate, req->best_parent_rate, + SLEW_SYSDIV, 1); + + return 0; } static int sclk_set_rate(struct clk_hw *hw, @@ -909,7 +919,7 @@ static int sclk_init(struct clk_hw *hw) const struct clk_ops pic32_sclk_ops = { .get_parent = sclk_get_parent, .set_parent = sclk_set_parent, - .round_rate = sclk_round_rate, + .determine_rate = sclk_determine_rate, .set_rate = sclk_set_rate, .recalc_rate = sclk_get_rate, .init = sclk_init, From 5ea721896c36be7aac161a348b9e097758561402 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:16 -0400 Subject: [PATCH 083/120] clk: mstar: msc313-cpupll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Daniel Palmer Signed-off-by: Brian Masney --- drivers/clk/mstar/clk-msc313-cpupll.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mstar/clk-msc313-cpupll.c b/drivers/clk/mstar/clk-msc313-cpupll.c index a93e2dba09d3..3e643be02fe2 100644 --- a/drivers/clk/mstar/clk-msc313-cpupll.c +++ b/drivers/clk/mstar/clk-msc313-cpupll.c @@ -140,20 +140,22 @@ static unsigned long msc313_cpupll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate); } -static long msc313_cpupll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int msc313_cpupll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - u32 reg = msc313_cpupll_regforfrequecy(rate, *parent_rate); - long rounded = msc313_cpupll_frequencyforreg(reg, *parent_rate); + u32 reg = msc313_cpupll_regforfrequecy(req->rate, req->best_parent_rate); + long rounded = msc313_cpupll_frequencyforreg(reg, req->best_parent_rate); /* * This is my poor attempt at making sure the resulting * rate doesn't overshoot the requested rate. */ - for (; rounded >= rate && reg > 0; reg--) - rounded = msc313_cpupll_frequencyforreg(reg, *parent_rate); + for (; rounded >= req->rate && reg > 0; reg--) + rounded = msc313_cpupll_frequencyforreg(reg, req->best_parent_rate); - return rounded; + req->rate = rounded; + + return 0; } static int msc313_cpupll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) @@ -168,7 +170,7 @@ static int msc313_cpupll_set_rate(struct clk_hw *hw, unsigned long rate, unsigne static const struct clk_ops msc313_cpupll_ops = { .recalc_rate = msc313_cpupll_recalc_rate, - .round_rate = msc313_cpupll_round_rate, + .determine_rate = msc313_cpupll_determine_rate, .set_rate = msc313_cpupll_set_rate, }; From a540d5d408f65f381a19134d17b55f5e69c48435 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:17 -0400 Subject: [PATCH 084/120] clk: mvebu: ap-cpu-clk: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mvebu/ap-cpu-clk.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mvebu/ap-cpu-clk.c b/drivers/clk/mvebu/ap-cpu-clk.c index 677cc3514849..1e44ace7d951 100644 --- a/drivers/clk/mvebu/ap-cpu-clk.c +++ b/drivers/clk/mvebu/ap-cpu-clk.c @@ -210,19 +210,21 @@ static int ap_cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } -static long ap_cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ap_cpu_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - int divider = *parent_rate / rate; + int divider = req->best_parent_rate / req->rate; divider = min(divider, APN806_MAX_DIVIDER); - return *parent_rate / divider; + req->rate = req->best_parent_rate / divider; + + return 0; } static const struct clk_ops ap_cpu_clk_ops = { .recalc_rate = ap_cpu_clk_recalc_rate, - .round_rate = ap_cpu_clk_round_rate, + .determine_rate = ap_cpu_clk_determine_rate, .set_rate = ap_cpu_clk_set_rate, }; From 4b76d76f6f7f99fc525663b8d204d8719c37cd88 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:18 -0400 Subject: [PATCH 085/120] clk: mvebu: armada-37xx-periph: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mvebu/armada-37xx-periph.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index 13906e31bef8..bd0bc8e7b1e7 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -454,12 +454,12 @@ static unsigned long clk_pm_cpu_recalc_rate(struct clk_hw *hw, return DIV_ROUND_UP_ULL((u64)parent_rate, div); } -static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_pm_cpu_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw); struct regmap *base = pm_cpu->nb_pm_base; - unsigned int div = *parent_rate / rate; + unsigned int div = req->best_parent_rate / req->rate; unsigned int load_level; /* only available when DVFS is enabled */ if (!armada_3700_pm_dvfs_is_enabled(base)) @@ -474,13 +474,16 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, val >>= offset; val &= ARMADA_37XX_NB_TBG_DIV_MASK; - if (val == div) + if (val == div) { /* * We found a load level matching the target * divider, switch to this load level and * return. */ - return *parent_rate / div; + req->rate = req->best_parent_rate / div; + + return 0; + } } /* We didn't find any valid divider */ @@ -600,7 +603,7 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops clk_pm_cpu_ops = { .get_parent = clk_pm_cpu_get_parent, - .round_rate = clk_pm_cpu_round_rate, + .determine_rate = clk_pm_cpu_determine_rate, .set_rate = clk_pm_cpu_set_rate, .recalc_rate = clk_pm_cpu_recalc_rate, }; From 9a649ab1cf64c9709b43cdfdc37e2ba2f200f5d0 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:19 -0400 Subject: [PATCH 086/120] clk: mvebu: corediv: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mvebu/clk-corediv.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c index 818b175391fa..628032341cbb 100644 --- a/drivers/clk/mvebu/clk-corediv.c +++ b/drivers/clk/mvebu/clk-corediv.c @@ -135,19 +135,21 @@ static unsigned long clk_corediv_recalc_rate(struct clk_hw *hwclk, return parent_rate / div; } -static long clk_corediv_round_rate(struct clk_hw *hwclk, unsigned long rate, - unsigned long *parent_rate) +static int clk_corediv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { /* Valid ratio are 1:4, 1:5, 1:6 and 1:8 */ u32 div; - div = *parent_rate / rate; + div = req->best_parent_rate / req->rate; if (div < 4) div = 4; else if (div > 6) div = 8; - return *parent_rate / div; + req->rate = req->best_parent_rate / div; + + return 0; } static int clk_corediv_set_rate(struct clk_hw *hwclk, unsigned long rate, @@ -199,7 +201,7 @@ static const struct clk_corediv_soc_desc armada370_corediv_soc = { .disable = clk_corediv_disable, .is_enabled = clk_corediv_is_enabled, .recalc_rate = clk_corediv_recalc_rate, - .round_rate = clk_corediv_round_rate, + .determine_rate = clk_corediv_determine_rate, .set_rate = clk_corediv_set_rate, }, .ratio_reload = BIT(8), @@ -215,7 +217,7 @@ static const struct clk_corediv_soc_desc armada380_corediv_soc = { .disable = clk_corediv_disable, .is_enabled = clk_corediv_is_enabled, .recalc_rate = clk_corediv_recalc_rate, - .round_rate = clk_corediv_round_rate, + .determine_rate = clk_corediv_determine_rate, .set_rate = clk_corediv_set_rate, }, .ratio_reload = BIT(8), @@ -228,7 +230,7 @@ static const struct clk_corediv_soc_desc armada375_corediv_soc = { .ndescs = ARRAY_SIZE(mvebu_corediv_desc), .ops = { .recalc_rate = clk_corediv_recalc_rate, - .round_rate = clk_corediv_round_rate, + .determine_rate = clk_corediv_determine_rate, .set_rate = clk_corediv_set_rate, }, .ratio_reload = BIT(8), @@ -240,7 +242,7 @@ static const struct clk_corediv_soc_desc mv98dx3236_corediv_soc = { .ndescs = ARRAY_SIZE(mv98dx3236_corediv_desc), .ops = { .recalc_rate = clk_corediv_recalc_rate, - .round_rate = clk_corediv_round_rate, + .determine_rate = clk_corediv_determine_rate, .set_rate = clk_corediv_set_rate, }, .ratio_reload = BIT(10), From 27dbfefd16959afb606d7ac62abea08036b8caff Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:20 -0400 Subject: [PATCH 087/120] clk: mvebu: cpu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mvebu/clk-cpu.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c index db2b38c21304..0de7660e73d2 100644 --- a/drivers/clk/mvebu/clk-cpu.c +++ b/drivers/clk/mvebu/clk-cpu.c @@ -56,19 +56,21 @@ static unsigned long clk_cpu_recalc_rate(struct clk_hw *hwclk, return parent_rate / div; } -static long clk_cpu_round_rate(struct clk_hw *hwclk, unsigned long rate, - unsigned long *parent_rate) +static int clk_cpu_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { /* Valid ratio are 1:1, 1:2 and 1:3 */ u32 div; - div = *parent_rate / rate; + div = req->best_parent_rate / req->rate; if (div == 0) div = 1; else if (div > 3) div = 3; - return *parent_rate / div; + req->rate = req->best_parent_rate / div; + + return 0; } static int clk_cpu_off_set_rate(struct clk_hw *hwclk, unsigned long rate, @@ -159,7 +161,7 @@ static int clk_cpu_set_rate(struct clk_hw *hwclk, unsigned long rate, static const struct clk_ops cpu_ops = { .recalc_rate = clk_cpu_recalc_rate, - .round_rate = clk_cpu_round_rate, + .determine_rate = clk_cpu_determine_rate, .set_rate = clk_cpu_set_rate, }; From 34848e21cb1b8052a06aa2517e28b6335319a0fa Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:21 -0400 Subject: [PATCH 088/120] clk: mvebu: dove-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/mvebu/dove-divider.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mvebu/dove-divider.c b/drivers/clk/mvebu/dove-divider.c index 0a90452ee808..47cc49e4cd99 100644 --- a/drivers/clk/mvebu/dove-divider.c +++ b/drivers/clk/mvebu/dove-divider.c @@ -108,23 +108,23 @@ static unsigned long dove_recalc_rate(struct clk_hw *hw, unsigned long parent) return rate; } -static long dove_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent) +static int dove_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct dove_clk *dc = to_dove_clk(hw); - unsigned long parent_rate = *parent; + unsigned long parent_rate = req->best_parent_rate; int divider; - divider = dove_calc_divider(dc, rate, parent_rate, false); + divider = dove_calc_divider(dc, req->rate, parent_rate, false); if (divider < 0) return divider; - rate = DIV_ROUND_CLOSEST(parent_rate, divider); + req->rate = DIV_ROUND_CLOSEST(parent_rate, divider); pr_debug("%s(): %s divider=%u parent=%lu rate=%lu\n", - __func__, dc->name, divider, parent_rate, rate); + __func__, dc->name, divider, parent_rate, req->rate); - return rate; + return 0; } static int dove_set_clock(struct clk_hw *hw, unsigned long rate, @@ -154,7 +154,7 @@ static int dove_set_clock(struct clk_hw *hw, unsigned long rate, static const struct clk_ops dove_divider_ops = { .set_rate = dove_set_clock, - .round_rate = dove_round_rate, + .determine_rate = dove_determine_rate, .recalc_rate = dove_recalc_rate, }; From b6f90511c165a2c546650f26d810280237440cb1 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:23 -0400 Subject: [PATCH 089/120] clk: qcom: regmap-divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Note that prior to running the Coccinelle, div_round_ro_rate() was renamed to div_ro_round_rate(). Reviewed-by: Konrad Dybcio Signed-off-by: Brian Masney --- drivers/clk/qcom/clk-regmap-divider.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c index 63c9fca0d65d..4f5395f0ab6d 100644 --- a/drivers/clk/qcom/clk-regmap-divider.c +++ b/drivers/clk/qcom/clk-regmap-divider.c @@ -15,8 +15,8 @@ static inline struct clk_regmap_div *to_clk_regmap_div(struct clk_hw *hw) return container_of(to_clk_regmap(hw), struct clk_regmap_div, clkr); } -static long div_round_ro_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int div_ro_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_regmap_div *divider = to_clk_regmap_div(hw); struct clk_regmap *clkr = ÷r->clkr; @@ -26,17 +26,24 @@ static long div_round_ro_rate(struct clk_hw *hw, unsigned long rate, val >>= divider->shift; val &= BIT(divider->width) - 1; - return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, - CLK_DIVIDER_ROUND_CLOSEST, val); + req->rate = divider_ro_round_rate(hw, req->rate, + &req->best_parent_rate, NULL, + divider->width, + CLK_DIVIDER_ROUND_CLOSEST, val); + + return 0; } -static long div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { struct clk_regmap_div *divider = to_clk_regmap_div(hw); - return divider_round_rate(hw, rate, prate, NULL, divider->width, - CLK_DIVIDER_ROUND_CLOSEST); + req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, + NULL, + divider->width, + CLK_DIVIDER_ROUND_CLOSEST); + + return 0; } static int div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -70,14 +77,14 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, } const struct clk_ops clk_regmap_div_ops = { - .round_rate = div_round_rate, + .determine_rate = div_determine_rate, .set_rate = div_set_rate, .recalc_rate = div_recalc_rate, }; EXPORT_SYMBOL_GPL(clk_regmap_div_ops); const struct clk_ops clk_regmap_div_ro_ops = { - .round_rate = div_round_ro_rate, + .determine_rate = div_ro_determine_rate, .recalc_rate = div_recalc_rate, }; EXPORT_SYMBOL_GPL(clk_regmap_div_ro_ops); From 1952881181e2426fad4c0bdee1b7a9f5090f4928 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:26 -0400 Subject: [PATCH 090/120] clk: rockchip: ddr: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/rockchip/clk-ddr.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/clk/rockchip/clk-ddr.c b/drivers/clk/rockchip/clk-ddr.c index 86718c54e56b..8866a65982a0 100644 --- a/drivers/clk/rockchip/clk-ddr.c +++ b/drivers/clk/rockchip/clk-ddr.c @@ -55,17 +55,18 @@ rockchip_ddrclk_sip_recalc_rate(struct clk_hw *hw, return res.a0; } -static long rockchip_ddrclk_sip_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *prate) +static int rockchip_ddrclk_sip_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct arm_smccc_res res; - arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, rate, 0, + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, req->rate, 0, ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE, 0, 0, 0, 0, &res); - return res.a0; + req->rate = res.a0; + + return 0; } static u8 rockchip_ddrclk_get_parent(struct clk_hw *hw) @@ -83,7 +84,7 @@ static u8 rockchip_ddrclk_get_parent(struct clk_hw *hw) static const struct clk_ops rockchip_ddrclk_sip_ops = { .recalc_rate = rockchip_ddrclk_sip_recalc_rate, .set_rate = rockchip_ddrclk_sip_set_rate, - .round_rate = rockchip_ddrclk_sip_round_rate, + .determine_rate = rockchip_ddrclk_sip_determine_rate, .get_parent = rockchip_ddrclk_get_parent, }; From 25370bf23673af60bd4cbb4ed3b4a22477b51464 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:28 -0400 Subject: [PATCH 091/120] clk: rockchip: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/rockchip/clk-pll.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index c9d599c31923..86dba3826a77 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -61,8 +61,8 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings( return NULL; } -static long rockchip_pll_round_rate(struct clk_hw *hw, - unsigned long drate, unsigned long *prate) +static int rockchip_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); const struct rockchip_pll_rate_table *rate_table = pll->rate_table; @@ -70,12 +70,17 @@ static long rockchip_pll_round_rate(struct clk_hw *hw, /* Assuming rate_table is in descending order */ for (i = 0; i < pll->rate_count; i++) { - if (drate >= rate_table[i].rate) - return rate_table[i].rate; + if (req->rate >= rate_table[i].rate) { + req->rate = rate_table[i].rate; + + return 0; + } } /* return minimum supported value */ - return rate_table[i - 1].rate; + req->rate = rate_table[i - 1].rate; + + return 0; } /* @@ -352,7 +357,7 @@ static const struct clk_ops rockchip_rk3036_pll_clk_norate_ops = { static const struct clk_ops rockchip_rk3036_pll_clk_ops = { .recalc_rate = rockchip_rk3036_pll_recalc_rate, - .round_rate = rockchip_pll_round_rate, + .determine_rate = rockchip_pll_determine_rate, .set_rate = rockchip_rk3036_pll_set_rate, .enable = rockchip_rk3036_pll_enable, .disable = rockchip_rk3036_pll_disable, @@ -571,7 +576,7 @@ static const struct clk_ops rockchip_rk3066_pll_clk_norate_ops = { static const struct clk_ops rockchip_rk3066_pll_clk_ops = { .recalc_rate = rockchip_rk3066_pll_recalc_rate, - .round_rate = rockchip_pll_round_rate, + .determine_rate = rockchip_pll_determine_rate, .set_rate = rockchip_rk3066_pll_set_rate, .enable = rockchip_rk3066_pll_enable, .disable = rockchip_rk3066_pll_disable, @@ -836,7 +841,7 @@ static const struct clk_ops rockchip_rk3399_pll_clk_norate_ops = { static const struct clk_ops rockchip_rk3399_pll_clk_ops = { .recalc_rate = rockchip_rk3399_pll_recalc_rate, - .round_rate = rockchip_pll_round_rate, + .determine_rate = rockchip_pll_determine_rate, .set_rate = rockchip_rk3399_pll_set_rate, .enable = rockchip_rk3399_pll_enable, .disable = rockchip_rk3399_pll_disable, @@ -1036,7 +1041,7 @@ static const struct clk_ops rockchip_rk3588_pll_clk_norate_ops = { static const struct clk_ops rockchip_rk3588_pll_clk_ops = { .recalc_rate = rockchip_rk3588_pll_recalc_rate, - .round_rate = rockchip_pll_round_rate, + .determine_rate = rockchip_pll_determine_rate, .set_rate = rockchip_rk3588_pll_set_rate, .enable = rockchip_rk3588_pll_enable, .disable = rockchip_rk3588_pll_disable, From d61a1ba87b64ac994895e4e7134e43dfd810f824 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:32 -0400 Subject: [PATCH 092/120] clk: sp7021: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-sp7021.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/clk/clk-sp7021.c b/drivers/clk/clk-sp7021.c index 95d66191df4b..445e3da50e29 100644 --- a/drivers/clk/clk-sp7021.c +++ b/drivers/clk/clk-sp7021.c @@ -412,25 +412,27 @@ static long sp_pll_calc_div(struct sp_pll *clk, unsigned long rate) return fbdiv; } -static long sp_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int sp_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sp_pll *clk = to_sp_pll(hw); long ret; - if (rate == *prate) { - ret = *prate; /* bypass */ + if (req->rate == req->best_parent_rate) { + ret = req->best_parent_rate; /* bypass */ } else if (clk->div_width == DIV_A) { - ret = plla_round_rate(clk, rate); + ret = plla_round_rate(clk, req->rate); } else if (clk->div_width == DIV_TV) { - ret = plltv_div(clk, rate); + ret = plltv_div(clk, req->rate); if (ret < 0) - ret = *prate; + ret = req->best_parent_rate; } else { - ret = sp_pll_calc_div(clk, rate) * clk->brate; + ret = sp_pll_calc_div(clk, req->rate) * clk->brate; } - return ret; + req->rate = ret; + + return 0; } static unsigned long sp_pll_recalc_rate(struct clk_hw *hw, @@ -535,7 +537,7 @@ static const struct clk_ops sp_pll_ops = { .enable = sp_pll_enable, .disable = sp_pll_disable, .is_enabled = sp_pll_is_enabled, - .round_rate = sp_pll_round_rate, + .determine_rate = sp_pll_determine_rate, .recalc_rate = sp_pll_recalc_rate, .set_rate = sp_pll_set_rate }; From f705ed70873e166a25b1332d4b4d7bdc4d14bd64 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:33 -0400 Subject: [PATCH 093/120] clk: spear: aux-synth: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/spear/clk-aux-synth.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c index 637938e804f8..d0d063147af8 100644 --- a/drivers/clk/spear/clk-aux-synth.c +++ b/drivers/clk/spear/clk-aux-synth.c @@ -49,14 +49,16 @@ static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate, (rtbl[index].yscale * eq)) * 10000; } -static long clk_aux_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_aux_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_aux *aux = to_clk_aux(hw); int unused; - return clk_round_rate_index(hw, drate, *prate, aux_calc_rate, - aux->rtbl_cnt, &unused); + req->rate = clk_round_rate_index(hw, req->rate, req->best_parent_rate, + aux_calc_rate, aux->rtbl_cnt, &unused); + + return 0; } static unsigned long clk_aux_recalc_rate(struct clk_hw *hw, @@ -127,7 +129,7 @@ static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate, static const struct clk_ops clk_aux_ops = { .recalc_rate = clk_aux_recalc_rate, - .round_rate = clk_aux_round_rate, + .determine_rate = clk_aux_determine_rate, .set_rate = clk_aux_set_rate, }; From 9ea41da306cd5c535c46b0606cc200774d5da952 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:34 -0400 Subject: [PATCH 094/120] clk: spear: frac-synth: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/spear/clk-frac-synth.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c index 2380df293a2c..150f051d28e0 100644 --- a/drivers/clk/spear/clk-frac-synth.c +++ b/drivers/clk/spear/clk-frac-synth.c @@ -52,14 +52,16 @@ static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate, return prate; } -static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_frac_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_frac *frac = to_clk_frac(hw); int unused; - return clk_round_rate_index(hw, drate, *prate, frac_calc_rate, - frac->rtbl_cnt, &unused); + req->rate = clk_round_rate_index(hw, req->rate, req->best_parent_rate, + frac_calc_rate, frac->rtbl_cnt, &unused); + + return 0; } static unsigned long clk_frac_recalc_rate(struct clk_hw *hw, @@ -115,7 +117,7 @@ static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate, static const struct clk_ops clk_frac_ops = { .recalc_rate = clk_frac_recalc_rate, - .round_rate = clk_frac_round_rate, + .determine_rate = clk_frac_determine_rate, .set_rate = clk_frac_set_rate, }; From 2767256c6faab122d3d26e0027be0febdd78f56a Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:35 -0400 Subject: [PATCH 095/120] clk: spear: gpt-synth: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/spear/clk-gpt-synth.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c index 4ef747c2abbb..cf9659dc9073 100644 --- a/drivers/clk/spear/clk-gpt-synth.c +++ b/drivers/clk/spear/clk-gpt-synth.c @@ -39,14 +39,16 @@ static unsigned long gpt_calc_rate(struct clk_hw *hw, unsigned long prate, return prate; } -static long clk_gpt_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_gpt_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_gpt *gpt = to_clk_gpt(hw); int unused; - return clk_round_rate_index(hw, drate, *prate, gpt_calc_rate, - gpt->rtbl_cnt, &unused); + req->rate = clk_round_rate_index(hw, req->rate, req->best_parent_rate, + gpt_calc_rate, gpt->rtbl_cnt, &unused); + + return 0; } static unsigned long clk_gpt_recalc_rate(struct clk_hw *hw, @@ -104,7 +106,7 @@ static int clk_gpt_set_rate(struct clk_hw *hw, unsigned long drate, static const struct clk_ops clk_gpt_ops = { .recalc_rate = clk_gpt_recalc_rate, - .round_rate = clk_gpt_round_rate, + .determine_rate = clk_gpt_determine_rate, .set_rate = clk_gpt_set_rate, }; From f32c0f8b9097e8c077b804ca4d2741a4cd90217d Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:36 -0400 Subject: [PATCH 096/120] clk: spear: vco-pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/spear/clk-vco-pll.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c index 348eeab0a906..723a6eb67754 100644 --- a/drivers/clk/spear/clk-vco-pll.c +++ b/drivers/clk/spear/clk-vco-pll.c @@ -110,12 +110,15 @@ static long clk_pll_round_rate_index(struct clk_hw *hw, unsigned long drate, return rate; } -static long clk_pll_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int unused; - return clk_pll_round_rate_index(hw, drate, prate, &unused); + req->rate = clk_pll_round_rate_index(hw, req->rate, + &req->best_parent_rate, &unused); + + return 0; } static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, unsigned long @@ -164,7 +167,7 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long drate, static const struct clk_ops clk_pll_ops = { .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_round_rate, + .determine_rate = clk_pll_determine_rate, .set_rate = clk_pll_set_rate, }; @@ -176,14 +179,16 @@ static inline unsigned long vco_calc_rate(struct clk_hw *hw, return pll_calc_rate(vco->rtbl, prate, index, NULL); } -static long clk_vco_round_rate(struct clk_hw *hw, unsigned long drate, - unsigned long *prate) +static int clk_vco_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_vco *vco = to_clk_vco(hw); int unused; - return clk_round_rate_index(hw, drate, *prate, vco_calc_rate, - vco->rtbl_cnt, &unused); + req->rate = clk_round_rate_index(hw, req->rate, req->best_parent_rate, + vco_calc_rate, vco->rtbl_cnt, &unused); + + return 0; } static unsigned long clk_vco_recalc_rate(struct clk_hw *hw, @@ -265,7 +270,7 @@ static int clk_vco_set_rate(struct clk_hw *hw, unsigned long drate, static const struct clk_ops clk_vco_ops = { .recalc_rate = clk_vco_recalc_rate, - .round_rate = clk_vco_round_rate, + .determine_rate = clk_vco_determine_rate, .set_rate = clk_vco_set_rate, }; From 7a19c341d54c97fdd09c232ce14b4a2fcdd71d9b Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:37 -0400 Subject: [PATCH 097/120] clk: ux500: prcmu: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Linus Walleij Signed-off-by: Brian Masney --- drivers/clk/ux500/clk-prcmu.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c index 5cbf24c94606..f775e18acd46 100644 --- a/drivers/clk/ux500/clk-prcmu.c +++ b/drivers/clk/ux500/clk-prcmu.c @@ -53,11 +53,13 @@ static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw, return prcmu_clock_rate(clk->cg_sel); } -static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_prcmu_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_prcmu *clk = to_clk_prcmu(hw); - return prcmu_round_clock_rate(clk->cg_sel, rate); + req->rate = prcmu_round_clock_rate(clk->cg_sel, req->rate); + + return 0; } static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate, @@ -157,7 +159,7 @@ static const struct clk_ops clk_prcmu_scalable_ops = { .prepare = clk_prcmu_prepare, .unprepare = clk_prcmu_unprepare, .recalc_rate = clk_prcmu_recalc_rate, - .round_rate = clk_prcmu_round_rate, + .determine_rate = clk_prcmu_determine_rate, .set_rate = clk_prcmu_set_rate, }; @@ -169,7 +171,7 @@ static const struct clk_ops clk_prcmu_gate_ops = { static const struct clk_ops clk_prcmu_scalable_rate_ops = { .recalc_rate = clk_prcmu_recalc_rate, - .round_rate = clk_prcmu_round_rate, + .determine_rate = clk_prcmu_determine_rate, .set_rate = clk_prcmu_set_rate, }; @@ -187,7 +189,7 @@ static const struct clk_ops clk_prcmu_opp_volt_scalable_ops = { .prepare = clk_prcmu_opp_volt_prepare, .unprepare = clk_prcmu_opp_volt_unprepare, .recalc_rate = clk_prcmu_recalc_rate, - .round_rate = clk_prcmu_round_rate, + .determine_rate = clk_prcmu_determine_rate, .set_rate = clk_prcmu_set_rate, }; From 7bf7153230f7bb14d9410d998ac083d73405d926 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:38 -0400 Subject: [PATCH 098/120] clk: versaclock5: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Luca Ceresoli Signed-off-by: Brian Masney --- drivers/clk/clk-versaclock5.c | 71 ++++++++++++++++++++--------------- 1 file changed, 40 insertions(+), 31 deletions(-) diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index 4200022d2084..57228e88e81d 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -304,11 +304,11 @@ static unsigned long vc5_dbl_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long vc5_dbl_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc5_dbl_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - if ((*parent_rate == rate) || ((*parent_rate * 2) == rate)) - return rate; + if ((req->best_parent_rate == req->rate) || ((req->best_parent_rate * 2) == req->rate)) + return 0; else return -EINVAL; } @@ -332,7 +332,7 @@ static int vc5_dbl_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc5_dbl_ops = { .recalc_rate = vc5_dbl_recalc_rate, - .round_rate = vc5_dbl_round_rate, + .determine_rate = vc5_dbl_determine_rate, .set_rate = vc5_dbl_set_rate, }; @@ -363,24 +363,29 @@ static unsigned long vc5_pfd_recalc_rate(struct clk_hw *hw, return parent_rate / VC5_REF_DIVIDER_REF_DIV(div); } -static long vc5_pfd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc5_pfd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long idiv; /* PLL cannot operate with input clock above 50 MHz. */ - if (rate > 50000000) + if (req->rate > 50000000) return -EINVAL; /* CLKIN within range of PLL input, feed directly to PLL. */ - if (*parent_rate <= 50000000) - return *parent_rate; + if (req->best_parent_rate <= 50000000) { + req->rate = req->best_parent_rate; - idiv = DIV_ROUND_UP(*parent_rate, rate); + return 0; + } + + idiv = DIV_ROUND_UP(req->best_parent_rate, req->rate); if (idiv > 127) return -EINVAL; - return *parent_rate / idiv; + req->rate = req->best_parent_rate / idiv; + + return 0; } static int vc5_pfd_set_rate(struct clk_hw *hw, unsigned long rate, @@ -420,7 +425,7 @@ static int vc5_pfd_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc5_pfd_ops = { .recalc_rate = vc5_pfd_recalc_rate, - .round_rate = vc5_pfd_round_rate, + .determine_rate = vc5_pfd_determine_rate, .set_rate = vc5_pfd_set_rate, }; @@ -444,30 +449,32 @@ static unsigned long vc5_pll_recalc_rate(struct clk_hw *hw, return (parent_rate * div_int) + ((parent_rate * div_frc) >> 24); } -static long vc5_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc5_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc5_hw_data *hwdata = container_of(hw, struct vc5_hw_data, hw); struct vc5_driver_data *vc5 = hwdata->vc5; u32 div_int; u64 div_frc; - rate = clamp(rate, VC5_PLL_VCO_MIN, vc5->chip_info->vco_max); + req->rate = clamp(req->rate, VC5_PLL_VCO_MIN, vc5->chip_info->vco_max); /* Determine integer part, which is 12 bit wide */ - div_int = rate / *parent_rate; + div_int = req->rate / req->best_parent_rate; if (div_int > 0xfff) - rate = *parent_rate * 0xfff; + req->rate = req->best_parent_rate * 0xfff; /* Determine best fractional part, which is 24 bit wide */ - div_frc = rate % *parent_rate; + div_frc = req->rate % req->best_parent_rate; div_frc *= BIT(24) - 1; - do_div(div_frc, *parent_rate); + do_div(div_frc, req->best_parent_rate); hwdata->div_int = div_int; hwdata->div_frc = (u32)div_frc; - return (*parent_rate * div_int) + ((*parent_rate * div_frc) >> 24); + req->rate = (req->best_parent_rate * div_int) + ((req->best_parent_rate * div_frc) >> 24); + + return 0; } static int vc5_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -488,7 +495,7 @@ static int vc5_pll_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc5_pll_ops = { .recalc_rate = vc5_pll_recalc_rate, - .round_rate = vc5_pll_round_rate, + .determine_rate = vc5_pll_determine_rate, .set_rate = vc5_pll_set_rate, }; @@ -520,17 +527,17 @@ static unsigned long vc5_fod_recalc_rate(struct clk_hw *hw, return div64_u64((u64)f_in << 24ULL, ((u64)div_int << 24ULL) + div_frc); } -static long vc5_fod_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vc5_fod_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc5_hw_data *hwdata = container_of(hw, struct vc5_hw_data, hw); /* VCO frequency is divided by two before entering FOD */ - u32 f_in = *parent_rate / 2; + u32 f_in = req->best_parent_rate / 2; u32 div_int; u64 div_frc; /* Determine integer part, which is 12 bit wide */ - div_int = f_in / rate; + div_int = f_in / req->rate; /* * WARNING: The clock chip does not output signal if the integer part * of the divider is 0xfff and fractional part is non-zero. @@ -538,18 +545,20 @@ static long vc5_fod_round_rate(struct clk_hw *hw, unsigned long rate, */ if (div_int > 0xffe) { div_int = 0xffe; - rate = f_in / div_int; + req->rate = f_in / div_int; } /* Determine best fractional part, which is 30 bit wide */ - div_frc = f_in % rate; + div_frc = f_in % req->rate; div_frc <<= 24; - do_div(div_frc, rate); + do_div(div_frc, req->rate); hwdata->div_int = div_int; hwdata->div_frc = (u32)div_frc; - return div64_u64((u64)f_in << 24ULL, ((u64)div_int << 24ULL) + div_frc); + req->rate = div64_u64((u64)f_in << 24ULL, ((u64)div_int << 24ULL) + div_frc); + + return 0; } static int vc5_fod_set_rate(struct clk_hw *hw, unsigned long rate, @@ -589,7 +598,7 @@ static int vc5_fod_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vc5_fod_ops = { .recalc_rate = vc5_fod_recalc_rate, - .round_rate = vc5_fod_round_rate, + .determine_rate = vc5_fod_determine_rate, .set_rate = vc5_fod_set_rate, }; From b4d5ebcf69fa99c11ca9489b1a6e290d206bf3f7 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:39 -0400 Subject: [PATCH 099/120] clk: versaclock7: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/clk-versaclock7.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/clk/clk-versaclock7.c b/drivers/clk/clk-versaclock7.c index 483285b30c13..adcc603e3259 100644 --- a/drivers/clk/clk-versaclock7.c +++ b/drivers/clk/clk-versaclock7.c @@ -900,17 +900,18 @@ static unsigned long vc7_fod_recalc_rate(struct clk_hw *hw, unsigned long parent return fod_rate; } -static long vc7_fod_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) +static int vc7_fod_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc7_fod_data *fod = container_of(hw, struct vc7_fod_data, hw); unsigned long fod_rate; pr_debug("%s - %s: requested rate: %lu, parent_rate: %lu\n", - __func__, clk_hw_get_name(hw), rate, *parent_rate); + __func__, clk_hw_get_name(hw), req->rate, req->best_parent_rate); - vc7_calc_fod_divider(rate, *parent_rate, + vc7_calc_fod_divider(req->rate, req->best_parent_rate, &fod->fod_1st_int, &fod->fod_2nd_int, &fod->fod_frac); - fod_rate = vc7_calc_fod_2nd_stage_rate(*parent_rate, fod->fod_1st_int, + fod_rate = vc7_calc_fod_2nd_stage_rate(req->best_parent_rate, fod->fod_1st_int, fod->fod_2nd_int, fod->fod_frac); pr_debug("%s - %s: fod_1st_int: %u, fod_2nd_int: %u, fod_frac: %llu\n", @@ -918,7 +919,9 @@ static long vc7_fod_round_rate(struct clk_hw *hw, unsigned long rate, unsigned l fod->fod_1st_int, fod->fod_2nd_int, fod->fod_frac); pr_debug("%s - %s rate: %lu\n", __func__, clk_hw_get_name(hw), fod_rate); - return fod_rate; + req->rate = fod_rate; + + return 0; } static int vc7_fod_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) @@ -952,7 +955,7 @@ static int vc7_fod_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long static const struct clk_ops vc7_fod_ops = { .recalc_rate = vc7_fod_recalc_rate, - .round_rate = vc7_fod_round_rate, + .determine_rate = vc7_fod_determine_rate, .set_rate = vc7_fod_set_rate, }; @@ -978,21 +981,24 @@ static unsigned long vc7_iod_recalc_rate(struct clk_hw *hw, unsigned long parent return iod_rate; } -static long vc7_iod_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) +static int vc7_iod_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vc7_iod_data *iod = container_of(hw, struct vc7_iod_data, hw); unsigned long iod_rate; pr_debug("%s - %s: requested rate: %lu, parent_rate: %lu\n", - __func__, clk_hw_get_name(hw), rate, *parent_rate); + __func__, clk_hw_get_name(hw), req->rate, req->best_parent_rate); - vc7_calc_iod_divider(rate, *parent_rate, &iod->iod_int); - iod_rate = div64_u64(*parent_rate, iod->iod_int); + vc7_calc_iod_divider(req->rate, req->best_parent_rate, &iod->iod_int); + iod_rate = div64_u64(req->best_parent_rate, iod->iod_int); pr_debug("%s - %s: iod_int: %u\n", __func__, clk_hw_get_name(hw), iod->iod_int); pr_debug("%s - %s rate: %ld\n", __func__, clk_hw_get_name(hw), iod_rate); - return iod_rate; + req->rate = iod_rate; + + return 0; } static int vc7_iod_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) @@ -1023,7 +1029,7 @@ static int vc7_iod_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long static const struct clk_ops vc7_iod_ops = { .recalc_rate = vc7_iod_recalc_rate, - .round_rate = vc7_iod_round_rate, + .determine_rate = vc7_iod_determine_rate, .set_rate = vc7_iod_set_rate, }; From ef6fd5ce7d1d7aacab351219f295757d24a5e414 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:40 -0400 Subject: [PATCH 100/120] clk: versatile: icst: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Linus Walleij Signed-off-by: Brian Masney --- drivers/clk/versatile/clk-icst.c | 72 ++++++++++++++++++++------------ 1 file changed, 45 insertions(+), 27 deletions(-) diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c index b69c3fbdfbce..86ca04ad9fab 100644 --- a/drivers/clk/versatile/clk-icst.c +++ b/drivers/clk/versatile/clk-icst.c @@ -234,39 +234,51 @@ static unsigned long icst_recalc_rate(struct clk_hw *hw, return icst->rate; } -static long icst_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int icst_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_icst *icst = to_icst(hw); struct icst_vco vco; if (icst->ctype == ICST_INTEGRATOR_AP_CM || icst->ctype == ICST_INTEGRATOR_CP_CM_CORE) { - if (rate <= 12000000) - return 12000000; - if (rate >= 160000000) - return 160000000; - /* Slam to closest megahertz */ - return DIV_ROUND_CLOSEST(rate, 1000000) * 1000000; + if (req->rate <= 12000000) + req->rate = 12000000; + else if (req->rate >= 160000000) + req->rate = 160000000; + else { + /* Slam to closest megahertz */ + req->rate = DIV_ROUND_CLOSEST(req->rate, 1000000) * 1000000; + } + + return 0; } if (icst->ctype == ICST_INTEGRATOR_CP_CM_MEM) { - if (rate <= 6000000) - return 6000000; - if (rate >= 66000000) - return 66000000; - /* Slam to closest 0.5 megahertz */ - return DIV_ROUND_CLOSEST(rate, 500000) * 500000; + if (req->rate <= 6000000) + req->rate = 6000000; + else if (req->rate >= 66000000) + req->rate = 66000000; + else { + /* Slam to closest 0.5 megahertz */ + req->rate = DIV_ROUND_CLOSEST(req->rate, 500000) * 500000; + } + + return 0; } if (icst->ctype == ICST_INTEGRATOR_AP_SYS) { /* Divides between 3 and 50 MHz in steps of 0.25 MHz */ - if (rate <= 3000000) - return 3000000; - if (rate >= 50000000) - return 5000000; - /* Slam to closest 0.25 MHz */ - return DIV_ROUND_CLOSEST(rate, 250000) * 250000; + if (req->rate <= 3000000) + req->rate = 3000000; + else if (req->rate >= 50000000) + req->rate = 5000000; + else { + /* Slam to closest 0.25 MHz */ + req->rate = DIV_ROUND_CLOSEST(req->rate, 250000) * 250000; + } + + return 0; } if (icst->ctype == ICST_INTEGRATOR_AP_PCI) { @@ -274,14 +286,20 @@ static long icst_round_rate(struct clk_hw *hw, unsigned long rate, * If we're below or less than halfway from 25 to 33 MHz * select 25 MHz */ - if (rate <= 25000000 || rate < 29000000) - return 25000000; - /* Else just return the default frequency */ - return 33000000; + if (req->rate <= 25000000 || req->rate < 29000000) + req->rate = 25000000; + else { + /* Else just return the default frequency */ + req->rate = 33000000; + } + + return 0; } - vco = icst_hz_to_vco(icst->params, rate); - return icst_hz(icst->params, vco); + vco = icst_hz_to_vco(icst->params, req->rate); + req->rate = icst_hz(icst->params, vco); + + return 0; } static int icst_set_rate(struct clk_hw *hw, unsigned long rate, @@ -329,7 +347,7 @@ static int icst_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops icst_ops = { .recalc_rate = icst_recalc_rate, - .round_rate = icst_round_rate, + .determine_rate = icst_determine_rate, .set_rate = icst_set_rate, }; From 775e96539dcf980f7f7887feb0732cd7c3e55bc6 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:41 -0400 Subject: [PATCH 101/120] clk: versatile: vexpress-osc: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Linus Walleij Signed-off-by: Brian Masney --- drivers/clk/versatile/clk-vexpress-osc.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c index c385ca2f4a74..9adbf5c33bd1 100644 --- a/drivers/clk/versatile/clk-vexpress-osc.c +++ b/drivers/clk/versatile/clk-vexpress-osc.c @@ -33,18 +33,18 @@ static unsigned long vexpress_osc_recalc_rate(struct clk_hw *hw, return rate; } -static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int vexpress_osc_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct vexpress_osc *osc = to_vexpress_osc(hw); - if (osc->rate_min && rate < osc->rate_min) - rate = osc->rate_min; + if (osc->rate_min && req->rate < osc->rate_min) + req->rate = osc->rate_min; - if (osc->rate_max && rate > osc->rate_max) - rate = osc->rate_max; + if (osc->rate_max && req->rate > osc->rate_max) + req->rate = osc->rate_max; - return rate; + return 0; } static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate, @@ -57,7 +57,7 @@ static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops vexpress_osc_ops = { .recalc_rate = vexpress_osc_recalc_rate, - .round_rate = vexpress_osc_round_rate, + .determine_rate = vexpress_osc_determine_rate, .set_rate = vexpress_osc_set_rate, }; From e7666eae4858ceb72a0499e4e2a78e0296ca1d35 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:42 -0400 Subject: [PATCH 102/120] clk: visconti: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Reviewed-by: Nobuhiro Iwamatsu Signed-off-by: Brian Masney --- drivers/clk/visconti/pll.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/clk/visconti/pll.c b/drivers/clk/visconti/pll.c index 8ca1bad61864..681721d85032 100644 --- a/drivers/clk/visconti/pll.c +++ b/drivers/clk/visconti/pll.c @@ -100,8 +100,8 @@ static unsigned long visconti_get_pll_rate_from_data(struct visconti_pll *pll, return rate_table[0].rate; } -static long visconti_pll_round_rate(struct clk_hw *hw, - unsigned long rate, unsigned long *prate) +static int visconti_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct visconti_pll *pll = to_visconti_pll(hw); const struct visconti_pll_rate_table *rate_table = pll->rate_table; @@ -109,11 +109,16 @@ static long visconti_pll_round_rate(struct clk_hw *hw, /* Assuming rate_table is in descending order */ for (i = 0; i < pll->rate_count; i++) - if (rate >= rate_table[i].rate) - return rate_table[i].rate; + if (req->rate >= rate_table[i].rate) { + req->rate = rate_table[i].rate; + + return 0; + } /* return minimum supported value */ - return rate_table[i - 1].rate; + req->rate = rate_table[i - 1].rate; + + return 0; } static unsigned long visconti_pll_recalc_rate(struct clk_hw *hw, @@ -232,7 +237,7 @@ static const struct clk_ops visconti_pll_ops = { .enable = visconti_pll_enable, .disable = visconti_pll_disable, .is_enabled = visconti_pll_is_enabled, - .round_rate = visconti_pll_round_rate, + .determine_rate = visconti_pll_determine_rate, .recalc_rate = visconti_pll_recalc_rate, .set_rate = visconti_pll_set_rate, }; From d228ece36345d56bb862cc0e5c3575e3097d8dac Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:43 -0400 Subject: [PATCH 103/120] clk: divider: remove round_rate() in favor of determine_rate() This driver implements both the determine_rate() and round_rate() clk ops, and the round_rate() clk ops is deprecated. When both are defined, clk_core_determine_round_nolock() from the clk core will only use the determine_rate() clk ops. Also all clk drivers that directly calls divider's round_rate() have been migrated over to determine_rate(). So let's remove the round_rate() clk ops. Reviewed-by: Alexander Sverdlin Reviewed-by: Geert Uytterhoeven Signed-off-by: Brian Masney --- drivers/clk/clk-divider.c | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index c1f426b8a504..2601b6155afb 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -431,27 +431,6 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, } EXPORT_SYMBOL_GPL(divider_ro_round_rate_parent); -static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - struct clk_divider *divider = to_clk_divider(hw); - - /* if read only, just return current value */ - if (divider->flags & CLK_DIVIDER_READ_ONLY) { - u32 val; - - val = clk_div_readl(divider) >> divider->shift; - val &= clk_div_mask(divider->width); - - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); - } - - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); -} - static int clk_divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { @@ -527,7 +506,6 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops clk_divider_ops = { .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, .determine_rate = clk_divider_determine_rate, .set_rate = clk_divider_set_rate, }; @@ -535,7 +513,6 @@ EXPORT_SYMBOL_GPL(clk_divider_ops); const struct clk_ops clk_divider_ro_ops = { .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, .determine_rate = clk_divider_determine_rate, }; EXPORT_SYMBOL_GPL(clk_divider_ro_ops); From e0c26569d3ad5a5ad0283b72ec91581bec581845 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 11:19:46 -0400 Subject: [PATCH 104/120] clk: fixed-factor: drop round_rate() clk ops This driver implements both the determine_rate() and round_rate() clk ops, and the round_rate() clk ops is deprecated. When both are defined, clk_core_determine_round_nolock() from the clk core will only use the determine_rate() clk ops. Also all clk drivers that directly calls fixed-factor's round_rate() have been migrated over to determine_rate(). So let's remove the round_rate() clk ops. Reviewed-by: Alexander Sverdlin Signed-off-by: Brian Masney --- drivers/clk/clk-fixed-factor.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 79b9a8c57d4b..de658c9e4c53 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -47,21 +47,6 @@ static int clk_factor_determine_rate(struct clk_hw *hw, return 0; } -static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); - - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { - unsigned long best_parent; - - best_parent = (rate / fix->mult) * fix->div; - *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); - } - - return (*prate / fix->div) * fix->mult; -} - static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { @@ -87,7 +72,6 @@ static unsigned long clk_factor_recalc_accuracy(struct clk_hw *hw, const struct clk_ops clk_fixed_factor_ops = { .determine_rate = clk_factor_determine_rate, - .round_rate = clk_factor_round_rate, .set_rate = clk_factor_set_rate, .recalc_rate = clk_factor_recalc_rate, .recalc_accuracy = clk_factor_recalc_accuracy, From 706000971c7cf18b63f0376a9966c387b096ad54 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:02 -0400 Subject: [PATCH 105/120] clk: tegra: audio-sync: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-audio-sync.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/tegra/clk-audio-sync.c b/drivers/clk/tegra/clk-audio-sync.c index 2c4bb96eae16..468a4403f147 100644 --- a/drivers/clk/tegra/clk-audio-sync.c +++ b/drivers/clk/tegra/clk-audio-sync.c @@ -17,15 +17,15 @@ static unsigned long clk_sync_source_recalc_rate(struct clk_hw *hw, return sync->rate; } -static long clk_sync_source_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_sync_source_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); - if (rate > sync->max_rate) + if (req->rate > sync->max_rate) return -EINVAL; else - return rate; + return 0; } static int clk_sync_source_set_rate(struct clk_hw *hw, unsigned long rate, @@ -38,7 +38,7 @@ static int clk_sync_source_set_rate(struct clk_hw *hw, unsigned long rate, } const struct clk_ops tegra_clk_sync_source_ops = { - .round_rate = clk_sync_source_round_rate, + .determine_rate = clk_sync_source_determine_rate, .set_rate = clk_sync_source_set_rate, .recalc_rate = clk_sync_source_recalc_rate, }; From 3891c3c70012d634963b0203152aef5eeb079d47 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:03 -0400 Subject: [PATCH 106/120] clk: tegra: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-divider.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 38daf483ddf1..37439fcb3ac0 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -58,23 +58,31 @@ static unsigned long clk_frac_div_recalc_rate(struct clk_hw *hw, return rate; } -static long clk_frac_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_frac_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); int div, mul; - unsigned long output_rate = *prate; + unsigned long output_rate = req->best_parent_rate; - if (!rate) - return output_rate; + if (!req->rate) { + req->rate = output_rate; - div = get_div(divider, rate, output_rate); - if (div < 0) - return *prate; + return 0; + } + + div = get_div(divider, req->rate, output_rate); + if (div < 0) { + req->rate = req->best_parent_rate; + + return 0; + } mul = get_mul(divider); - return DIV_ROUND_UP(output_rate * mul, div + mul); + req->rate = DIV_ROUND_UP(output_rate * mul, div + mul); + + return 0; } static int clk_frac_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -127,7 +135,7 @@ static void clk_divider_restore_context(struct clk_hw *hw) const struct clk_ops tegra_clk_frac_div_ops = { .recalc_rate = clk_frac_div_recalc_rate, .set_rate = clk_frac_div_set_rate, - .round_rate = clk_frac_div_round_rate, + .determine_rate = clk_frac_div_determine_rate, .restore_context = clk_divider_restore_context, }; From e3d1744baa7f81de9e5fd30f26964f27b3a61510 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:04 -0400 Subject: [PATCH 107/120] clk: tegra: periph: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate(). Note that this change also requires the same migration to drivers/clk/tegra/clk-divider.c. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-periph.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index fa0cd7bb8ee6..6ebeaa7cb656 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -51,16 +51,10 @@ static int clk_periph_determine_rate(struct clk_hw *hw, struct tegra_clk_periph *periph = to_clk_periph(hw); const struct clk_ops *div_ops = periph->div_ops; struct clk_hw *div_hw = &periph->divider.hw; - long rate; __clk_hw_set_clk(div_hw, hw); - rate = div_ops->round_rate(div_hw, req->rate, &req->best_parent_rate); - if (rate < 0) - return rate; - - req->rate = (unsigned long)rate; - return 0; + return div_ops->determine_rate(div_hw, req); } static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate, From 65227c79e09c1399c6a2c01b5b0f4652fd7e5aed Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:05 -0400 Subject: [PATCH 108/120] clk: tegra: pll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-pll.c | 52 ++++++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 100b5d9b7e26..591b9f0c155a 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -840,8 +840,8 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, return ret; } -static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_pll *pll = to_clk_pll(hw); struct tegra_clk_pll_freq_table cfg; @@ -849,15 +849,20 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, if (pll->params->flags & TEGRA_PLL_FIXED) { /* PLLM/MB are used for memory; we do not change rate */ if (pll->params->flags & (TEGRA_PLLM | TEGRA_PLLMB)) - return clk_hw_get_rate(hw); - return pll->params->fixed_rate; + req->rate = clk_hw_get_rate(hw); + else + req->rate = pll->params->fixed_rate; + + return 0; } - if (_get_table_rate(hw, &cfg, rate, *prate) && - pll->params->calc_rate(hw, &cfg, rate, *prate)) + if (_get_table_rate(hw, &cfg, req->rate, req->best_parent_rate) && + pll->params->calc_rate(hw, &cfg, req->rate, req->best_parent_rate)) return -EINVAL; - return cfg.output_rate; + req->rate = cfg.output_rate; + + return 0; } static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, @@ -1057,7 +1062,7 @@ const struct clk_ops tegra_clk_pll_ops = { .enable = clk_pll_enable, .disable = clk_pll_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_round_rate, + .determine_rate = clk_pll_determine_rate, .set_rate = clk_pll_set_rate, .restore_context = tegra_clk_pll_restore_context, }; @@ -1195,7 +1200,7 @@ static const struct clk_ops tegra_clk_pllu_ops = { .enable = clk_pllu_enable, .disable = clk_pll_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_round_rate, + .determine_rate = clk_pll_determine_rate, .set_rate = clk_pll_set_rate, }; @@ -1353,15 +1358,15 @@ static int clk_pllxc_set_rate(struct clk_hw *hw, unsigned long rate, return ret; } -static long clk_pll_ramp_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_pll_ramp_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_pll *pll = to_clk_pll(hw); struct tegra_clk_pll_freq_table cfg; int ret, p_div; - u64 output_rate = *prate; + u64 output_rate = req->best_parent_rate; - ret = _pll_ramp_calc_pll(hw, &cfg, rate, *prate); + ret = _pll_ramp_calc_pll(hw, &cfg, req->rate, req->best_parent_rate); if (ret < 0) return ret; @@ -1375,7 +1380,9 @@ static long clk_pll_ramp_round_rate(struct clk_hw *hw, unsigned long rate, output_rate *= cfg.n; do_div(output_rate, cfg.m * p_div); - return output_rate; + req->rate = output_rate; + + return 0; } static void _pllcx_strobe(struct tegra_clk_pll *pll) @@ -1598,12 +1605,15 @@ static unsigned long clk_pllre_recalc_rate(struct clk_hw *hw, return rate; } -static long clk_pllre_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_pllre_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_pll *pll = to_clk_pll(hw); - return _pllre_calc_rate(pll, NULL, rate, *prate); + req->rate = _pllre_calc_rate(pll, NULL, req->rate, + req->best_parent_rate); + + return 0; } static int clk_plle_tegra114_enable(struct clk_hw *hw) @@ -2003,7 +2013,7 @@ static const struct clk_ops tegra_clk_pllxc_ops = { .enable = clk_pll_enable, .disable = clk_pll_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_ramp_round_rate, + .determine_rate = clk_pll_ramp_determine_rate, .set_rate = clk_pllxc_set_rate, }; @@ -2012,7 +2022,7 @@ static const struct clk_ops tegra_clk_pllc_ops = { .enable = clk_pllc_enable, .disable = clk_pllc_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_ramp_round_rate, + .determine_rate = clk_pll_ramp_determine_rate, .set_rate = clk_pllc_set_rate, }; @@ -2021,7 +2031,7 @@ static const struct clk_ops tegra_clk_pllre_ops = { .enable = clk_pll_enable, .disable = clk_pll_disable, .recalc_rate = clk_pllre_recalc_rate, - .round_rate = clk_pllre_round_rate, + .determine_rate = clk_pllre_determine_rate, .set_rate = clk_pllre_set_rate, }; @@ -2321,7 +2331,7 @@ static const struct clk_ops tegra_clk_pllss_ops = { .enable = clk_pll_enable, .disable = clk_pll_disable, .recalc_rate = clk_pll_recalc_rate, - .round_rate = clk_pll_ramp_round_rate, + .determine_rate = clk_pll_ramp_determine_rate, .set_rate = clk_pllxc_set_rate, .restore_context = tegra_clk_pll_restore_context, }; From 13e19a074be46c1c24648a426c77f148ac88e398 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:06 -0400 Subject: [PATCH 109/120] clk: tegra: super: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate(). Note that this change also requires the same migration to drivers/clk/tegra/clk-divider.c. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-super.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c index 7ec47942720c..51fb356e770e 100644 --- a/drivers/clk/tegra/clk-super.c +++ b/drivers/clk/tegra/clk-super.c @@ -147,17 +147,10 @@ static int clk_super_determine_rate(struct clk_hw *hw, { struct tegra_clk_super_mux *super = to_clk_super_mux(hw); struct clk_hw *div_hw = &super->frac_div.hw; - unsigned long rate; __clk_hw_set_clk(div_hw, hw); - rate = super->div_ops->round_rate(div_hw, req->rate, - &req->best_parent_rate); - if (rate < 0) - return rate; - - req->rate = rate; - return 0; + return super->div_ops->determine_rate(div_hw, req); } static unsigned long clk_super_recalc_rate(struct clk_hw *hw, From 3b9877b162c9a22d38c081184db48bd8b2e5e8cc Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 3 Sep 2025 11:15:07 -0400 Subject: [PATCH 110/120] clk: tegra: tegra210-emc: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/clk/tegra/clk-tegra210-emc.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra210-emc.c b/drivers/clk/tegra/clk-tegra210-emc.c index 672ca8c184d2..fbf3c894eb56 100644 --- a/drivers/clk/tegra/clk-tegra210-emc.c +++ b/drivers/clk/tegra/clk-tegra210-emc.c @@ -86,22 +86,30 @@ static unsigned long tegra210_clk_emc_recalc_rate(struct clk_hw *hw, return DIV_ROUND_UP(parent_rate * 2, div); } -static long tegra210_clk_emc_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int tegra210_clk_emc_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw); struct tegra210_clk_emc_provider *provider = emc->provider; unsigned int i; - if (!provider || !provider->configs || provider->num_configs == 0) - return clk_hw_get_rate(hw); + if (!provider || !provider->configs || provider->num_configs == 0) { + req->rate = clk_hw_get_rate(hw); - for (i = 0; i < provider->num_configs; i++) { - if (provider->configs[i].rate >= rate) - return provider->configs[i].rate; + return 0; } - return provider->configs[i - 1].rate; + for (i = 0; i < provider->num_configs; i++) { + if (provider->configs[i].rate >= req->rate) { + req->rate = provider->configs[i].rate; + + return 0; + } + } + + req->rate = provider->configs[i - 1].rate; + + return 0; } static struct clk *tegra210_clk_emc_find_parent(struct tegra210_clk_emc *emc, @@ -259,7 +267,7 @@ static int tegra210_clk_emc_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops tegra210_clk_emc_ops = { .get_parent = tegra210_clk_emc_get_parent, .recalc_rate = tegra210_clk_emc_recalc_rate, - .round_rate = tegra210_clk_emc_round_rate, + .determine_rate = tegra210_clk_emc_determine_rate, .set_rate = tegra210_clk_emc_set_rate, }; From ec70154c8a5f69604bb7796fd1fe40d22e9396b5 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:06 -0400 Subject: [PATCH 111/120] clk: ti: dpll: remove round_rate() in favor of determine_rate() This driver implements both the determine_rate() and round_rate() clk ops, and the round_rate() clk ops is deprecated. When both are defined, clk_core_determine_round_nolock() from the clk core will only use the determine_rate() clk ops, so let's remove the round_rate() clk ops since it's unused. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/dpll.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 3386bd1903df..1f55554e0d73 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -25,7 +25,6 @@ static const struct clk_ops dpll_m4xen_ck_ops = { .enable = &omap3_noncore_dpll_enable, .disable = &omap3_noncore_dpll_disable, .recalc_rate = &omap4_dpll_regm4xen_recalc, - .round_rate = &omap4_dpll_regm4xen_round_rate, .set_rate = &omap3_noncore_dpll_set_rate, .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, @@ -48,7 +47,6 @@ static const struct clk_ops dpll_ck_ops = { .enable = &omap3_noncore_dpll_enable, .disable = &omap3_noncore_dpll_disable, .recalc_rate = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, .set_rate = &omap3_noncore_dpll_set_rate, .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, @@ -61,7 +59,6 @@ static const struct clk_ops dpll_ck_ops = { static const struct clk_ops dpll_no_gate_ck_ops = { .recalc_rate = &omap3_dpll_recalc, .get_parent = &omap2_init_dpll_parent, - .round_rate = &omap2_dpll_round_rate, .set_rate = &omap3_noncore_dpll_set_rate, .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, @@ -103,7 +100,6 @@ static const struct clk_ops omap3_dpll_ck_ops = { .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, .determine_rate = &omap3_noncore_dpll_determine_rate, - .round_rate = &omap2_dpll_round_rate, }; static const struct clk_ops omap3_dpll5_ck_ops = { @@ -115,7 +111,6 @@ static const struct clk_ops omap3_dpll5_ck_ops = { .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, .determine_rate = &omap3_noncore_dpll_determine_rate, - .round_rate = &omap2_dpll_round_rate, }; static const struct clk_ops omap3_dpll_per_ck_ops = { @@ -127,7 +122,6 @@ static const struct clk_ops omap3_dpll_per_ck_ops = { .set_parent = &omap3_noncore_dpll_set_parent, .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent, .determine_rate = &omap3_noncore_dpll_determine_rate, - .round_rate = &omap2_dpll_round_rate, }; #endif From fa55aea3dcdb309d8c4cc307dedd6c9390d8185e Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:07 -0400 Subject: [PATCH 112/120] clk: ti: dpll: change error return from ~0 to -EINVAL When the requested rate cannot be achieved, omap2_dpll_round_rate() will return ~0. Let's change this to -EINVAL to make the code a little cleaner to read. This is no functional change. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/clkt_dpll.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/ti/clkt_dpll.c b/drivers/clk/ti/clkt_dpll.c index dfaa4d1f0b64..a8c0fc20f791 100644 --- a/drivers/clk/ti/clkt_dpll.c +++ b/drivers/clk/ti/clkt_dpll.c @@ -277,8 +277,8 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) * possible, programmable rate for this DPLL. Attempts to select the * minimum possible n. Stores the computed (m, n) in the DPLL's * dpll_data structure so set_rate() will not need to call this - * (expensive) function again. Returns ~0 if the target rate cannot - * be rounded, or the rounded rate upon success. + * (expensive) function again. Returns -EINVAL if the target rate + * cannot be rounded, or the rounded rate upon success. */ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, unsigned long *parent_rate) @@ -295,7 +295,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, const char *clk_name; if (!clk || !clk->dpll_data) - return ~0; + return -EINVAL; dd = clk->dpll_data; @@ -360,7 +360,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, if (prev_min_delta == LONG_MAX) { pr_debug("clock: %s: cannot round to rate %lu\n", clk_name, target_rate); - return ~0; + return -EINVAL; } dd->last_rounded_m = min_delta_m; From e465ad7ef57aa1ec4122fd5b34c182d59629cb91 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:08 -0400 Subject: [PATCH 113/120] clk: ti: dpll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate(). Part of these changes were done using the Coccinelle semantic patch on the cover letter of this series, and the rest of the changes were manually done. omap4_dpll_regm4xen_round_rate() is now only called by omap4_dpll_regm4xen_determine_rate(), so let's merge that functionality into one function. This is needed for another cleanup to completely remove the round_rate() clk ops from the clk core. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/clkt_dpll.c | 28 ++++++------ drivers/clk/ti/clock.h | 6 +-- drivers/clk/ti/dpll.c | 4 +- drivers/clk/ti/dpll3xxx.c | 7 ++- drivers/clk/ti/dpll44xx.c | 89 +++++++++++++------------------------- include/linux/clk/ti.h | 8 ++-- 6 files changed, 57 insertions(+), 85 deletions(-) diff --git a/drivers/clk/ti/clkt_dpll.c b/drivers/clk/ti/clkt_dpll.c index a8c0fc20f791..2ecd66968af4 100644 --- a/drivers/clk/ti/clkt_dpll.c +++ b/drivers/clk/ti/clkt_dpll.c @@ -268,10 +268,9 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) /* DPLL rate rounding code */ /** - * omap2_dpll_round_rate - round a target rate for an OMAP DPLL + * omap2_dpll_determine_rate - round a target rate for an OMAP DPLL * @hw: struct clk_hw containing the struct clk * for a DPLL - * @target_rate: desired DPLL clock rate - * @parent_rate: parent's DPLL clock rate + * @req: rate request * * Given a DPLL and a desired target rate, round the target rate to a * possible, programmable rate for this DPLL. Attempts to select the @@ -280,8 +279,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) * (expensive) function again. Returns -EINVAL if the target rate * cannot be rounded, or the rounded rate upon success. */ -long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, - unsigned long *parent_rate) +int omap2_dpll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { struct clk_hw_omap *clk = to_clk_hw_omap(hw); int m, n, r, scaled_max_m; @@ -299,15 +297,15 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, dd = clk->dpll_data; - if (dd->max_rate && target_rate > dd->max_rate) - target_rate = dd->max_rate; + if (dd->max_rate && req->rate > dd->max_rate) + req->rate = dd->max_rate; ref_rate = clk_hw_get_rate(dd->clk_ref); clk_name = clk_hw_get_name(hw); pr_debug("clock: %s: starting DPLL round_rate, target rate %lu\n", - clk_name, target_rate); + clk_name, req->rate); - scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); + scaled_rt_rp = req->rate / (ref_rate / DPLL_SCALE_FACTOR); scaled_max_m = dd->max_multiplier * DPLL_SCALE_FACTOR; dd->last_rounded_rate = 0; @@ -332,7 +330,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, if (m > scaled_max_m) break; - r = _dpll_test_mult(&m, n, &new_rate, target_rate, + r = _dpll_test_mult(&m, n, &new_rate, req->rate, ref_rate); /* m can't be set low enough for this n - try with a larger n */ @@ -340,7 +338,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, continue; /* skip rates above our target rate */ - delta = target_rate - new_rate; + delta = req->rate - new_rate; if (delta < 0) continue; @@ -359,13 +357,15 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, if (prev_min_delta == LONG_MAX) { pr_debug("clock: %s: cannot round to rate %lu\n", - clk_name, target_rate); + clk_name, req->rate); return -EINVAL; } dd->last_rounded_m = min_delta_m; dd->last_rounded_n = min_delta_n; - dd->last_rounded_rate = target_rate - prev_min_delta; + dd->last_rounded_rate = req->rate - prev_min_delta; - return dd->last_rounded_rate; + req->rate = dd->last_rounded_rate; + + return 0; } diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index 2de7acea1ea0..d5e24fe4ae3a 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h @@ -273,8 +273,7 @@ int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw, u8 index); int omap3_noncore_dpll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); -long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, - unsigned long *parent_rate); +int omap2_dpll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw, unsigned long parent_rate); @@ -296,9 +295,6 @@ void omap3_clk_lock_dpll5(void); unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, unsigned long parent_rate); -long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, - unsigned long target_rate, - unsigned long *parent_rate); int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)); diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 1f55554e0d73..971adafd9a8b 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -77,7 +77,7 @@ const struct clk_hw_omap_ops clkhwops_omap3_dpll = {}; static const struct clk_ops omap2_dpll_core_ck_ops = { .get_parent = &omap2_init_dpll_parent, .recalc_rate = &omap2_dpllcore_recalc, - .round_rate = &omap2_dpll_round_rate, + .determine_rate = &omap2_dpll_determine_rate, .set_rate = &omap2_reprogram_dpllcore, }; #else @@ -88,7 +88,7 @@ static const struct clk_ops omap2_dpll_core_ck_ops = {}; static const struct clk_ops omap3_dpll_core_ck_ops = { .get_parent = &omap2_init_dpll_parent, .recalc_rate = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, + .determine_rate = &omap2_dpll_determine_rate, }; static const struct clk_ops omap3_dpll_ck_ops = { diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c index 00680486b1bd..8c51b988a04f 100644 --- a/drivers/clk/ti/dpll3xxx.c +++ b/drivers/clk/ti/dpll3xxx.c @@ -587,6 +587,7 @@ int omap3_noncore_dpll_determine_rate(struct clk_hw *hw, { struct clk_hw_omap *clk = to_clk_hw_omap(hw); struct dpll_data *dd; + int ret; if (!req->rate) return -EINVAL; @@ -599,8 +600,10 @@ int omap3_noncore_dpll_determine_rate(struct clk_hw *hw, (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) { req->best_parent_hw = dd->clk_bypass; } else { - req->rate = omap2_dpll_round_rate(hw, req->rate, - &req->best_parent_rate); + ret = omap2_dpll_determine_rate(hw, req); + if (ret != 0) + return ret; + req->best_parent_hw = dd->clk_ref; } diff --git a/drivers/clk/ti/dpll44xx.c b/drivers/clk/ti/dpll44xx.c index 3fc2cab69a3f..08ed57f181b4 100644 --- a/drivers/clk/ti/dpll44xx.c +++ b/drivers/clk/ti/dpll44xx.c @@ -133,61 +133,6 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, return rate; } -/** - * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit - * @hw: struct hw_clk containing the struct clk * of the DPLL to round a rate for - * @target_rate: the desired rate of the DPLL - * @parent_rate: clock rate of the DPLL parent - * - * Compute the rate that would be programmed into the DPLL hardware - * for @clk if set_rate() were to be provided with the rate - * @target_rate. Takes the REGM4XEN bit into consideration, which is - * needed for the OMAP4 ABE DPLL. Returns the rounded rate (before - * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or - * ~0 if an error occurred in omap2_dpll_round_rate(). - */ -long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, - unsigned long target_rate, - unsigned long *parent_rate) -{ - struct clk_hw_omap *clk = to_clk_hw_omap(hw); - struct dpll_data *dd; - long r; - - if (!clk || !clk->dpll_data) - return -EINVAL; - - dd = clk->dpll_data; - - dd->last_rounded_m4xen = 0; - - /* - * First try to compute the DPLL configuration for - * target rate without using the 4X multiplier. - */ - r = omap2_dpll_round_rate(hw, target_rate, NULL); - if (r != ~0) - goto out; - - /* - * If we did not find a valid DPLL configuration, try again, but - * this time see if using the 4X multiplier can help. Enabling the - * 4X multiplier is equivalent to dividing the target rate by 4. - */ - r = omap2_dpll_round_rate(hw, target_rate / OMAP4430_REGM4XEN_MULT, - NULL); - if (r == ~0) - return r; - - dd->last_rounded_rate *= OMAP4430_REGM4XEN_MULT; - dd->last_rounded_m4xen = 1; - -out: - omap4_dpll_lpmode_recalc(dd); - - return dd->last_rounded_rate; -} - /** * omap4_dpll_regm4xen_determine_rate - determine rate for a DPLL * @hw: pointer to the clock to determine rate for @@ -195,7 +140,7 @@ out: * * Determines which DPLL mode to use for reaching a desired rate. * Checks whether the DPLL shall be in bypass or locked mode, and if - * locked, calculates the M,N values for the DPLL via round-rate. + * locked, calculates the M,N values for the DPLL. * Returns 0 on success and a negative error value otherwise. */ int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, @@ -215,8 +160,36 @@ int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) { req->best_parent_hw = dd->clk_bypass; } else { - req->rate = omap4_dpll_regm4xen_round_rate(hw, req->rate, - &req->best_parent_rate); + struct clk_rate_request tmp_req; + long r; + + clk_hw_init_rate_request(hw, &tmp_req, req->rate); + dd->last_rounded_m4xen = 0; + + /* + * First try to compute the DPLL configuration for + * target rate without using the 4X multiplier. + */ + + r = omap2_dpll_determine_rate(hw, &tmp_req); + if (r < 0) { + /* + * If we did not find a valid DPLL configuration, try again, but + * this time see if using the 4X multiplier can help. Enabling the + * 4X multiplier is equivalent to dividing the target rate by 4. + */ + tmp_req.rate /= OMAP4430_REGM4XEN_MULT; + r = omap2_dpll_determine_rate(hw, &tmp_req); + if (r < 0) + return r; + + dd->last_rounded_rate *= OMAP4430_REGM4XEN_MULT; + dd->last_rounded_m4xen = 1; + } + + omap4_dpll_lpmode_recalc(dd); + + req->rate = dd->last_rounded_rate; req->best_parent_hw = dd->clk_ref; } diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index e656f63efdce..54a3fa370004 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -34,14 +34,14 @@ struct clk_omap_reg { * @clk_ref: struct clk_hw pointer to the clock's reference clock input * @control_reg: register containing the DPLL mode bitfield * @enable_mask: mask of the DPLL mode bitfield in @control_reg - * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() - * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() + * @last_rounded_rate: cache of the last rate result of omap2_dpll_determine_rate() + * @last_rounded_m: cache of the last M result of omap2_dpll_determine_rate() * @last_rounded_m4xen: cache of the last M4X result of - * omap4_dpll_regm4xen_round_rate() + * omap4_dpll_regm4xen_determine_rate() * @last_rounded_lpmode: cache of the last lpmode result of * omap4_dpll_lpmode_recalc() * @max_multiplier: maximum valid non-bypass multiplier value (actual) - * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate() + * @last_rounded_n: cache of the last N result of omap2_dpll_determine_rate() * @min_divider: minimum valid non-bypass divider value (actual) * @max_divider: maximum valid non-bypass divider value (actual) * @max_rate: maximum clock rate for the DPLL From 849804453d5aae560dcec94578ae28d671dba937 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:09 -0400 Subject: [PATCH 114/120] clk: ti: composite: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/composite.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c index b85382c370f7..8cba259188d4 100644 --- a/drivers/clk/ti/composite.c +++ b/drivers/clk/ti/composite.c @@ -26,8 +26,8 @@ static unsigned long ti_composite_recalc_rate(struct clk_hw *hw, return ti_clk_divider_ops.recalc_rate(hw, parent_rate); } -static long ti_composite_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int ti_composite_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { return -EINVAL; } @@ -40,7 +40,7 @@ static int ti_composite_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops ti_composite_divider_ops = { .recalc_rate = &ti_composite_recalc_rate, - .round_rate = &ti_composite_round_rate, + .determine_rate = &ti_composite_determine_rate, .set_rate = &ti_composite_set_rate, }; From 7760b3e1729837a814647be524b2b24053324baf Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:10 -0400 Subject: [PATCH 115/120] clk: ti: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/divider.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index ade99ab6cfa9..6f58a0f2e74a 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c @@ -223,13 +223,15 @@ static int ti_clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, return bestdiv; } -static long ti_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int ti_clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { int div; - div = ti_clk_divider_bestdiv(hw, rate, prate); + div = ti_clk_divider_bestdiv(hw, req->rate, &req->best_parent_rate); - return DIV_ROUND_UP(*prate, div); + req->rate = DIV_ROUND_UP(req->best_parent_rate, div); + + return 0; } static int ti_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -299,7 +301,7 @@ static void clk_divider_restore_context(struct clk_hw *hw) const struct clk_ops ti_clk_divider_ops = { .recalc_rate = ti_clk_divider_recalc_rate, - .round_rate = ti_clk_divider_round_rate, + .determine_rate = ti_clk_divider_determine_rate, .set_rate = ti_clk_divider_set_rate, .save_context = clk_divider_save_context, .restore_context = clk_divider_restore_context, From 48f8fb402a4f897de78e12956c52c90ab35e4d79 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:11 -0400 Subject: [PATCH 116/120] clk: ti: dra7-atl: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/clk-dra7-atl.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c index 0eab7f3e2eab..b02f84d49b96 100644 --- a/drivers/clk/ti/clk-dra7-atl.c +++ b/drivers/clk/ti/clk-dra7-atl.c @@ -120,16 +120,18 @@ static unsigned long atl_clk_recalc_rate(struct clk_hw *hw, return parent_rate / cdesc->divider; } -static long atl_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int atl_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned divider; - divider = (*parent_rate + rate / 2) / rate; + divider = (req->best_parent_rate + req->rate / 2) / req->rate; if (divider > DRA7_ATL_DIVIDER_MASK + 1) divider = DRA7_ATL_DIVIDER_MASK + 1; - return *parent_rate / divider; + req->rate = req->best_parent_rate / divider; + + return 0; } static int atl_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -156,7 +158,7 @@ static const struct clk_ops atl_clk_ops = { .disable = atl_clk_disable, .is_enabled = atl_clk_is_enabled, .recalc_rate = atl_clk_recalc_rate, - .round_rate = atl_clk_round_rate, + .determine_rate = atl_clk_determine_rate, .set_rate = atl_clk_set_rate, }; From d8a97749bab7f4e1561ba52e41b576175897b13f Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Mon, 11 Aug 2025 08:48:12 -0400 Subject: [PATCH 117/120] clk: ti: fapll: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Brian Masney --- drivers/clk/ti/fapll.c | 48 ++++++++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c index 2db3fc4a443e..4f28138d2d8a 100644 --- a/drivers/clk/ti/fapll.c +++ b/drivers/clk/ti/fapll.c @@ -214,24 +214,27 @@ static int ti_fapll_set_div_mult(unsigned long rate, return 0; } -static long ti_fapll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ti_fapll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u32 pre_div_p, mult_n; int error; - if (!rate) + if (!req->rate) return -EINVAL; - error = ti_fapll_set_div_mult(rate, *parent_rate, + error = ti_fapll_set_div_mult(req->rate, req->best_parent_rate, &pre_div_p, &mult_n); - if (error) - return error; + if (error) { + req->rate = error; - rate = *parent_rate / pre_div_p; - rate *= mult_n; + return 0; + } - return rate; + req->rate = req->best_parent_rate / pre_div_p; + req->rate *= mult_n; + + return 0; } static int ti_fapll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -268,7 +271,7 @@ static const struct clk_ops ti_fapll_ops = { .is_enabled = ti_fapll_is_enabled, .recalc_rate = ti_fapll_recalc_rate, .get_parent = ti_fapll_get_parent, - .round_rate = ti_fapll_round_rate, + .determine_rate = ti_fapll_determine_rate, .set_rate = ti_fapll_set_rate, }; @@ -399,14 +402,14 @@ static u32 ti_fapll_synth_set_frac_rate(struct fapll_synth *synth, return post_div_m; } -static long ti_fapll_synth_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ti_fapll_synth_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct fapll_synth *synth = to_synth(hw); struct fapll_data *fd = synth->fd; unsigned long r; - if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) + if (ti_fapll_clock_is_bypass(fd) || !synth->div || !req->rate) return -EINVAL; /* Only post divider m available with no fractional divider? */ @@ -414,23 +417,26 @@ static long ti_fapll_synth_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long frac_rate; u32 synth_post_div_m; - frac_rate = ti_fapll_synth_get_frac_rate(hw, *parent_rate); - synth_post_div_m = DIV_ROUND_UP(frac_rate, rate); + frac_rate = ti_fapll_synth_get_frac_rate(hw, + req->best_parent_rate); + synth_post_div_m = DIV_ROUND_UP(frac_rate, req->rate); r = DIV_ROUND_UP(frac_rate, synth_post_div_m); goto out; } - r = *parent_rate * SYNTH_PHASE_K; - if (rate > r) + r = req->best_parent_rate * SYNTH_PHASE_K; + if (req->rate > r) goto out; r = DIV_ROUND_UP_ULL(r, SYNTH_MAX_INT_DIV * SYNTH_MAX_DIV_M); - if (rate < r) + if (req->rate < r) goto out; - r = rate; + r = req->rate; out: - return r; + req->rate = r; + + return 0; } static int ti_fapll_synth_set_rate(struct clk_hw *hw, unsigned long rate, @@ -477,7 +483,7 @@ static const struct clk_ops ti_fapll_synt_ops = { .disable = ti_fapll_synth_disable, .is_enabled = ti_fapll_synth_is_enabled, .recalc_rate = ti_fapll_synth_recalc_rate, - .round_rate = ti_fapll_synth_round_rate, + .determine_rate = ti_fapll_synth_determine_rate, .set_rate = ti_fapll_synth_set_rate, }; From 80cb2b6edd8368f7e1e8bf2f66aabf57aa7de4b7 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Wed, 27 Aug 2025 13:12:07 -0400 Subject: [PATCH 118/120] clk: scmi: migrate round_rate() to determine_rate() This driver implements both the determine_rate() and round_rate() clk ops, and the round_rate() clk ops is deprecated. When both are defined, clk_core_determine_round_nolock() from the clk core will only use the determine_rate() clk ops. The existing scmi_clk_determine_rate() is a noop implementation that lets the firmware round the rate as appropriate. Drop the existing determine_rate implementation and convert the existing round_rate() implementation over to determine_rate(). scmi_clk_determine_rate() was added recently when the clock parent support was added, so it's not expected that this change will regress anything. Reviewed-by: Sudeep Holla Reviewed-by: Peng Fan Tested-by: Peng Fan #i.MX95-19x19-EVK Signed-off-by: Brian Masney --- drivers/clk/clk-scmi.c | 35 ++++++++++++++++------------------- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index d2408403283f..78dd2d9c7cab 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -54,8 +54,8 @@ static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw, return rate; } -static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int scmi_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { u64 fmin, fmax, ftmp; struct scmi_clk *clk = to_scmi_clk(hw); @@ -67,20 +67,27 @@ static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate, * running at then. */ if (clk->info->rate_discrete) - return rate; + return 0; fmin = clk->info->range.min_rate; fmax = clk->info->range.max_rate; - if (rate <= fmin) - return fmin; - else if (rate >= fmax) - return fmax; + if (req->rate <= fmin) { + req->rate = fmin; - ftmp = rate - fmin; + return 0; + } else if (req->rate >= fmax) { + req->rate = fmax; + + return 0; + } + + ftmp = req->rate - fmin; ftmp += clk->info->range.step_size - 1; /* to round up */ do_div(ftmp, clk->info->range.step_size); - return ftmp * clk->info->range.step_size + fmin; + req->rate = ftmp * clk->info->range.step_size + fmin; + + return 0; } static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -119,15 +126,6 @@ static u8 scmi_clk_get_parent(struct clk_hw *hw) return p_idx; } -static int scmi_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) -{ - /* - * Suppose all the requested rates are supported, and let firmware - * to handle the left work. - */ - return 0; -} - static int scmi_clk_enable(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); @@ -300,7 +298,6 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) /* Rate ops */ ops->recalc_rate = scmi_clk_recalc_rate; - ops->round_rate = scmi_clk_round_rate; ops->determine_rate = scmi_clk_determine_rate; if (feats_key & BIT(SCMI_CLK_RATE_CTRL_SUPPORTED)) ops->set_rate = scmi_clk_set_rate; From 1624dead9a4d288a594fdf19735ebfe4bb567cb8 Mon Sep 17 00:00:00 2001 From: Alok Tiwari Date: Sun, 6 Jul 2025 13:11:55 -0700 Subject: [PATCH 119/120] clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver The conditional check for the PLL0 multiplier 'm' used a logical AND instead of OR, making the range check ineffective. This patch replaces && with || to correctly reject invalid values of 'm' that are either less than or equal to 0 or greater than LPC18XX_PLL0_MSEL_MAX. This ensures proper bounds checking during clk rate setting and rounding. Fixes: b04e0b8fd544 ("clk: add lpc18xx cgu clk driver") Signed-off-by: Alok Tiwari [sboyd@kernel.org: 'm' is unsigned so remove < condition] Signed-off-by: Stephen Boyd --- drivers/clk/nxp/clk-lpc18xx-cgu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/nxp/clk-lpc18xx-cgu.c b/drivers/clk/nxp/clk-lpc18xx-cgu.c index 30e0b283ca60..b9e204d63a97 100644 --- a/drivers/clk/nxp/clk-lpc18xx-cgu.c +++ b/drivers/clk/nxp/clk-lpc18xx-cgu.c @@ -381,7 +381,7 @@ static int lpc18xx_pll0_determine_rate(struct clk_hw *hw, } m = DIV_ROUND_UP_ULL(req->best_parent_rate, req->rate * 2); - if (m <= 0 && m > LPC18XX_PLL0_MSEL_MAX) { + if (m == 0 || m > LPC18XX_PLL0_MSEL_MAX) { pr_warn("%s: unable to support rate %lu\n", __func__, req->rate); return -EINVAL; } @@ -404,7 +404,7 @@ static int lpc18xx_pll0_set_rate(struct clk_hw *hw, unsigned long rate, } m = DIV_ROUND_UP_ULL(parent_rate, rate * 2); - if (m <= 0 && m > LPC18XX_PLL0_MSEL_MAX) { + if (m == 0 || m > LPC18XX_PLL0_MSEL_MAX) { pr_warn("%s: unable to support rate %lu\n", __func__, rate); return -EINVAL; } From 7d85cd8730ab7701a1cafd0db0d7b6b1f6cfbb91 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Sat, 27 Sep 2025 20:34:34 -0400 Subject: [PATCH 120/120] clk: microchip: core: remove duplicate roclk_determine_rate() Fix compiler error caused by the round_rate() to determine_rate() migration. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202509280327.jsapR0Ww-lkp@intel.com/ Signed-off-by: Brian Masney Fixes: e9f039c08cdc ("clk: microchip: core: convert from round_rate() to determine_rate()") Signed-off-by: Stephen Boyd --- drivers/clk/microchip/clk-core.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c index 3e03e10539c7..b34348d491f3 100644 --- a/drivers/clk/microchip/clk-core.c +++ b/drivers/clk/microchip/clk-core.c @@ -374,20 +374,6 @@ static unsigned long roclk_recalc_rate(struct clk_hw *hw, return roclk_calc_rate(parent_rate, rodiv, rotrim); } -static int roclk_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - u32 rotrim, rodiv; - - /* calculate dividers for new rate */ - roclk_calc_div_trim(req->rate, req->best_parent_rate, &rodiv, &rotrim); - - /* caclulate new rate (rounding) based on new rodiv & rotrim */ - req->rate = roclk_calc_rate(req->best_parent_rate, rodiv, rotrim); - - return 0; -} - static int roclk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { @@ -398,6 +384,8 @@ static int roclk_determine_rate(struct clk_hw *hw, /* find a parent which can generate nearest clkrate >= rate */ for (i = 0; i < clk_hw_get_num_parents(hw); i++) { + u32 rotrim, rodiv; + /* get parent */ parent_clk = clk_hw_get_parent_by_index(hw, i); if (!parent_clk) @@ -408,7 +396,12 @@ static int roclk_determine_rate(struct clk_hw *hw, if (req->rate > parent_rate) continue; - nearest_rate = roclk_round_rate(hw, req->rate, &parent_rate); + /* calculate dividers for new rate */ + roclk_calc_div_trim(req->rate, req->best_parent_rate, &rodiv, &rotrim); + + /* caclulate new rate (rounding) based on new rodiv & rotrim */ + nearest_rate = roclk_calc_rate(req->best_parent_rate, rodiv, rotrim); + delta = abs(nearest_rate - req->rate); if ((nearest_rate >= req->rate) && (delta < best_delta)) { best_parent_clk = parent_clk;