drm/i915: use struct drm_device for clock gating funcs

While we want to refactor intel_clock_gating.[ch] and likely move a lot
of display related code to display, start off with a little intermediate
change to use struct drm_device in the interface instead of struct
drm_i915_private, to allow us to drop another dependency on i915_drv.h
and struct drm_i915_private.

Cc: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patch.msgid.link/20251121112200.3435099-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula 2025-11-21 13:22:00 +02:00
parent ac16a7ec04
commit 0a9231590f
7 changed files with 18 additions and 17 deletions

View file

@ -1415,8 +1415,6 @@ static void hsw_enable_pc8(struct intel_display *display)
static void hsw_disable_pc8(struct intel_display *display)
{
struct drm_i915_private __maybe_unused *dev_priv = to_i915(display->drm);
drm_dbg_kms(display->drm, "Disabling package C8+\n");
hsw_restore_lcpll(display);
@ -1424,7 +1422,7 @@ static void hsw_disable_pc8(struct intel_display *display)
/* Many display registers don't survive PC8+ */
#ifdef I915 /* FIXME */
intel_clock_gating_init(dev_priv);
intel_clock_gating_init(display->drm);
#endif
}

View file

@ -6,13 +6,13 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_print.h>
#include "i915_drv.h"
#include "intel_clock_gating.h"
#include "intel_cx0_phy.h"
#include "intel_display_core.h"
#include "intel_display_driver.h"
#include "intel_display_reset.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_hotplug.h"
#include "intel_pps.h"
@ -79,7 +79,6 @@ bool intel_display_reset_prepare(struct intel_display *display,
void intel_display_reset_finish(struct intel_display *display, bool test_only)
{
struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_modeset_acquire_ctx *ctx = &display->restore.reset_ctx;
struct drm_atomic_state *state;
int ret;
@ -107,7 +106,7 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
*/
intel_pps_unlock_regs_wa(display);
intel_display_driver_init_hw(display);
intel_clock_gating_init(i915);
intel_clock_gating_init(display->drm);
intel_cx0_pll_power_save_wa(display);
intel_hpd_init(display);

View file

@ -263,7 +263,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
intel_irq_init(dev_priv);
intel_display_driver_early_probe(display);
intel_clock_gating_hooks_init(dev_priv);
intel_clock_gating_hooks_init(&dev_priv->drm);
intel_detect_preproduction_hw(dev_priv);
@ -1276,7 +1276,7 @@ static int i915_drm_resume(struct drm_device *dev)
intel_display_driver_init_hw(display);
intel_clock_gating_init(dev_priv);
intel_clock_gating_init(&dev_priv->drm);
if (intel_display_device_present(display))
intel_display_driver_resume_access(display);

View file

@ -1184,7 +1184,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
*
* FIXME: break up the workarounds and apply them at the right time!
*/
intel_clock_gating_init(dev_priv);
intel_clock_gating_init(&dev_priv->drm);
for_each_gt(gt, dev_priv, i) {
ret = intel_gt_init(gt);
@ -1235,7 +1235,7 @@ err_unlock:
/* Minimal basic recovery for KMS */
ret = i915_ggtt_enable_hw(dev_priv);
i915_ggtt_resume(to_gt(dev_priv)->ggtt);
intel_clock_gating_init(dev_priv);
intel_clock_gating_init(&dev_priv->drm);
}
i915_gem_drain_freed_objects(dev_priv);

View file

@ -709,8 +709,10 @@ static void i830_init_clock_gating(struct drm_i915_private *i915)
_MASKED_BIT_ENABLE(MEM_DISPLAY_B_TRICKLE_FEED_DISABLE));
}
void intel_clock_gating_init(struct drm_i915_private *i915)
void intel_clock_gating_init(struct drm_device *drm)
{
struct drm_i915_private *i915 = to_i915(drm);
i915->clock_gating_funcs->init_clock_gating(i915);
}
@ -749,15 +751,17 @@ CG_FUNCS(nop);
/**
* intel_clock_gating_hooks_init - setup the clock gating hooks
* @i915: device private
* @drm: drm device
*
* Setup the hooks that configure which clocks of a given platform can be
* gated and also apply various GT and display specific workarounds for these
* platforms. Note that some GT specific workarounds are applied separately
* when GPU contexts or batchbuffers start their execution.
*/
void intel_clock_gating_hooks_init(struct drm_i915_private *i915)
void intel_clock_gating_hooks_init(struct drm_device *drm)
{
struct drm_i915_private *i915 = to_i915(drm);
if (IS_DG2(i915))
i915->clock_gating_funcs = &dg2_clock_gating_funcs;
else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))

View file

@ -6,9 +6,9 @@
#ifndef __INTEL_CLOCK_GATING_H__
#define __INTEL_CLOCK_GATING_H__
struct drm_i915_private;
struct drm_device;
void intel_clock_gating_init(struct drm_i915_private *i915);
void intel_clock_gating_hooks_init(struct drm_i915_private *i915);
void intel_clock_gating_init(struct drm_device *drm);
void intel_clock_gating_hooks_init(struct drm_device *drm);
#endif /* __INTEL_CLOCK_GATING_H__ */

View file

@ -453,7 +453,7 @@ int vlv_resume_prepare(struct drm_i915_private *dev_priv, bool rpm_resume)
vlv_check_no_gt_access(dev_priv);
if (rpm_resume)
intel_clock_gating_init(dev_priv);
intel_clock_gating_init(&dev_priv->drm);
return ret;
}