From 44f6d951028f121a167347cbf91dd519b5bf5c80 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 11 Dec 2025 17:45:51 +0900 Subject: [PATCH 01/60] dt-bindings: bus: aspeed: Require syscon for AST2600 AHB controller The AST2600's ACRY (eliptic curve and RSA crypto engine) requires access to configuration exposed by the AHB controller. The devicetree already describes the AHB controller node as a syscon, so require this in the binding to satisfy the ACRY relationship. Signed-off-by: Andrew Jeffery Link: https://patch.msgid.link/20251211-dev-dt-warnings-all-v1-9-21b18b9ada77@codeconstruct.com.au Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml index 2894256c976d..77e60b32d52e 100644 --- a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml +++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml @@ -17,8 +17,10 @@ description: | properties: compatible: - enum: - - aspeed,ast2600-ahbc + items: + - enum: + - aspeed,ast2600-ahbc + - const: syscon reg: maxItems: 1 @@ -32,6 +34,6 @@ additionalProperties: false examples: - | ahbc@1e600000 { - compatible = "aspeed,ast2600-ahbc"; + compatible = "aspeed,ast2600-ahbc", "syscon"; reg = <0x1e600000 0x100>; }; From 1a0c2bf998bb90e1d7450ad6b3b47f9e428375a7 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 11 Dec 2025 17:45:52 +0900 Subject: [PATCH 02/60] dt-bindings: crypto: Document aspeed,ahbc property for Aspeed ACRY The g6 DTSI already provides the property and the driver errors out if the AHB controller's syscon can't be located, so define the property and mark it as required. Signed-off-by: Andrew Jeffery Link: https://patch.msgid.link/20251211-dev-dt-warnings-all-v1-10-21b18b9ada77@codeconstruct.com.au Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/crypto/aspeed,ast2600-acry.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml index b18f178aac06..0dac6ee5043e 100644 --- a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml +++ b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml @@ -30,11 +30,17 @@ properties: interrupts: maxItems: 1 + aspeed,ahbc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle to the AHB controller node, which must be a syscon + required: - compatible - reg - clocks - interrupts + - aspeed,ahbc additionalProperties: false @@ -46,4 +52,5 @@ examples: reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; interrupts = <160>; clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; + aspeed,ahbc = <&ahbc>; }; From 400fbf4b5870f42b651371303730290ca7a8dd78 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 8 Dec 2025 16:43:03 -0600 Subject: [PATCH 03/60] dt-bindings: kbuild: Support single binding targets Running the full 'make dt_binding_check' is slow. A shortcut is to set DT_SCHEMA_FILES env variable to a substring of DT schema files to test. It both limits which examples are validated and which schemas are used to validate the examples. This is a problem because errors from other schemas are missed. What makes validation slow is checking all examples, so we really just need a way to test a single example. Add a %.yaml target to validate the schema and validate the example: make example-schema.yaml The behavior for 'make dt_binding_check DT_SCHEMA_FILES=example-schema' is unchanged. Really it should mirror dtbs_check and validate all the examples with a subset of schemas, but there are lots of users of expecting the existing behavior. Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251208224304.2907913-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/Makefile | 5 ++++- .../devicetree/bindings/writing-schema.rst | 12 ++++++++---- Makefile | 14 ++++++++++---- 3 files changed, 22 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 8d6f85f4455d..1e116425ad70 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -82,5 +82,8 @@ clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \ dt_compatible_check: $(obj)/processed-schema.json $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $< +PHONY += dt_binding_check_one +dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked + PHONY += dt_binding_check -dt_binding_check: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(CHK_DT_EXAMPLES) +dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 05c34248e544..2ff5b0565a31 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -214,6 +214,10 @@ binding schema. All of the DT binding documents can be validated using the make dt_binding_check +Or to validate a single schema and its example:: + + make sram/sram.yaml + In order to perform validation of DT source files, use the ``dtbs_check`` target:: make dtbs_check @@ -226,10 +230,10 @@ It is possible to run both in a single command:: make dt_binding_check dtbs_check -It is also possible to run checks with a subset of matching schema files by -setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or -patterns (partial match of a fixed string). Each file or pattern should be -separated by ':'. +It is also possible to combine running the above commands with a subset of +matching schema files by setting the ``DT_SCHEMA_FILES`` variable to 1 or more +specific schema files or patterns (partial match of a fixed string). Each file +or pattern should be separated by ':'. :: diff --git a/Makefile b/Makefile index e404e4767944..54eb78206d2d 100644 --- a/Makefile +++ b/Makefile @@ -1506,6 +1506,12 @@ ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/boot/dts/),) dtstree := arch/$(SRCARCH)/boot/dts endif +dtbindingtree := Documentation/devicetree/bindings + +%.yaml: dtbs_prepare + $(Q)$(MAKE) $(build)=$(dtbindingtree) \ + $(dtbindingtree)/$(patsubst %.yaml,%.example.dtb,$@) dt_binding_check_one + ifneq ($(dtstree),) %.dtb: dtbs_prepare @@ -1523,7 +1529,7 @@ dtbs: dtbs_prepare # dtbs_install depend on it as dtbs_install may run as root. dtbs_prepare: include/config/kernel.release scripts_dtc -ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),) +ifneq ($(filter dtbs_check %.yaml, $(MAKECMDGOALS)),) export CHECK_DTBS=y endif @@ -1556,14 +1562,14 @@ endif PHONY += dt_binding_check dt_binding_schemas dt_binding_check: dt_binding_schemas scripts_dtc - $(Q)$(MAKE) $(build)=Documentation/devicetree/bindings $@ + $(Q)$(MAKE) $(build)=$(dtbindingtree) $@ dt_binding_schemas: - $(Q)$(MAKE) $(build)=Documentation/devicetree/bindings + $(Q)$(MAKE) $(build)=$(dtbindingtree) PHONY += dt_compatible_check dt_compatible_check: dt_binding_schemas - $(Q)$(MAKE) $(build)=Documentation/devicetree/bindings $@ + $(Q)$(MAKE) $(build)=$(dtbindingtree) $@ # --------------------------------------------------------------------------- # Modules From 417bc40dc1807f10a41a88f56750c665b9cd0f6a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 12:34:55 -0600 Subject: [PATCH 04/60] MAINTAINERS: Add Makefile.dtb* to DT maintainers Since the DT related parts of kbuild are now split out to separate makefiles, list them in the DT maintainer section so they don't fall thru the cracks. Acked-by: Nathan Chancellor Acked-by: Nicolas Schier Link: https://patch.msgid.link/20251215191421.3137362-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5b11839cba9d..cfd00518df3c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19557,6 +19557,7 @@ F: include/linux/of*.h F: rust/helpers/of.c F: rust/kernel/of.rs F: scripts/dtc/ +F: scripts/Makefile.dtb* F: tools/testing/selftests/dt/ K: of_overlay_notifier_ K: of_overlay_fdt_apply From ddd77dd055bdd61424ea429569ee8343c47eeb68 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:29:32 -0600 Subject: [PATCH 05/60] dt-bindings: arm,vexpress-juno: Allow interrupt-map properties in bus node Allow interrupt-map properties which are already used in the bus node. Reviewed-by: Sudeep Holla Link: https://patch.msgid.link/20251215212932.3324144-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/arm,vexpress-juno.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 4cdca5320544..eae558c2758b 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -157,6 +157,12 @@ patternProperties: - const: simple-bus - const: simple-bus + "#interrupt-cells": + const: 1 + + interrupt-map: true + interrupt-map-mask: true + patternProperties: '^motherboard-bus@': type: object From 533db14fdfe38539358568be782b7817155f95c0 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:29:14 -0600 Subject: [PATCH 06/60] dt-bindings: arm: vexpress-config: Update clock and regulator node names The clock and regulator node names were updated to use standard node names, but the binding wasn't updated. Reviewed-by: Sudeep Holla Link: https://patch.msgid.link/20251215212914.3323741-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/vexpress-config.yaml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/vexpress-config.yaml b/Documentation/devicetree/bindings/arm/vexpress-config.yaml index b74380da3198..41c53e3acc12 100644 --- a/Documentation/devicetree/bindings/arm/vexpress-config.yaml +++ b/Documentation/devicetree/bindings/arm/vexpress-config.yaml @@ -103,7 +103,7 @@ required: - arm,vexpress,config-bridge patternProperties: - 'clk[0-9]*$': + '^clock-controller.*$': type: object description: clocks @@ -137,7 +137,7 @@ patternProperties: - arm,vexpress-sysreg,func - "#clock-cells" - "^volt-.+$": + "^regulator-.+$": $ref: /schemas/regulator/regulator.yaml# properties: compatible: @@ -272,7 +272,7 @@ examples: compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - clk0 { + clock-controller { compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; #clock-cells = <0>; From 180547ebd86cdb089f657c0666de8853a2d1571c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:26:59 -0600 Subject: [PATCH 07/60] dt-bindings: bus: stm32mp25-rifsc: Allow 2 size cells There are users already with 2 size cells, and there's no reason to not support that. Reviewed-by: Gatien Chevallier Link: https://patch.msgid.link/20251215212700.3320634-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml index 4d19917ad2c3..c6280c8c54a3 100644 --- a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml +++ b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml @@ -54,7 +54,7 @@ properties: const: 1 "#size-cells": - const: 1 + enum: [ 1, 2 ] ranges: true From ff7e082ea40d70b7613e8db2cb11e3555ebcc546 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 12 Dec 2025 17:11:52 -0600 Subject: [PATCH 08/60] dt-bindings: Remove unused includes Remove includes which are not referenced by either DTS files or drivers. There's a few more which are new, so they are excluded for now. Reviewed-by: Linus Walleij Acked-by: Mark Brown Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251212231203.727227-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- include/dt-bindings/clock/oxsemi,ox810se.h | 19 -- include/dt-bindings/clock/oxsemi,ox820.h | 29 -- include/dt-bindings/clock/qcom,mss-sc7180.h | 12 - include/dt-bindings/clock/xlnx-versal-clk.h | 123 --------- include/dt-bindings/clock/xlnx-zynqmp-clk.h | 133 --------- include/dt-bindings/dma/jz4775-dma.h | 44 --- include/dt-bindings/dma/x2000-dma.h | 54 ---- include/dt-bindings/gce/mt6779-gce.h | 222 --------------- include/dt-bindings/memory/mt6779-larb-port.h | 206 -------------- include/dt-bindings/mux/ti-serdes.h | 190 ------------- include/dt-bindings/pinctrl/mt6397-pinfunc.h | 257 ------------------ include/dt-bindings/reset/bcm6318-reset.h | 20 -- include/dt-bindings/reset/imx8ulp-pcc-reset.h | 59 ---- include/dt-bindings/reset/oxsemi,ox810se.h | 42 --- include/dt-bindings/reset/oxsemi,ox820.h | 42 --- include/dt-bindings/sound/audio-jack-events.h | 10 - 16 files changed, 1462 deletions(-) delete mode 100644 include/dt-bindings/clock/oxsemi,ox810se.h delete mode 100644 include/dt-bindings/clock/oxsemi,ox820.h delete mode 100644 include/dt-bindings/clock/qcom,mss-sc7180.h delete mode 100644 include/dt-bindings/clock/xlnx-versal-clk.h delete mode 100644 include/dt-bindings/clock/xlnx-zynqmp-clk.h delete mode 100644 include/dt-bindings/dma/jz4775-dma.h delete mode 100644 include/dt-bindings/dma/x2000-dma.h delete mode 100644 include/dt-bindings/gce/mt6779-gce.h delete mode 100644 include/dt-bindings/memory/mt6779-larb-port.h delete mode 100644 include/dt-bindings/mux/ti-serdes.h delete mode 100644 include/dt-bindings/pinctrl/mt6397-pinfunc.h delete mode 100644 include/dt-bindings/reset/bcm6318-reset.h delete mode 100644 include/dt-bindings/reset/imx8ulp-pcc-reset.h delete mode 100644 include/dt-bindings/reset/oxsemi,ox810se.h delete mode 100644 include/dt-bindings/reset/oxsemi,ox820.h delete mode 100644 include/dt-bindings/sound/audio-jack-events.h diff --git a/include/dt-bindings/clock/oxsemi,ox810se.h b/include/dt-bindings/clock/oxsemi,ox810se.h deleted file mode 100644 index 7256365160f8..000000000000 --- a/include/dt-bindings/clock/oxsemi,ox810se.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2016 Neil Armstrong - */ - -#ifndef DT_CLOCK_OXSEMI_OX810SE_H -#define DT_CLOCK_OXSEMI_OX810SE_H - -#define CLK_810_LEON 0 -#define CLK_810_DMA_SGDMA 1 -#define CLK_810_CIPHER 2 -#define CLK_810_SATA 3 -#define CLK_810_AUDIO 4 -#define CLK_810_USBMPH 5 -#define CLK_810_ETHA 6 -#define CLK_810_PCIEA 7 -#define CLK_810_NAND 8 - -#endif /* DT_CLOCK_OXSEMI_OX810SE_H */ diff --git a/include/dt-bindings/clock/oxsemi,ox820.h b/include/dt-bindings/clock/oxsemi,ox820.h deleted file mode 100644 index 55f4226e2f3f..000000000000 --- a/include/dt-bindings/clock/oxsemi,ox820.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2016 Neil Armstrong - */ - -#ifndef DT_CLOCK_OXSEMI_OX820_H -#define DT_CLOCK_OXSEMI_OX820_H - -/* PLLs */ -#define CLK_820_PLLA 0 -#define CLK_820_PLLB 1 - -/* Gate Clocks */ -#define CLK_820_LEON 2 -#define CLK_820_DMA_SGDMA 3 -#define CLK_820_CIPHER 4 -#define CLK_820_SD 5 -#define CLK_820_SATA 6 -#define CLK_820_AUDIO 7 -#define CLK_820_USBMPH 8 -#define CLK_820_ETHA 9 -#define CLK_820_PCIEA 10 -#define CLK_820_NAND 11 -#define CLK_820_PCIEB 12 -#define CLK_820_ETHB 13 -#define CLK_820_REF600 14 -#define CLK_820_USBDEV 15 - -#endif /* DT_CLOCK_OXSEMI_OX820_H */ diff --git a/include/dt-bindings/clock/qcom,mss-sc7180.h b/include/dt-bindings/clock/qcom,mss-sc7180.h deleted file mode 100644 index f15a9ded2961..000000000000 --- a/include/dt-bindings/clock/qcom,mss-sc7180.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. - */ - -#ifndef _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H -#define _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H - -#define MSS_AXI_CRYPTO_CLK 0 -#define MSS_AXI_NAV_CLK 1 - -#endif diff --git a/include/dt-bindings/clock/xlnx-versal-clk.h b/include/dt-bindings/clock/xlnx-versal-clk.h deleted file mode 100644 index 264d634d226e..000000000000 --- a/include/dt-bindings/clock/xlnx-versal-clk.h +++ /dev/null @@ -1,123 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2019 Xilinx Inc. - * - */ - -#ifndef _DT_BINDINGS_CLK_VERSAL_H -#define _DT_BINDINGS_CLK_VERSAL_H - -#define PMC_PLL 1 -#define APU_PLL 2 -#define RPU_PLL 3 -#define CPM_PLL 4 -#define NOC_PLL 5 -#define PLL_MAX 6 -#define PMC_PRESRC 7 -#define PMC_POSTCLK 8 -#define PMC_PLL_OUT 9 -#define PPLL 10 -#define NOC_PRESRC 11 -#define NOC_POSTCLK 12 -#define NOC_PLL_OUT 13 -#define NPLL 14 -#define APU_PRESRC 15 -#define APU_POSTCLK 16 -#define APU_PLL_OUT 17 -#define APLL 18 -#define RPU_PRESRC 19 -#define RPU_POSTCLK 20 -#define RPU_PLL_OUT 21 -#define RPLL 22 -#define CPM_PRESRC 23 -#define CPM_POSTCLK 24 -#define CPM_PLL_OUT 25 -#define CPLL 26 -#define PPLL_TO_XPD 27 -#define NPLL_TO_XPD 28 -#define APLL_TO_XPD 29 -#define RPLL_TO_XPD 30 -#define EFUSE_REF 31 -#define SYSMON_REF 32 -#define IRO_SUSPEND_REF 33 -#define USB_SUSPEND 34 -#define SWITCH_TIMEOUT 35 -#define RCLK_PMC 36 -#define RCLK_LPD 37 -#define WDT 38 -#define TTC0 39 -#define TTC1 40 -#define TTC2 41 -#define TTC3 42 -#define GEM_TSU 43 -#define GEM_TSU_LB 44 -#define MUXED_IRO_DIV2 45 -#define MUXED_IRO_DIV4 46 -#define PSM_REF 47 -#define GEM0_RX 48 -#define GEM0_TX 49 -#define GEM1_RX 50 -#define GEM1_TX 51 -#define CPM_CORE_REF 52 -#define CPM_LSBUS_REF 53 -#define CPM_DBG_REF 54 -#define CPM_AUX0_REF 55 -#define CPM_AUX1_REF 56 -#define QSPI_REF 57 -#define OSPI_REF 58 -#define SDIO0_REF 59 -#define SDIO1_REF 60 -#define PMC_LSBUS_REF 61 -#define I2C_REF 62 -#define TEST_PATTERN_REF 63 -#define DFT_OSC_REF 64 -#define PMC_PL0_REF 65 -#define PMC_PL1_REF 66 -#define PMC_PL2_REF 67 -#define PMC_PL3_REF 68 -#define CFU_REF 69 -#define SPARE_REF 70 -#define NPI_REF 71 -#define HSM0_REF 72 -#define HSM1_REF 73 -#define SD_DLL_REF 74 -#define FPD_TOP_SWITCH 75 -#define FPD_LSBUS 76 -#define ACPU 77 -#define DBG_TRACE 78 -#define DBG_FPD 79 -#define LPD_TOP_SWITCH 80 -#define ADMA 81 -#define LPD_LSBUS 82 -#define CPU_R5 83 -#define CPU_R5_CORE 84 -#define CPU_R5_OCM 85 -#define CPU_R5_OCM2 86 -#define IOU_SWITCH 87 -#define GEM0_REF 88 -#define GEM1_REF 89 -#define GEM_TSU_REF 90 -#define USB0_BUS_REF 91 -#define UART0_REF 92 -#define UART1_REF 93 -#define SPI0_REF 94 -#define SPI1_REF 95 -#define CAN0_REF 96 -#define CAN1_REF 97 -#define I2C0_REF 98 -#define I2C1_REF 99 -#define DBG_LPD 100 -#define TIMESTAMP_REF 101 -#define DBG_TSTMP 102 -#define CPM_TOPSW_REF 103 -#define USB3_DUAL_REF 104 -#define OUTCLK_MAX 105 -#define REF_CLK 106 -#define PL_ALT_REF_CLK 107 -#define MUXED_IRO 108 -#define PL_EXT 109 -#define PL_LB 110 -#define MIO_50_OR_51 111 -#define MIO_24_OR_25 112 - -#endif diff --git a/include/dt-bindings/clock/xlnx-zynqmp-clk.h b/include/dt-bindings/clock/xlnx-zynqmp-clk.h deleted file mode 100644 index f0f7ddd3dcbd..000000000000 --- a/include/dt-bindings/clock/xlnx-zynqmp-clk.h +++ /dev/null @@ -1,133 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Xilinx Zynq MPSoC Firmware layer - * - * Copyright (C) 2014-2018 Xilinx, Inc. - * - */ - -#ifndef _DT_BINDINGS_CLK_ZYNQMP_H -#define _DT_BINDINGS_CLK_ZYNQMP_H - -/* - * These bindings are deprecated, because they do not match the actual - * concept of bindings but rather contain pure firmware values. - * Instead include the header in the DTS source directory. - */ -#warning "These bindings are deprecated. Instead use the header in the DTS source directory." - -#define IOPLL 0 -#define RPLL 1 -#define APLL 2 -#define DPLL 3 -#define VPLL 4 -#define IOPLL_TO_FPD 5 -#define RPLL_TO_FPD 6 -#define APLL_TO_LPD 7 -#define DPLL_TO_LPD 8 -#define VPLL_TO_LPD 9 -#define ACPU 10 -#define ACPU_HALF 11 -#define DBF_FPD 12 -#define DBF_LPD 13 -#define DBG_TRACE 14 -#define DBG_TSTMP 15 -#define DP_VIDEO_REF 16 -#define DP_AUDIO_REF 17 -#define DP_STC_REF 18 -#define GDMA_REF 19 -#define DPDMA_REF 20 -#define DDR_REF 21 -#define SATA_REF 22 -#define PCIE_REF 23 -#define GPU_REF 24 -#define GPU_PP0_REF 25 -#define GPU_PP1_REF 26 -#define TOPSW_MAIN 27 -#define TOPSW_LSBUS 28 -#define GTGREF0_REF 29 -#define LPD_SWITCH 30 -#define LPD_LSBUS 31 -#define USB0_BUS_REF 32 -#define USB1_BUS_REF 33 -#define USB3_DUAL_REF 34 -#define USB0 35 -#define USB1 36 -#define CPU_R5 37 -#define CPU_R5_CORE 38 -#define CSU_SPB 39 -#define CSU_PLL 40 -#define PCAP 41 -#define IOU_SWITCH 42 -#define GEM_TSU_REF 43 -#define GEM_TSU 44 -#define GEM0_TX 45 -#define GEM1_TX 46 -#define GEM2_TX 47 -#define GEM3_TX 48 -#define GEM0_RX 49 -#define GEM1_RX 50 -#define GEM2_RX 51 -#define GEM3_RX 52 -#define QSPI_REF 53 -#define SDIO0_REF 54 -#define SDIO1_REF 55 -#define UART0_REF 56 -#define UART1_REF 57 -#define SPI0_REF 58 -#define SPI1_REF 59 -#define NAND_REF 60 -#define I2C0_REF 61 -#define I2C1_REF 62 -#define CAN0_REF 63 -#define CAN1_REF 64 -#define CAN0 65 -#define CAN1 66 -#define DLL_REF 67 -#define ADMA_REF 68 -#define TIMESTAMP_REF 69 -#define AMS_REF 70 -#define PL0_REF 71 -#define PL1_REF 72 -#define PL2_REF 73 -#define PL3_REF 74 -#define WDT 75 -#define IOPLL_INT 76 -#define IOPLL_PRE_SRC 77 -#define IOPLL_HALF 78 -#define IOPLL_INT_MUX 79 -#define IOPLL_POST_SRC 80 -#define RPLL_INT 81 -#define RPLL_PRE_SRC 82 -#define RPLL_HALF 83 -#define RPLL_INT_MUX 84 -#define RPLL_POST_SRC 85 -#define APLL_INT 86 -#define APLL_PRE_SRC 87 -#define APLL_HALF 88 -#define APLL_INT_MUX 89 -#define APLL_POST_SRC 90 -#define DPLL_INT 91 -#define DPLL_PRE_SRC 92 -#define DPLL_HALF 93 -#define DPLL_INT_MUX 94 -#define DPLL_POST_SRC 95 -#define VPLL_INT 96 -#define VPLL_PRE_SRC 97 -#define VPLL_HALF 98 -#define VPLL_INT_MUX 99 -#define VPLL_POST_SRC 100 -#define CAN0_MIO 101 -#define CAN1_MIO 102 -#define ACPU_FULL 103 -#define GEM0_REF 104 -#define GEM1_REF 105 -#define GEM2_REF 106 -#define GEM3_REF 107 -#define GEM0_REF_UNG 108 -#define GEM1_REF_UNG 109 -#define GEM2_REF_UNG 110 -#define GEM3_REF_UNG 111 -#define LPD_WDT 112 - -#endif diff --git a/include/dt-bindings/dma/jz4775-dma.h b/include/dt-bindings/dma/jz4775-dma.h deleted file mode 100644 index 8d27e2c69dca..000000000000 --- a/include/dt-bindings/dma/jz4775-dma.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * This header provides macros for JZ4775 DMA bindings. - * - * Copyright (c) 2020 周琰杰 (Zhou Yanjie) - */ - -#ifndef __DT_BINDINGS_DMA_JZ4775_DMA_H__ -#define __DT_BINDINGS_DMA_JZ4775_DMA_H__ - -/* - * Request type numbers for the JZ4775 DMA controller (written to the DRTn - * register for the channel). - */ -#define JZ4775_DMA_I2S0_TX 0x6 -#define JZ4775_DMA_I2S0_RX 0x7 -#define JZ4775_DMA_AUTO 0x8 -#define JZ4775_DMA_SADC_RX 0x9 -#define JZ4775_DMA_UART3_TX 0x0e -#define JZ4775_DMA_UART3_RX 0x0f -#define JZ4775_DMA_UART2_TX 0x10 -#define JZ4775_DMA_UART2_RX 0x11 -#define JZ4775_DMA_UART1_TX 0x12 -#define JZ4775_DMA_UART1_RX 0x13 -#define JZ4775_DMA_UART0_TX 0x14 -#define JZ4775_DMA_UART0_RX 0x15 -#define JZ4775_DMA_SSI0_TX 0x16 -#define JZ4775_DMA_SSI0_RX 0x17 -#define JZ4775_DMA_MSC0_TX 0x1a -#define JZ4775_DMA_MSC0_RX 0x1b -#define JZ4775_DMA_MSC1_TX 0x1c -#define JZ4775_DMA_MSC1_RX 0x1d -#define JZ4775_DMA_MSC2_TX 0x1e -#define JZ4775_DMA_MSC2_RX 0x1f -#define JZ4775_DMA_PCM0_TX 0x20 -#define JZ4775_DMA_PCM0_RX 0x21 -#define JZ4775_DMA_SMB0_TX 0x24 -#define JZ4775_DMA_SMB0_RX 0x25 -#define JZ4775_DMA_SMB1_TX 0x26 -#define JZ4775_DMA_SMB1_RX 0x27 -#define JZ4775_DMA_SMB2_TX 0x28 -#define JZ4775_DMA_SMB2_RX 0x29 - -#endif /* __DT_BINDINGS_DMA_JZ4775_DMA_H__ */ diff --git a/include/dt-bindings/dma/x2000-dma.h b/include/dt-bindings/dma/x2000-dma.h deleted file mode 100644 index db2cd4830b00..000000000000 --- a/include/dt-bindings/dma/x2000-dma.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * This header provides macros for X2000 DMA bindings. - * - * Copyright (c) 2020 周琰杰 (Zhou Yanjie) - */ - -#ifndef __DT_BINDINGS_DMA_X2000_DMA_H__ -#define __DT_BINDINGS_DMA_X2000_DMA_H__ - -/* - * Request type numbers for the X2000 DMA controller (written to the DRTn - * register for the channel). - */ -#define X2000_DMA_AUTO 0x8 -#define X2000_DMA_UART5_TX 0xa -#define X2000_DMA_UART5_RX 0xb -#define X2000_DMA_UART4_TX 0xc -#define X2000_DMA_UART4_RX 0xd -#define X2000_DMA_UART3_TX 0xe -#define X2000_DMA_UART3_RX 0xf -#define X2000_DMA_UART2_TX 0x10 -#define X2000_DMA_UART2_RX 0x11 -#define X2000_DMA_UART1_TX 0x12 -#define X2000_DMA_UART1_RX 0x13 -#define X2000_DMA_UART0_TX 0x14 -#define X2000_DMA_UART0_RX 0x15 -#define X2000_DMA_SSI0_TX 0x16 -#define X2000_DMA_SSI0_RX 0x17 -#define X2000_DMA_SSI1_TX 0x18 -#define X2000_DMA_SSI1_RX 0x19 -#define X2000_DMA_I2C0_TX 0x24 -#define X2000_DMA_I2C0_RX 0x25 -#define X2000_DMA_I2C1_TX 0x26 -#define X2000_DMA_I2C1_RX 0x27 -#define X2000_DMA_I2C2_TX 0x28 -#define X2000_DMA_I2C2_RX 0x29 -#define X2000_DMA_I2C3_TX 0x2a -#define X2000_DMA_I2C3_RX 0x2b -#define X2000_DMA_I2C4_TX 0x2c -#define X2000_DMA_I2C4_RX 0x2d -#define X2000_DMA_I2C5_TX 0x2e -#define X2000_DMA_I2C5_RX 0x2f -#define X2000_DMA_UART6_TX 0x30 -#define X2000_DMA_UART6_RX 0x31 -#define X2000_DMA_UART7_TX 0x32 -#define X2000_DMA_UART7_RX 0x33 -#define X2000_DMA_UART8_TX 0x34 -#define X2000_DMA_UART8_RX 0x35 -#define X2000_DMA_UART9_TX 0x36 -#define X2000_DMA_UART9_RX 0x37 -#define X2000_DMA_SADC_RX 0x38 - -#endif /* __DT_BINDINGS_DMA_X2000_DMA_H__ */ diff --git a/include/dt-bindings/gce/mt6779-gce.h b/include/dt-bindings/gce/mt6779-gce.h deleted file mode 100644 index 06101316ace4..000000000000 --- a/include/dt-bindings/gce/mt6779-gce.h +++ /dev/null @@ -1,222 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. - * Author: Dennis-YC Hsieh - */ - -#ifndef _DT_BINDINGS_GCE_MT6779_H -#define _DT_BINDINGS_GCE_MT6779_H - -#define CMDQ_NO_TIMEOUT 0xffffffff - -/* GCE HW thread priority */ -#define CMDQ_THR_PRIO_LOWEST 0 -#define CMDQ_THR_PRIO_1 1 -#define CMDQ_THR_PRIO_2 2 -#define CMDQ_THR_PRIO_3 3 -#define CMDQ_THR_PRIO_4 4 -#define CMDQ_THR_PRIO_5 5 -#define CMDQ_THR_PRIO_6 6 -#define CMDQ_THR_PRIO_HIGHEST 7 - -/* GCE subsys table */ -#define SUBSYS_1300XXXX 0 -#define SUBSYS_1400XXXX 1 -#define SUBSYS_1401XXXX 2 -#define SUBSYS_1402XXXX 3 -#define SUBSYS_1502XXXX 4 -#define SUBSYS_1880XXXX 5 -#define SUBSYS_1881XXXX 6 -#define SUBSYS_1882XXXX 7 -#define SUBSYS_1883XXXX 8 -#define SUBSYS_1884XXXX 9 -#define SUBSYS_1000XXXX 10 -#define SUBSYS_1001XXXX 11 -#define SUBSYS_1002XXXX 12 -#define SUBSYS_1003XXXX 13 -#define SUBSYS_1004XXXX 14 -#define SUBSYS_1005XXXX 15 -#define SUBSYS_1020XXXX 16 -#define SUBSYS_1028XXXX 17 -#define SUBSYS_1700XXXX 18 -#define SUBSYS_1701XXXX 19 -#define SUBSYS_1702XXXX 20 -#define SUBSYS_1703XXXX 21 -#define SUBSYS_1800XXXX 22 -#define SUBSYS_1801XXXX 23 -#define SUBSYS_1802XXXX 24 -#define SUBSYS_1804XXXX 25 -#define SUBSYS_1805XXXX 26 -#define SUBSYS_1808XXXX 27 -#define SUBSYS_180aXXXX 28 -#define SUBSYS_180bXXXX 29 -#define CMDQ_SUBSYS_OFF 32 - -/* GCE hardware events */ -#define CMDQ_EVENT_DISP_RDMA0_SOF 0 -#define CMDQ_EVENT_DISP_RDMA1_SOF 1 -#define CMDQ_EVENT_MDP_RDMA0_SOF 2 -#define CMDQ_EVENT_MDP_RDMA1_SOF 3 -#define CMDQ_EVENT_MDP_RSZ0_SOF 4 -#define CMDQ_EVENT_MDP_RSZ1_SOF 5 -#define CMDQ_EVENT_MDP_TDSHP_SOF 6 -#define CMDQ_EVENT_MDP_WROT0_SOF 7 -#define CMDQ_EVENT_MDP_WROT1_SOF 8 -#define CMDQ_EVENT_DISP_OVL0_SOF 9 -#define CMDQ_EVENT_DISP_2L_OVL0_SOF 10 -#define CMDQ_EVENT_DISP_2L_OVL1_SOF 11 -#define CMDQ_EVENT_DISP_WDMA0_SOF 12 -#define CMDQ_EVENT_DISP_COLOR0_SOF 13 -#define CMDQ_EVENT_DISP_CCORR0_SOF 14 -#define CMDQ_EVENT_DISP_AAL0_SOF 15 -#define CMDQ_EVENT_DISP_GAMMA0_SOF 16 -#define CMDQ_EVENT_DISP_DITHER0_SOF 17 -#define CMDQ_EVENT_DISP_PWM0_SOF 18 -#define CMDQ_EVENT_DISP_DSI0_SOF 19 -#define CMDQ_EVENT_DISP_DPI0_SOF 20 -#define CMDQ_EVENT_DISP_POSTMASK0_SOF 21 -#define CMDQ_EVENT_DISP_RSZ0_SOF 22 -#define CMDQ_EVENT_MDP_AAL_SOF 23 -#define CMDQ_EVENT_MDP_CCORR_SOF 24 -#define CMDQ_EVENT_DISP_DBI0_SOF 25 -#define CMDQ_EVENT_ISP_RELAY_SOF 26 -#define CMDQ_EVENT_IPU_RELAY_SOF 27 -#define CMDQ_EVENT_DISP_RDMA0_EOF 28 -#define CMDQ_EVENT_DISP_RDMA1_EOF 29 -#define CMDQ_EVENT_MDP_RDMA0_EOF 30 -#define CMDQ_EVENT_MDP_RDMA1_EOF 31 -#define CMDQ_EVENT_MDP_RSZ0_EOF 32 -#define CMDQ_EVENT_MDP_RSZ1_EOF 33 -#define CMDQ_EVENT_MDP_TDSHP_EOF 34 -#define CMDQ_EVENT_MDP_WROT0_W_EOF 35 -#define CMDQ_EVENT_MDP_WROT1_W_EOF 36 -#define CMDQ_EVENT_DISP_OVL0_EOF 37 -#define CMDQ_EVENT_DISP_2L_OVL0_EOF 38 -#define CMDQ_EVENT_DISP_2L_OVL1_EOF 39 -#define CMDQ_EVENT_DISP_WDMA0_EOF 40 -#define CMDQ_EVENT_DISP_COLOR0_EOF 41 -#define CMDQ_EVENT_DISP_CCORR0_EOF 42 -#define CMDQ_EVENT_DISP_AAL0_EOF 43 -#define CMDQ_EVENT_DISP_GAMMA0_EOF 44 -#define CMDQ_EVENT_DISP_DITHER0_EOF 45 -#define CMDQ_EVENT_DISP_DSI0_EOF 46 -#define CMDQ_EVENT_DISP_DPI0_EOF 47 -#define CMDQ_EVENT_DISP_RSZ0_EOF 49 -#define CMDQ_EVENT_MDP_AAL_FRAME_DONE 50 -#define CMDQ_EVENT_MDP_CCORR_FRAME_DONE 51 -#define CMDQ_EVENT_DISP_POSTMASK0_FRAME_DONE 52 -#define CMDQ_EVENT_MUTEX0_STREAM_EOF 130 -#define CMDQ_EVENT_MUTEX1_STREAM_EOF 131 -#define CMDQ_EVENT_MUTEX2_STREAM_EOF 132 -#define CMDQ_EVENT_MUTEX3_STREAM_EOF 133 -#define CMDQ_EVENT_MUTEX4_STREAM_EOF 134 -#define CMDQ_EVENT_MUTEX5_STREAM_EOF 135 -#define CMDQ_EVENT_MUTEX6_STREAM_EOF 136 -#define CMDQ_EVENT_MUTEX7_STREAM_EOF 137 -#define CMDQ_EVENT_MUTEX8_STREAM_EOF 138 -#define CMDQ_EVENT_MUTEX9_STREAM_EOF 139 -#define CMDQ_EVENT_MUTEX10_STREAM_EOF 140 -#define CMDQ_EVENT_MUTEX11_STREAM_EOF 141 -#define CMDQ_EVENT_DISP_RDMA0_UNDERRUN 142 -#define CMDQ_EVENT_DISP_RDMA1_UNDERRUN 143 -#define CMDQ_EVENT_DISP_RDMA2_UNDERRUN 144 -#define CMDQ_EVENT_DISP_RDMA3_UNDERRUN 145 -#define CMDQ_EVENT_DSI0_TE 146 -#define CMDQ_EVENT_DSI0_IRQ_EVENT 147 -#define CMDQ_EVENT_DSI0_DONE_EVENT 148 -#define CMDQ_EVENT_DISP_POSTMASK0_RST_DONE 150 -#define CMDQ_EVENT_DISP_WDMA0_RST_DONE 151 -#define CMDQ_EVENT_MDP_WROT0_RST_DONE 153 -#define CMDQ_EVENT_MDP_RDMA0_RST_DONE 154 -#define CMDQ_EVENT_DISP_OVL0_RST_DONE 155 -#define CMDQ_EVENT_DISP_OVL0_2L_RST_DONE 156 -#define CMDQ_EVENT_DISP_OVL1_2L_RST_DONE 157 -#define CMDQ_EVENT_DIP_CQ_THREAD0_EOF 257 -#define CMDQ_EVENT_DIP_CQ_THREAD1_EOF 258 -#define CMDQ_EVENT_DIP_CQ_THREAD2_EOF 259 -#define CMDQ_EVENT_DIP_CQ_THREAD3_EOF 260 -#define CMDQ_EVENT_DIP_CQ_THREAD4_EOF 261 -#define CMDQ_EVENT_DIP_CQ_THREAD5_EOF 262 -#define CMDQ_EVENT_DIP_CQ_THREAD6_EOF 263 -#define CMDQ_EVENT_DIP_CQ_THREAD7_EOF 264 -#define CMDQ_EVENT_DIP_CQ_THREAD8_EOF 265 -#define CMDQ_EVENT_DIP_CQ_THREAD9_EOF 266 -#define CMDQ_EVENT_DIP_CQ_THREAD10_EOF 267 -#define CMDQ_EVENT_DIP_CQ_THREAD11_EOF 268 -#define CMDQ_EVENT_DIP_CQ_THREAD12_EOF 269 -#define CMDQ_EVENT_DIP_CQ_THREAD13_EOF 270 -#define CMDQ_EVENT_DIP_CQ_THREAD14_EOF 271 -#define CMDQ_EVENT_DIP_CQ_THREAD15_EOF 272 -#define CMDQ_EVENT_DIP_CQ_THREAD16_EOF 273 -#define CMDQ_EVENT_DIP_CQ_THREAD17_EOF 274 -#define CMDQ_EVENT_DIP_CQ_THREAD18_EOF 275 -#define CMDQ_EVENT_DIP_DMA_ERR_EVENT 276 -#define CMDQ_EVENT_AMD_FRAME_DONE 277 -#define CMDQ_EVENT_MFB_DONE 278 -#define CMDQ_EVENT_WPE_A_EOF 279 -#define CMDQ_EVENT_VENC_EOF 289 -#define CMDQ_EVENT_VENC_CMDQ_PAUSE_DONE 290 -#define CMDQ_EVENT_JPEG_ENC_EOF 291 -#define CMDQ_EVENT_VENC_MB_DONE 292 -#define CMDQ_EVENT_VENC_128BYTE_CNT_DONE 293 -#define CMDQ_EVENT_ISP_FRAME_DONE_A 321 -#define CMDQ_EVENT_ISP_FRAME_DONE_B 322 -#define CMDQ_EVENT_ISP_FRAME_DONE_C 323 -#define CMDQ_EVENT_ISP_CAMSV_0_PASS1_DONE 324 -#define CMDQ_EVENT_ISP_CAMSV_0_2_PASS1_DONE 325 -#define CMDQ_EVENT_ISP_CAMSV_1_PASS1_DONE 326 -#define CMDQ_EVENT_ISP_CAMSV_2_PASS1_DONE 327 -#define CMDQ_EVENT_ISP_CAMSV_3_PASS1_DONE 328 -#define CMDQ_EVENT_ISP_TSF_DONE 329 -#define CMDQ_EVENT_SENINF_0_FIFO_FULL 330 -#define CMDQ_EVENT_SENINF_1_FIFO_FULL 331 -#define CMDQ_EVENT_SENINF_2_FIFO_FULL 332 -#define CMDQ_EVENT_SENINF_3_FIFO_FULL 333 -#define CMDQ_EVENT_SENINF_4_FIFO_FULL 334 -#define CMDQ_EVENT_SENINF_5_FIFO_FULL 335 -#define CMDQ_EVENT_SENINF_6_FIFO_FULL 336 -#define CMDQ_EVENT_SENINF_7_FIFO_FULL 337 -#define CMDQ_EVENT_TG_OVRUN_A_INT_DLY 338 -#define CMDQ_EVENT_TG_OVRUN_B_INT_DLY 339 -#define CMDQ_EVENT_TG_OVRUN_C_INT 340 -#define CMDQ_EVENT_TG_GRABERR_A_INT_DLY 341 -#define CMDQ_EVENT_TG_GRABERR_B_INT_DLY 342 -#define CMDQ_EVENT_TG_GRABERR_C_INT 343 -#define CMDQ_EVENT_CQ_VR_SNAP_A_INT_DLY 344 -#define CMDQ_EVENT_CQ_VR_SNAP_B_INT_DLY 345 -#define CMDQ_EVENT_CQ_VR_SNAP_C_INT 346 -#define CMDQ_EVENT_DMA_R1_ERROR_A_INT_DLY 347 -#define CMDQ_EVENT_DMA_R1_ERROR_B_INT_DLY 348 -#define CMDQ_EVENT_DMA_R1_ERROR_C_INT 349 -#define CMDQ_EVENT_APU_GCE_CORE0_EVENT_0 353 -#define CMDQ_EVENT_APU_GCE_CORE0_EVENT_1 354 -#define CMDQ_EVENT_APU_GCE_CORE0_EVENT_2 355 -#define CMDQ_EVENT_APU_GCE_CORE0_EVENT_3 356 -#define CMDQ_EVENT_APU_GCE_CORE1_EVENT_0 385 -#define CMDQ_EVENT_APU_GCE_CORE1_EVENT_1 386 -#define CMDQ_EVENT_APU_GCE_CORE1_EVENT_2 387 -#define CMDQ_EVENT_APU_GCE_CORE1_EVENT_3 388 -#define CMDQ_EVENT_VDEC_EVENT_0 416 -#define CMDQ_EVENT_VDEC_EVENT_1 417 -#define CMDQ_EVENT_VDEC_EVENT_2 418 -#define CMDQ_EVENT_VDEC_EVENT_3 419 -#define CMDQ_EVENT_VDEC_EVENT_4 420 -#define CMDQ_EVENT_VDEC_EVENT_5 421 -#define CMDQ_EVENT_VDEC_EVENT_6 422 -#define CMDQ_EVENT_VDEC_EVENT_7 423 -#define CMDQ_EVENT_VDEC_EVENT_8 424 -#define CMDQ_EVENT_VDEC_EVENT_9 425 -#define CMDQ_EVENT_VDEC_EVENT_10 426 -#define CMDQ_EVENT_VDEC_EVENT_11 427 -#define CMDQ_EVENT_VDEC_EVENT_12 428 -#define CMDQ_EVENT_VDEC_EVENT_13 429 -#define CMDQ_EVENT_VDEC_EVENT_14 430 -#define CMDQ_EVENT_VDEC_EVENT_15 431 -#define CMDQ_EVENT_FDVT_DONE 449 -#define CMDQ_EVENT_FE_DONE 450 -#define CMDQ_EVENT_RSC_EOF 451 -#define CMDQ_EVENT_DVS_DONE_ASYNC_SHOT 452 -#define CMDQ_EVENT_DVP_DONE_ASYNC_SHOT 453 -#define CMDQ_EVENT_DSI0_TE_INFRA 898 - -#endif diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h deleted file mode 100644 index 3fb438a96e35..000000000000 --- a/include/dt-bindings/memory/mt6779-larb-port.h +++ /dev/null @@ -1,206 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. - * Author: Chao Hao - */ - -#ifndef _DT_BINDINGS_MEMORY_MT6779_LARB_PORT_H_ -#define _DT_BINDINGS_MEMORY_MT6779_LARB_PORT_H_ - -#include - -#define M4U_LARB0_ID 0 -#define M4U_LARB1_ID 1 -#define M4U_LARB2_ID 2 -#define M4U_LARB3_ID 3 -#define M4U_LARB4_ID 4 -#define M4U_LARB5_ID 5 -#define M4U_LARB6_ID 6 -#define M4U_LARB7_ID 7 -#define M4U_LARB8_ID 8 -#define M4U_LARB9_ID 9 -#define M4U_LARB10_ID 10 -#define M4U_LARB11_ID 11 - -/* larb0 */ -#define M4U_PORT_DISP_POSTMASK0 MTK_M4U_ID(M4U_LARB0_ID, 0) -#define M4U_PORT_DISP_OVL0_HDR MTK_M4U_ID(M4U_LARB0_ID, 1) -#define M4U_PORT_DISP_OVL1_HDR MTK_M4U_ID(M4U_LARB0_ID, 2) -#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 3) -#define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB0_ID, 4) -#define M4U_PORT_DISP_PVRIC0 MTK_M4U_ID(M4U_LARB0_ID, 5) -#define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) -#define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) -#define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 8) - -/* larb1 */ -#define M4U_PORT_DISP_OVL0_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 0) -#define M4U_PORT_DISP_OVL1_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 1) -#define M4U_PORT_DISP_OVL0_2L MTK_M4U_ID(M4U_LARB1_ID, 2) -#define M4U_PORT_DISP_OVL1_2L MTK_M4U_ID(M4U_LARB1_ID, 3) -#define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB1_ID, 4) -#define M4U_PORT_MDP_PVRIC0 MTK_M4U_ID(M4U_LARB1_ID, 5) -#define M4U_PORT_MDP_PVRIC1 MTK_M4U_ID(M4U_LARB1_ID, 6) -#define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB1_ID, 7) -#define M4U_PORT_MDP_RDMA1 MTK_M4U_ID(M4U_LARB1_ID, 8) -#define M4U_PORT_MDP_WROT0_R MTK_M4U_ID(M4U_LARB1_ID, 9) -#define M4U_PORT_MDP_WROT0_W MTK_M4U_ID(M4U_LARB1_ID, 10) -#define M4U_PORT_MDP_WROT1_R MTK_M4U_ID(M4U_LARB1_ID, 11) -#define M4U_PORT_MDP_WROT1_W MTK_M4U_ID(M4U_LARB1_ID, 12) -#define M4U_PORT_DISP_FAKE1 MTK_M4U_ID(M4U_LARB1_ID, 13) - -/* larb2-VDEC */ -#define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0) -#define M4U_PORT_HW_VDEC_UFO_EXT MTK_M4U_ID(M4U_LARB2_ID, 1) -#define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 2) -#define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 3) -#define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 4) -#define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 5) -#define M4U_PORT_HW_VDEC_TILE_EXT MTK_M4U_ID(M4U_LARB2_ID, 6) -#define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 7) -#define M4U_PORT_HW_VDEC_VLD2_EXT MTK_M4U_ID(M4U_LARB2_ID, 8) -#define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB2_ID, 9) -#define M4U_PORT_HW_VDEC_UFO_ENC_EXT MTK_M4U_ID(M4U_LARB2_ID, 10) -#define M4U_PORT_HW_VDEC_RG_CTRL_DMA_EXT MTK_M4U_ID(M4U_LARB2_ID, 11) - -/* larb3-VENC */ -#define M4U_PORT_VENC_RCPU MTK_M4U_ID(M4U_LARB3_ID, 0) -#define M4U_PORT_VENC_REC MTK_M4U_ID(M4U_LARB3_ID, 1) -#define M4U_PORT_VENC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 2) -#define M4U_PORT_VENC_SV_COMV MTK_M4U_ID(M4U_LARB3_ID, 3) -#define M4U_PORT_VENC_RD_COMV MTK_M4U_ID(M4U_LARB3_ID, 4) -#define M4U_PORT_VENC_NBM_RDMA MTK_M4U_ID(M4U_LARB3_ID, 5) -#define M4U_PORT_VENC_NBM_RDMA_LITE MTK_M4U_ID(M4U_LARB3_ID, 6) -#define M4U_PORT_JPGENC_Y_RDMA MTK_M4U_ID(M4U_LARB3_ID, 7) -#define M4U_PORT_JPGENC_C_RDMA MTK_M4U_ID(M4U_LARB3_ID, 8) -#define M4U_PORT_JPGENC_Q_TABLE MTK_M4U_ID(M4U_LARB3_ID, 9) -#define M4U_PORT_JPGENC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 10) -#define M4U_PORT_JPGDEC_WDMA MTK_M4U_ID(M4U_LARB3_ID, 11) -#define M4U_PORT_JPGDEC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 12) -#define M4U_PORT_VENC_NBM_WDMA MTK_M4U_ID(M4U_LARB3_ID, 13) -#define M4U_PORT_VENC_NBM_WDMA_LITE MTK_M4U_ID(M4U_LARB3_ID, 14) -#define M4U_PORT_VENC_CUR_LUMA MTK_M4U_ID(M4U_LARB3_ID, 15) -#define M4U_PORT_VENC_CUR_CHROMA MTK_M4U_ID(M4U_LARB3_ID, 16) -#define M4U_PORT_VENC_REF_LUMA MTK_M4U_ID(M4U_LARB3_ID, 17) -#define M4U_PORT_VENC_REF_CHROMA MTK_M4U_ID(M4U_LARB3_ID, 18) - -/* larb4-dummy */ - -/* larb5-IMG */ -#define M4U_PORT_IMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 0) -#define M4U_PORT_IMGBI_D1 MTK_M4U_ID(M4U_LARB5_ID, 1) -#define M4U_PORT_DMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 2) -#define M4U_PORT_DEPI_D1 MTK_M4U_ID(M4U_LARB5_ID, 3) -#define M4U_PORT_LCEI_D1 MTK_M4U_ID(M4U_LARB5_ID, 4) -#define M4U_PORT_SMTI_D1 MTK_M4U_ID(M4U_LARB5_ID, 5) -#define M4U_PORT_SMTO_D2 MTK_M4U_ID(M4U_LARB5_ID, 6) -#define M4U_PORT_SMTO_D1 MTK_M4U_ID(M4U_LARB5_ID, 7) -#define M4U_PORT_CRZO_D1 MTK_M4U_ID(M4U_LARB5_ID, 8) -#define M4U_PORT_IMG3O_D1 MTK_M4U_ID(M4U_LARB5_ID, 9) -#define M4U_PORT_VIPI_D1 MTK_M4U_ID(M4U_LARB5_ID, 10) -#define M4U_PORT_WPE_RDMA1 MTK_M4U_ID(M4U_LARB5_ID, 11) -#define M4U_PORT_WPE_RDMA0 MTK_M4U_ID(M4U_LARB5_ID, 12) -#define M4U_PORT_WPE_WDMA MTK_M4U_ID(M4U_LARB5_ID, 13) -#define M4U_PORT_TIMGO_D1 MTK_M4U_ID(M4U_LARB5_ID, 14) -#define M4U_PORT_MFB_RDMA0 MTK_M4U_ID(M4U_LARB5_ID, 15) -#define M4U_PORT_MFB_RDMA1 MTK_M4U_ID(M4U_LARB5_ID, 16) -#define M4U_PORT_MFB_RDMA2 MTK_M4U_ID(M4U_LARB5_ID, 17) -#define M4U_PORT_MFB_RDMA3 MTK_M4U_ID(M4U_LARB5_ID, 18) -#define M4U_PORT_MFB_WDMA MTK_M4U_ID(M4U_LARB5_ID, 19) -#define M4U_PORT_RESERVE1 MTK_M4U_ID(M4U_LARB5_ID, 20) -#define M4U_PORT_RESERVE2 MTK_M4U_ID(M4U_LARB5_ID, 21) -#define M4U_PORT_RESERVE3 MTK_M4U_ID(M4U_LARB5_ID, 22) -#define M4U_PORT_RESERVE4 MTK_M4U_ID(M4U_LARB5_ID, 23) -#define M4U_PORT_RESERVE5 MTK_M4U_ID(M4U_LARB5_ID, 24) -#define M4U_PORT_RESERVE6 MTK_M4U_ID(M4U_LARB5_ID, 25) - -/* larb6-IMG-VPU */ -#define M4U_PORT_IMG_IPUO MTK_M4U_ID(M4U_LARB6_ID, 0) -#define M4U_PORT_IMG_IPU3O MTK_M4U_ID(M4U_LARB6_ID, 1) -#define M4U_PORT_IMG_IPUI MTK_M4U_ID(M4U_LARB6_ID, 2) - -/* larb7-DVS */ -#define M4U_PORT_DVS_RDMA MTK_M4U_ID(M4U_LARB7_ID, 0) -#define M4U_PORT_DVS_WDMA MTK_M4U_ID(M4U_LARB7_ID, 1) -#define M4U_PORT_DVP_RDMA MTK_M4U_ID(M4U_LARB7_ID, 2) -#define M4U_PORT_DVP_WDMA MTK_M4U_ID(M4U_LARB7_ID, 3) - -/* larb8-IPESYS */ -#define M4U_PORT_FDVT_RDA MTK_M4U_ID(M4U_LARB8_ID, 0) -#define M4U_PORT_FDVT_RDB MTK_M4U_ID(M4U_LARB8_ID, 1) -#define M4U_PORT_FDVT_WRA MTK_M4U_ID(M4U_LARB8_ID, 2) -#define M4U_PORT_FDVT_WRB MTK_M4U_ID(M4U_LARB8_ID, 3) -#define M4U_PORT_FE_RD0 MTK_M4U_ID(M4U_LARB8_ID, 4) -#define M4U_PORT_FE_RD1 MTK_M4U_ID(M4U_LARB8_ID, 5) -#define M4U_PORT_FE_WR0 MTK_M4U_ID(M4U_LARB8_ID, 6) -#define M4U_PORT_FE_WR1 MTK_M4U_ID(M4U_LARB8_ID, 7) -#define M4U_PORT_RSC_RDMA0 MTK_M4U_ID(M4U_LARB8_ID, 8) -#define M4U_PORT_RSC_WDMA MTK_M4U_ID(M4U_LARB8_ID, 9) - -/* larb9-CAM */ -#define M4U_PORT_CAM_IMGO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 0) -#define M4U_PORT_CAM_RRZO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 1) -#define M4U_PORT_CAM_LSCI_R1_C MTK_M4U_ID(M4U_LARB9_ID, 2) -#define M4U_PORT_CAM_BPCI_R1_C MTK_M4U_ID(M4U_LARB9_ID, 3) -#define M4U_PORT_CAM_YUVO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 4) -#define M4U_PORT_CAM_UFDI_R2_C MTK_M4U_ID(M4U_LARB9_ID, 5) -#define M4U_PORT_CAM_RAWI_R2_C MTK_M4U_ID(M4U_LARB9_ID, 6) -#define M4U_PORT_CAM_RAWI_R5_C MTK_M4U_ID(M4U_LARB9_ID, 7) -#define M4U_PORT_CAM_CAMSV_1 MTK_M4U_ID(M4U_LARB9_ID, 8) -#define M4U_PORT_CAM_CAMSV_2 MTK_M4U_ID(M4U_LARB9_ID, 9) -#define M4U_PORT_CAM_CAMSV_3 MTK_M4U_ID(M4U_LARB9_ID, 10) -#define M4U_PORT_CAM_CAMSV_4 MTK_M4U_ID(M4U_LARB9_ID, 11) -#define M4U_PORT_CAM_CAMSV_5 MTK_M4U_ID(M4U_LARB9_ID, 12) -#define M4U_PORT_CAM_CAMSV_6 MTK_M4U_ID(M4U_LARB9_ID, 13) -#define M4U_PORT_CAM_AAO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 14) -#define M4U_PORT_CAM_AFO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 15) -#define M4U_PORT_CAM_FLKO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 16) -#define M4U_PORT_CAM_LCESO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 17) -#define M4U_PORT_CAM_CRZO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 18) -#define M4U_PORT_CAM_LTMSO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 19) -#define M4U_PORT_CAM_RSSO_R1_C MTK_M4U_ID(M4U_LARB9_ID, 20) -#define M4U_PORT_CAM_CCUI MTK_M4U_ID(M4U_LARB9_ID, 21) -#define M4U_PORT_CAM_CCUO MTK_M4U_ID(M4U_LARB9_ID, 22) -#define M4U_PORT_CAM_FAKE MTK_M4U_ID(M4U_LARB9_ID, 23) - -/* larb10-CAM_A */ -#define M4U_PORT_CAM_IMGO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 0) -#define M4U_PORT_CAM_RRZO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 1) -#define M4U_PORT_CAM_LSCI_R1_A MTK_M4U_ID(M4U_LARB10_ID, 2) -#define M4U_PORT_CAM_BPCI_R1_A MTK_M4U_ID(M4U_LARB10_ID, 3) -#define M4U_PORT_CAM_YUVO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 4) -#define M4U_PORT_CAM_UFDI_R2_A MTK_M4U_ID(M4U_LARB10_ID, 5) -#define M4U_PORT_CAM_RAWI_R2_A MTK_M4U_ID(M4U_LARB10_ID, 6) -#define M4U_PORT_CAM_RAWI_R5_A MTK_M4U_ID(M4U_LARB10_ID, 7) -#define M4U_PORT_CAM_IMGO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 8) -#define M4U_PORT_CAM_RRZO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 9) -#define M4U_PORT_CAM_LSCI_R1_B MTK_M4U_ID(M4U_LARB10_ID, 10) -#define M4U_PORT_CAM_BPCI_R1_B MTK_M4U_ID(M4U_LARB10_ID, 11) -#define M4U_PORT_CAM_YUVO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 12) -#define M4U_PORT_CAM_UFDI_R2_B MTK_M4U_ID(M4U_LARB10_ID, 13) -#define M4U_PORT_CAM_RAWI_R2_B MTK_M4U_ID(M4U_LARB10_ID, 14) -#define M4U_PORT_CAM_RAWI_R5_B MTK_M4U_ID(M4U_LARB10_ID, 15) -#define M4U_PORT_CAM_CAMSV_0 MTK_M4U_ID(M4U_LARB10_ID, 16) -#define M4U_PORT_CAM_AAO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 17) -#define M4U_PORT_CAM_AFO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 18) -#define M4U_PORT_CAM_FLKO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 19) -#define M4U_PORT_CAM_LCESO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 20) -#define M4U_PORT_CAM_CRZO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 21) -#define M4U_PORT_CAM_AAO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 22) -#define M4U_PORT_CAM_AFO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 23) -#define M4U_PORT_CAM_FLKO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 24) -#define M4U_PORT_CAM_LCESO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 25) -#define M4U_PORT_CAM_CRZO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 26) -#define M4U_PORT_CAM_LTMSO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 27) -#define M4U_PORT_CAM_RSSO_R1_A MTK_M4U_ID(M4U_LARB10_ID, 28) -#define M4U_PORT_CAM_LTMSO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 29) -#define M4U_PORT_CAM_RSSO_R1_B MTK_M4U_ID(M4U_LARB10_ID, 30) - -/* larb11-CAM-VPU */ -#define M4U_PORT_CAM_IPUO MTK_M4U_ID(M4U_LARB11_ID, 0) -#define M4U_PORT_CAM_IPU2O MTK_M4U_ID(M4U_LARB11_ID, 1) -#define M4U_PORT_CAM_IPU3O MTK_M4U_ID(M4U_LARB11_ID, 2) -#define M4U_PORT_CAM_IPUI MTK_M4U_ID(M4U_LARB11_ID, 3) -#define M4U_PORT_CAM_IPU2I MTK_M4U_ID(M4U_LARB11_ID, 4) - -#endif diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h deleted file mode 100644 index b0b1091aad6d..000000000000 --- a/include/dt-bindings/mux/ti-serdes.h +++ /dev/null @@ -1,190 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides constants for SERDES MUX for TI SoCs - */ - -#ifndef _DT_BINDINGS_MUX_TI_SERDES -#define _DT_BINDINGS_MUX_TI_SERDES - -/* - * These bindings are deprecated, because they do not match the actual - * concept of bindings but rather contain pure constants values used only - * in DTS board files. - * Instead include the header in the DTS source directory. - */ -#warning "These bindings are deprecated. Instead, use the header in the DTS source directory." - -/* J721E */ - -#define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0 -#define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1 -#define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2 -#define J721E_SERDES0_LANE0_IP4_UNUSED 0x3 - -#define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0 -#define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1 -#define J721E_SERDES0_LANE1_USB3_0 0x2 -#define J721E_SERDES0_LANE1_IP4_UNUSED 0x3 - -#define J721E_SERDES1_LANE0_QSGMII_LANE3 0x0 -#define J721E_SERDES1_LANE0_PCIE1_LANE0 0x1 -#define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2 -#define J721E_SERDES1_LANE0_SGMII_LANE0 0x3 - -#define J721E_SERDES1_LANE1_QSGMII_LANE4 0x0 -#define J721E_SERDES1_LANE1_PCIE1_LANE1 0x1 -#define J721E_SERDES1_LANE1_USB3_1 0x2 -#define J721E_SERDES1_LANE1_SGMII_LANE1 0x3 - -#define J721E_SERDES2_LANE0_IP1_UNUSED 0x0 -#define J721E_SERDES2_LANE0_PCIE2_LANE0 0x1 -#define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2 -#define J721E_SERDES2_LANE0_SGMII_LANE0 0x3 - -#define J721E_SERDES2_LANE1_IP1_UNUSED 0x0 -#define J721E_SERDES2_LANE1_PCIE2_LANE1 0x1 -#define J721E_SERDES2_LANE1_USB3_1 0x2 -#define J721E_SERDES2_LANE1_SGMII_LANE1 0x3 - -#define J721E_SERDES3_LANE0_IP1_UNUSED 0x0 -#define J721E_SERDES3_LANE0_PCIE3_LANE0 0x1 -#define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2 -#define J721E_SERDES3_LANE0_IP4_UNUSED 0x3 - -#define J721E_SERDES3_LANE1_IP1_UNUSED 0x0 -#define J721E_SERDES3_LANE1_PCIE3_LANE1 0x1 -#define J721E_SERDES3_LANE1_USB3_0 0x2 -#define J721E_SERDES3_LANE1_IP4_UNUSED 0x3 - -#define J721E_SERDES4_LANE0_EDP_LANE0 0x0 -#define J721E_SERDES4_LANE0_IP2_UNUSED 0x1 -#define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2 -#define J721E_SERDES4_LANE0_IP4_UNUSED 0x3 - -#define J721E_SERDES4_LANE1_EDP_LANE1 0x0 -#define J721E_SERDES4_LANE1_IP2_UNUSED 0x1 -#define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2 -#define J721E_SERDES4_LANE1_IP4_UNUSED 0x3 - -#define J721E_SERDES4_LANE2_EDP_LANE2 0x0 -#define J721E_SERDES4_LANE2_IP2_UNUSED 0x1 -#define J721E_SERDES4_LANE2_QSGMII_LANE7 0x2 -#define J721E_SERDES4_LANE2_IP4_UNUSED 0x3 - -#define J721E_SERDES4_LANE3_EDP_LANE3 0x0 -#define J721E_SERDES4_LANE3_IP2_UNUSED 0x1 -#define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2 -#define J721E_SERDES4_LANE3_IP4_UNUSED 0x3 - -/* J7200 */ - -#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0 -#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1 -#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2 -#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3 - -#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0 -#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1 -#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2 -#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3 - -#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0 -#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1 -#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2 -#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3 - -#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0 -#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1 -#define J7200_SERDES0_LANE3_USB 0x2 -#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3 - -/* AM64 */ - -#define AM64_SERDES0_LANE0_PCIE0 0x0 -#define AM64_SERDES0_LANE0_USB 0x1 - -/* J721S2 */ - -#define J721S2_SERDES0_LANE0_EDP_LANE0 0x0 -#define J721S2_SERDES0_LANE0_PCIE1_LANE0 0x1 -#define J721S2_SERDES0_LANE0_IP3_UNUSED 0x2 -#define J721S2_SERDES0_LANE0_IP4_UNUSED 0x3 - -#define J721S2_SERDES0_LANE1_EDP_LANE1 0x0 -#define J721S2_SERDES0_LANE1_PCIE1_LANE1 0x1 -#define J721S2_SERDES0_LANE1_USB 0x2 -#define J721S2_SERDES0_LANE1_IP4_UNUSED 0x3 - -#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0 -#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1 -#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2 -#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3 - -#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0 -#define J721S2_SERDES0_LANE3_PCIE1_LANE3 0x1 -#define J721S2_SERDES0_LANE3_USB 0x2 -#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3 - -/* J784S4 */ - -#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0 -#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1 -#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2 -#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3 - -#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0 -#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1 -#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2 -#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3 - -#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0 -#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1 -#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2 -#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3 - -#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0 -#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1 -#define J784S4_SERDES0_LANE3_USB 0x2 -#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3 - -#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0 -#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1 -#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2 -#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3 - -#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0 -#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1 -#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2 -#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3 - -#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0 -#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1 -#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2 -#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3 - -#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0 -#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1 -#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2 -#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3 - -#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0 -#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1 -#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2 -#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3 - -#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0 -#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1 -#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2 -#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3 - -#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0 -#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1 -#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2 -#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3 - -#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0 -#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1 -#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2 -#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3 - -#endif /* _DT_BINDINGS_MUX_TI_SERDES */ diff --git a/include/dt-bindings/pinctrl/mt6397-pinfunc.h b/include/dt-bindings/pinctrl/mt6397-pinfunc.h deleted file mode 100644 index f393fbd68905..000000000000 --- a/include/dt-bindings/pinctrl/mt6397-pinfunc.h +++ /dev/null @@ -1,257 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DTS_MT6397_PINFUNC_H -#define __DTS_MT6397_PINFUNC_H - -#include - -#define MT6397_PIN_0_INT__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) -#define MT6397_PIN_0_INT__FUNC_INT (MTK_PIN_NO(0) | 1) - -#define MT6397_PIN_1_SRCVOLTEN__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) -#define MT6397_PIN_1_SRCVOLTEN__FUNC_SRCVOLTEN (MTK_PIN_NO(1) | 1) -#define MT6397_PIN_1_SRCVOLTEN__FUNC_TEST_CK1 (MTK_PIN_NO(1) | 6) - -#define MT6397_PIN_2_SRCLKEN_PERI__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) -#define MT6397_PIN_2_SRCLKEN_PERI__FUNC_SRCLKEN_PERI (MTK_PIN_NO(2) | 1) -#define MT6397_PIN_2_SRCLKEN_PERI__FUNC_TEST_CK2 (MTK_PIN_NO(2) | 6) - -#define MT6397_PIN_3_RTC_32K1V8__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) -#define MT6397_PIN_3_RTC_32K1V8__FUNC_RTC_32K1V8 (MTK_PIN_NO(3) | 1) -#define MT6397_PIN_3_RTC_32K1V8__FUNC_TEST_CK3 (MTK_PIN_NO(3) | 6) - -#define MT6397_PIN_4_WRAP_EVENT__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) -#define MT6397_PIN_4_WRAP_EVENT__FUNC_WRAP_EVENT (MTK_PIN_NO(4) | 1) - -#define MT6397_PIN_5_SPI_CLK__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) -#define MT6397_PIN_5_SPI_CLK__FUNC_SPI_CLK (MTK_PIN_NO(5) | 1) - -#define MT6397_PIN_6_SPI_CSN__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) -#define MT6397_PIN_6_SPI_CSN__FUNC_SPI_CSN (MTK_PIN_NO(6) | 1) - -#define MT6397_PIN_7_SPI_MOSI__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) -#define MT6397_PIN_7_SPI_MOSI__FUNC_SPI_MOSI (MTK_PIN_NO(7) | 1) - -#define MT6397_PIN_8_SPI_MISO__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) -#define MT6397_PIN_8_SPI_MISO__FUNC_SPI_MISO (MTK_PIN_NO(8) | 1) - -#define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) -#define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_AUD_CLK (MTK_PIN_NO(9) | 1) -#define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_TEST_IN0 (MTK_PIN_NO(9) | 6) -#define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_TEST_OUT0 (MTK_PIN_NO(9) | 7) - -#define MT6397_PIN_10_AUD_DAT_MISO__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) -#define MT6397_PIN_10_AUD_DAT_MISO__FUNC_AUD_MISO (MTK_PIN_NO(10) | 1) -#define MT6397_PIN_10_AUD_DAT_MISO__FUNC_TEST_IN1 (MTK_PIN_NO(10) | 6) -#define MT6397_PIN_10_AUD_DAT_MISO__FUNC_TEST_OUT1 (MTK_PIN_NO(10) | 7) - -#define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) -#define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_AUD_MOSI (MTK_PIN_NO(11) | 1) -#define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_TEST_IN2 (MTK_PIN_NO(11) | 6) -#define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_TEST_OUT2 (MTK_PIN_NO(11) | 7) - -#define MT6397_PIN_12_COL0__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) -#define MT6397_PIN_12_COL0__FUNC_COL0_USBDL (MTK_PIN_NO(12) | 1) -#define MT6397_PIN_12_COL0__FUNC_EINT10_1X (MTK_PIN_NO(12) | 2) -#define MT6397_PIN_12_COL0__FUNC_PWM1_3X (MTK_PIN_NO(12) | 3) -#define MT6397_PIN_12_COL0__FUNC_TEST_IN3 (MTK_PIN_NO(12) | 6) -#define MT6397_PIN_12_COL0__FUNC_TEST_OUT3 (MTK_PIN_NO(12) | 7) - -#define MT6397_PIN_13_COL1__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) -#define MT6397_PIN_13_COL1__FUNC_COL1 (MTK_PIN_NO(13) | 1) -#define MT6397_PIN_13_COL1__FUNC_EINT11_1X (MTK_PIN_NO(13) | 2) -#define MT6397_PIN_13_COL1__FUNC_SCL0_2X (MTK_PIN_NO(13) | 3) -#define MT6397_PIN_13_COL1__FUNC_TEST_IN4 (MTK_PIN_NO(13) | 6) -#define MT6397_PIN_13_COL1__FUNC_TEST_OUT4 (MTK_PIN_NO(13) | 7) - -#define MT6397_PIN_14_COL2__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) -#define MT6397_PIN_14_COL2__FUNC_COL2 (MTK_PIN_NO(14) | 1) -#define MT6397_PIN_14_COL2__FUNC_EINT12_1X (MTK_PIN_NO(14) | 2) -#define MT6397_PIN_14_COL2__FUNC_SDA0_2X (MTK_PIN_NO(14) | 3) -#define MT6397_PIN_14_COL2__FUNC_TEST_IN5 (MTK_PIN_NO(14) | 6) -#define MT6397_PIN_14_COL2__FUNC_TEST_OUT5 (MTK_PIN_NO(14) | 7) - -#define MT6397_PIN_15_COL3__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) -#define MT6397_PIN_15_COL3__FUNC_COL3 (MTK_PIN_NO(15) | 1) -#define MT6397_PIN_15_COL3__FUNC_EINT13_1X (MTK_PIN_NO(15) | 2) -#define MT6397_PIN_15_COL3__FUNC_SCL1_2X (MTK_PIN_NO(15) | 3) -#define MT6397_PIN_15_COL3__FUNC_TEST_IN6 (MTK_PIN_NO(15) | 6) -#define MT6397_PIN_15_COL3__FUNC_TEST_OUT6 (MTK_PIN_NO(15) | 7) - -#define MT6397_PIN_16_COL4__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) -#define MT6397_PIN_16_COL4__FUNC_COL4 (MTK_PIN_NO(16) | 1) -#define MT6397_PIN_16_COL4__FUNC_EINT14_1X (MTK_PIN_NO(16) | 2) -#define MT6397_PIN_16_COL4__FUNC_SDA1_2X (MTK_PIN_NO(16) | 3) -#define MT6397_PIN_16_COL4__FUNC_TEST_IN7 (MTK_PIN_NO(16) | 6) -#define MT6397_PIN_16_COL4__FUNC_TEST_OUT7 (MTK_PIN_NO(16) | 7) - -#define MT6397_PIN_17_COL5__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) -#define MT6397_PIN_17_COL5__FUNC_COL5 (MTK_PIN_NO(17) | 1) -#define MT6397_PIN_17_COL5__FUNC_EINT15_1X (MTK_PIN_NO(17) | 2) -#define MT6397_PIN_17_COL5__FUNC_SCL2_2X (MTK_PIN_NO(17) | 3) -#define MT6397_PIN_17_COL5__FUNC_TEST_IN8 (MTK_PIN_NO(17) | 6) -#define MT6397_PIN_17_COL5__FUNC_TEST_OUT8 (MTK_PIN_NO(17) | 7) - -#define MT6397_PIN_18_COL6__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) -#define MT6397_PIN_18_COL6__FUNC_COL6 (MTK_PIN_NO(18) | 1) -#define MT6397_PIN_18_COL6__FUNC_EINT16_1X (MTK_PIN_NO(18) | 2) -#define MT6397_PIN_18_COL6__FUNC_SDA2_2X (MTK_PIN_NO(18) | 3) -#define MT6397_PIN_18_COL6__FUNC_GPIO32K_0 (MTK_PIN_NO(18) | 4) -#define MT6397_PIN_18_COL6__FUNC_GPIO26M_0 (MTK_PIN_NO(18) | 5) -#define MT6397_PIN_18_COL6__FUNC_TEST_IN9 (MTK_PIN_NO(18) | 6) -#define MT6397_PIN_18_COL6__FUNC_TEST_OUT9 (MTK_PIN_NO(18) | 7) - -#define MT6397_PIN_19_COL7__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) -#define MT6397_PIN_19_COL7__FUNC_COL7 (MTK_PIN_NO(19) | 1) -#define MT6397_PIN_19_COL7__FUNC_EINT17_1X (MTK_PIN_NO(19) | 2) -#define MT6397_PIN_19_COL7__FUNC_PWM2_3X (MTK_PIN_NO(19) | 3) -#define MT6397_PIN_19_COL7__FUNC_GPIO32K_1 (MTK_PIN_NO(19) | 4) -#define MT6397_PIN_19_COL7__FUNC_GPIO26M_1 (MTK_PIN_NO(19) | 5) -#define MT6397_PIN_19_COL7__FUNC_TEST_IN10 (MTK_PIN_NO(19) | 6) -#define MT6397_PIN_19_COL7__FUNC_TEST_OUT10 (MTK_PIN_NO(19) | 7) - -#define MT6397_PIN_20_ROW0__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) -#define MT6397_PIN_20_ROW0__FUNC_ROW0 (MTK_PIN_NO(20) | 1) -#define MT6397_PIN_20_ROW0__FUNC_EINT18_1X (MTK_PIN_NO(20) | 2) -#define MT6397_PIN_20_ROW0__FUNC_SCL0_3X (MTK_PIN_NO(20) | 3) -#define MT6397_PIN_20_ROW0__FUNC_TEST_IN11 (MTK_PIN_NO(20) | 6) -#define MT6397_PIN_20_ROW0__FUNC_TEST_OUT11 (MTK_PIN_NO(20) | 7) - -#define MT6397_PIN_21_ROW1__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) -#define MT6397_PIN_21_ROW1__FUNC_ROW1 (MTK_PIN_NO(21) | 1) -#define MT6397_PIN_21_ROW1__FUNC_EINT19_1X (MTK_PIN_NO(21) | 2) -#define MT6397_PIN_21_ROW1__FUNC_SDA0_3X (MTK_PIN_NO(21) | 3) -#define MT6397_PIN_21_ROW1__FUNC_AUD_TSTCK (MTK_PIN_NO(21) | 4) -#define MT6397_PIN_21_ROW1__FUNC_TEST_IN12 (MTK_PIN_NO(21) | 6) -#define MT6397_PIN_21_ROW1__FUNC_TEST_OUT12 (MTK_PIN_NO(21) | 7) - -#define MT6397_PIN_22_ROW2__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) -#define MT6397_PIN_22_ROW2__FUNC_ROW2 (MTK_PIN_NO(22) | 1) -#define MT6397_PIN_22_ROW2__FUNC_EINT20_1X (MTK_PIN_NO(22) | 2) -#define MT6397_PIN_22_ROW2__FUNC_SCL1_3X (MTK_PIN_NO(22) | 3) -#define MT6397_PIN_22_ROW2__FUNC_TEST_IN13 (MTK_PIN_NO(22) | 6) -#define MT6397_PIN_22_ROW2__FUNC_TEST_OUT13 (MTK_PIN_NO(22) | 7) - -#define MT6397_PIN_23_ROW3__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) -#define MT6397_PIN_23_ROW3__FUNC_ROW3 (MTK_PIN_NO(23) | 1) -#define MT6397_PIN_23_ROW3__FUNC_EINT21_1X (MTK_PIN_NO(23) | 2) -#define MT6397_PIN_23_ROW3__FUNC_SDA1_3X (MTK_PIN_NO(23) | 3) -#define MT6397_PIN_23_ROW3__FUNC_TEST_IN14 (MTK_PIN_NO(23) | 6) -#define MT6397_PIN_23_ROW3__FUNC_TEST_OUT14 (MTK_PIN_NO(23) | 7) - -#define MT6397_PIN_24_ROW4__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) -#define MT6397_PIN_24_ROW4__FUNC_ROW4 (MTK_PIN_NO(24) | 1) -#define MT6397_PIN_24_ROW4__FUNC_EINT22_1X (MTK_PIN_NO(24) | 2) -#define MT6397_PIN_24_ROW4__FUNC_SCL2_3X (MTK_PIN_NO(24) | 3) -#define MT6397_PIN_24_ROW4__FUNC_TEST_IN15 (MTK_PIN_NO(24) | 6) -#define MT6397_PIN_24_ROW4__FUNC_TEST_OUT15 (MTK_PIN_NO(24) | 7) - -#define MT6397_PIN_25_ROW5__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) -#define MT6397_PIN_25_ROW5__FUNC_ROW5 (MTK_PIN_NO(25) | 1) -#define MT6397_PIN_25_ROW5__FUNC_EINT23_1X (MTK_PIN_NO(25) | 2) -#define MT6397_PIN_25_ROW5__FUNC_SDA2_3X (MTK_PIN_NO(25) | 3) -#define MT6397_PIN_25_ROW5__FUNC_TEST_IN16 (MTK_PIN_NO(25) | 6) -#define MT6397_PIN_25_ROW5__FUNC_TEST_OUT16 (MTK_PIN_NO(25) | 7) - -#define MT6397_PIN_26_ROW6__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) -#define MT6397_PIN_26_ROW6__FUNC_ROW6 (MTK_PIN_NO(26) | 1) -#define MT6397_PIN_26_ROW6__FUNC_EINT24_1X (MTK_PIN_NO(26) | 2) -#define MT6397_PIN_26_ROW6__FUNC_PWM3_3X (MTK_PIN_NO(26) | 3) -#define MT6397_PIN_26_ROW6__FUNC_GPIO32K_2 (MTK_PIN_NO(26) | 4) -#define MT6397_PIN_26_ROW6__FUNC_GPIO26M_2 (MTK_PIN_NO(26) | 5) -#define MT6397_PIN_26_ROW6__FUNC_TEST_IN17 (MTK_PIN_NO(26) | 6) -#define MT6397_PIN_26_ROW6__FUNC_TEST_OUT17 (MTK_PIN_NO(26) | 7) - -#define MT6397_PIN_27_ROW7__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) -#define MT6397_PIN_27_ROW7__FUNC_ROW7 (MTK_PIN_NO(27) | 1) -#define MT6397_PIN_27_ROW7__FUNC_EINT3_1X (MTK_PIN_NO(27) | 2) -#define MT6397_PIN_27_ROW7__FUNC_CBUS (MTK_PIN_NO(27) | 3) -#define MT6397_PIN_27_ROW7__FUNC_GPIO32K_3 (MTK_PIN_NO(27) | 4) -#define MT6397_PIN_27_ROW7__FUNC_GPIO26M_3 (MTK_PIN_NO(27) | 5) -#define MT6397_PIN_27_ROW7__FUNC_TEST_IN18 (MTK_PIN_NO(27) | 6) -#define MT6397_PIN_27_ROW7__FUNC_TEST_OUT18 (MTK_PIN_NO(27) | 7) - -#define MT6397_PIN_28_PWM1__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) -#define MT6397_PIN_28_PWM1__FUNC_PWM1 (MTK_PIN_NO(28) | 1) -#define MT6397_PIN_28_PWM1__FUNC_EINT4_1X (MTK_PIN_NO(28) | 2) -#define MT6397_PIN_28_PWM1__FUNC_GPIO32K_4 (MTK_PIN_NO(28) | 4) -#define MT6397_PIN_28_PWM1__FUNC_GPIO26M_4 (MTK_PIN_NO(28) | 5) -#define MT6397_PIN_28_PWM1__FUNC_TEST_IN19 (MTK_PIN_NO(28) | 6) -#define MT6397_PIN_28_PWM1__FUNC_TEST_OUT19 (MTK_PIN_NO(28) | 7) - -#define MT6397_PIN_29_PWM2__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) -#define MT6397_PIN_29_PWM2__FUNC_PWM2 (MTK_PIN_NO(29) | 1) -#define MT6397_PIN_29_PWM2__FUNC_EINT5_1X (MTK_PIN_NO(29) | 2) -#define MT6397_PIN_29_PWM2__FUNC_GPIO32K_5 (MTK_PIN_NO(29) | 4) -#define MT6397_PIN_29_PWM2__FUNC_GPIO26M_5 (MTK_PIN_NO(29) | 5) -#define MT6397_PIN_29_PWM2__FUNC_TEST_IN20 (MTK_PIN_NO(29) | 6) -#define MT6397_PIN_29_PWM2__FUNC_TEST_OUT20 (MTK_PIN_NO(29) | 7) - -#define MT6397_PIN_30_PWM3__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) -#define MT6397_PIN_30_PWM3__FUNC_PWM3 (MTK_PIN_NO(30) | 1) -#define MT6397_PIN_30_PWM3__FUNC_EINT6_1X (MTK_PIN_NO(30) | 2) -#define MT6397_PIN_30_PWM3__FUNC_COL0 (MTK_PIN_NO(30) | 3) -#define MT6397_PIN_30_PWM3__FUNC_GPIO32K_6 (MTK_PIN_NO(30) | 4) -#define MT6397_PIN_30_PWM3__FUNC_GPIO26M_6 (MTK_PIN_NO(30) | 5) -#define MT6397_PIN_30_PWM3__FUNC_TEST_IN21 (MTK_PIN_NO(30) | 6) -#define MT6397_PIN_30_PWM3__FUNC_TEST_OUT21 (MTK_PIN_NO(30) | 7) - -#define MT6397_PIN_31_SCL0__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) -#define MT6397_PIN_31_SCL0__FUNC_SCL0 (MTK_PIN_NO(31) | 1) -#define MT6397_PIN_31_SCL0__FUNC_EINT7_1X (MTK_PIN_NO(31) | 2) -#define MT6397_PIN_31_SCL0__FUNC_PWM1_2X (MTK_PIN_NO(31) | 3) -#define MT6397_PIN_31_SCL0__FUNC_TEST_IN22 (MTK_PIN_NO(31) | 6) -#define MT6397_PIN_31_SCL0__FUNC_TEST_OUT22 (MTK_PIN_NO(31) | 7) - -#define MT6397_PIN_32_SDA0__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) -#define MT6397_PIN_32_SDA0__FUNC_SDA0 (MTK_PIN_NO(32) | 1) -#define MT6397_PIN_32_SDA0__FUNC_EINT8_1X (MTK_PIN_NO(32) | 2) -#define MT6397_PIN_32_SDA0__FUNC_TEST_IN23 (MTK_PIN_NO(32) | 6) -#define MT6397_PIN_32_SDA0__FUNC_TEST_OUT23 (MTK_PIN_NO(32) | 7) - -#define MT6397_PIN_33_SCL1__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) -#define MT6397_PIN_33_SCL1__FUNC_SCL1 (MTK_PIN_NO(33) | 1) -#define MT6397_PIN_33_SCL1__FUNC_EINT9_1X (MTK_PIN_NO(33) | 2) -#define MT6397_PIN_33_SCL1__FUNC_PWM2_2X (MTK_PIN_NO(33) | 3) -#define MT6397_PIN_33_SCL1__FUNC_TEST_IN24 (MTK_PIN_NO(33) | 6) -#define MT6397_PIN_33_SCL1__FUNC_TEST_OUT24 (MTK_PIN_NO(33) | 7) - -#define MT6397_PIN_34_SDA1__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) -#define MT6397_PIN_34_SDA1__FUNC_SDA1 (MTK_PIN_NO(34) | 1) -#define MT6397_PIN_34_SDA1__FUNC_EINT0_1X (MTK_PIN_NO(34) | 2) -#define MT6397_PIN_34_SDA1__FUNC_TEST_IN25 (MTK_PIN_NO(34) | 6) -#define MT6397_PIN_34_SDA1__FUNC_TEST_OUT25 (MTK_PIN_NO(34) | 7) - -#define MT6397_PIN_35_SCL2__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) -#define MT6397_PIN_35_SCL2__FUNC_SCL2 (MTK_PIN_NO(35) | 1) -#define MT6397_PIN_35_SCL2__FUNC_EINT1_1X (MTK_PIN_NO(35) | 2) -#define MT6397_PIN_35_SCL2__FUNC_PWM3_2X (MTK_PIN_NO(35) | 3) -#define MT6397_PIN_35_SCL2__FUNC_TEST_IN26 (MTK_PIN_NO(35) | 6) -#define MT6397_PIN_35_SCL2__FUNC_TEST_OUT26 (MTK_PIN_NO(35) | 7) - -#define MT6397_PIN_36_SDA2__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) -#define MT6397_PIN_36_SDA2__FUNC_SDA2 (MTK_PIN_NO(36) | 1) -#define MT6397_PIN_36_SDA2__FUNC_EINT2_1X (MTK_PIN_NO(36) | 2) -#define MT6397_PIN_36_SDA2__FUNC_TEST_IN27 (MTK_PIN_NO(36) | 6) -#define MT6397_PIN_36_SDA2__FUNC_TEST_OUT27 (MTK_PIN_NO(36) | 7) - -#define MT6397_PIN_37_HDMISD__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) -#define MT6397_PIN_37_HDMISD__FUNC_HDMISD (MTK_PIN_NO(37) | 1) -#define MT6397_PIN_37_HDMISD__FUNC_TEST_IN28 (MTK_PIN_NO(37) | 6) -#define MT6397_PIN_37_HDMISD__FUNC_TEST_OUT28 (MTK_PIN_NO(37) | 7) - -#define MT6397_PIN_38_HDMISCK__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) -#define MT6397_PIN_38_HDMISCK__FUNC_HDMISCK (MTK_PIN_NO(38) | 1) -#define MT6397_PIN_38_HDMISCK__FUNC_TEST_IN29 (MTK_PIN_NO(38) | 6) -#define MT6397_PIN_38_HDMISCK__FUNC_TEST_OUT29 (MTK_PIN_NO(38) | 7) - -#define MT6397_PIN_39_HTPLG__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) -#define MT6397_PIN_39_HTPLG__FUNC_HTPLG (MTK_PIN_NO(39) | 1) -#define MT6397_PIN_39_HTPLG__FUNC_TEST_IN30 (MTK_PIN_NO(39) | 6) -#define MT6397_PIN_39_HTPLG__FUNC_TEST_OUT30 (MTK_PIN_NO(39) | 7) - -#define MT6397_PIN_40_CEC__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) -#define MT6397_PIN_40_CEC__FUNC_CEC (MTK_PIN_NO(40) | 1) -#define MT6397_PIN_40_CEC__FUNC_TEST_IN31 (MTK_PIN_NO(40) | 6) -#define MT6397_PIN_40_CEC__FUNC_TEST_OUT31 (MTK_PIN_NO(40) | 7) - -#endif /* __DTS_MT6397_PINFUNC_H */ diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h deleted file mode 100644 index f882662505ea..000000000000 --- a/include/dt-bindings/reset/bcm6318-reset.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ - -#ifndef __DT_BINDINGS_RESET_BCM6318_H -#define __DT_BINDINGS_RESET_BCM6318_H - -#define BCM6318_RST_SPI 0 -#define BCM6318_RST_EPHY 1 -#define BCM6318_RST_SAR 2 -#define BCM6318_RST_ENETSW 3 -#define BCM6318_RST_USBD 4 -#define BCM6318_RST_USBH 5 -#define BCM6318_RST_PCIE_CORE 6 -#define BCM6318_RST_PCIE 7 -#define BCM6318_RST_PCIE_EXT 8 -#define BCM6318_RST_PCIE_HARD 9 -#define BCM6318_RST_ADSL 10 -#define BCM6318_RST_PHYMIPS 11 -#define BCM6318_RST_HOSTMIPS 12 - -#endif /* __DT_BINDINGS_RESET_BCM6318_H */ diff --git a/include/dt-bindings/reset/imx8ulp-pcc-reset.h b/include/dt-bindings/reset/imx8ulp-pcc-reset.h deleted file mode 100644 index e99a4735c3c4..000000000000 --- a/include/dt-bindings/reset/imx8ulp-pcc-reset.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2021 NXP - */ - -#ifndef DT_BINDING_PCC_RESET_IMX8ULP_H -#define DT_BINDING_PCC_RESET_IMX8ULP_H - -/* PCC3 */ -#define PCC3_WDOG3_SWRST 0 -#define PCC3_WDOG4_SWRST 1 -#define PCC3_LPIT1_SWRST 2 -#define PCC3_TPM4_SWRST 3 -#define PCC3_TPM5_SWRST 4 -#define PCC3_FLEXIO1_SWRST 5 -#define PCC3_I3C2_SWRST 6 -#define PCC3_LPI2C4_SWRST 7 -#define PCC3_LPI2C5_SWRST 8 -#define PCC3_LPUART4_SWRST 9 -#define PCC3_LPUART5_SWRST 10 -#define PCC3_LPSPI4_SWRST 11 -#define PCC3_LPSPI5_SWRST 12 - -/* PCC4 */ -#define PCC4_FLEXSPI2_SWRST 0 -#define PCC4_TPM6_SWRST 1 -#define PCC4_TPM7_SWRST 2 -#define PCC4_LPI2C6_SWRST 3 -#define PCC4_LPI2C7_SWRST 4 -#define PCC4_LPUART6_SWRST 5 -#define PCC4_LPUART7_SWRST 6 -#define PCC4_SAI4_SWRST 7 -#define PCC4_SAI5_SWRST 8 -#define PCC4_USDHC0_SWRST 9 -#define PCC4_USDHC1_SWRST 10 -#define PCC4_USDHC2_SWRST 11 -#define PCC4_USB0_SWRST 12 -#define PCC4_USB0_PHY_SWRST 13 -#define PCC4_USB1_SWRST 14 -#define PCC4_USB1_PHY_SWRST 15 -#define PCC4_ENET_SWRST 16 - -/* PCC5 */ -#define PCC5_TPM8_SWRST 0 -#define PCC5_SAI6_SWRST 1 -#define PCC5_SAI7_SWRST 2 -#define PCC5_SPDIF_SWRST 3 -#define PCC5_ISI_SWRST 4 -#define PCC5_CSI_REGS_SWRST 5 -#define PCC5_CSI_SWRST 6 -#define PCC5_DSI_SWRST 7 -#define PCC5_WDOG5_SWRST 8 -#define PCC5_EPDC_SWRST 9 -#define PCC5_PXP_SWRST 10 -#define PCC5_GPU2D_SWRST 11 -#define PCC5_GPU3D_SWRST 12 -#define PCC5_DC_NANO_SWRST 13 - -#endif /*DT_BINDING_RESET_IMX8ULP_H */ diff --git a/include/dt-bindings/reset/oxsemi,ox810se.h b/include/dt-bindings/reset/oxsemi,ox810se.h deleted file mode 100644 index e943187e6527..000000000000 --- a/include/dt-bindings/reset/oxsemi,ox810se.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2016 Neil Armstrong - */ - -#ifndef DT_RESET_OXSEMI_OX810SE_H -#define DT_RESET_OXSEMI_OX810SE_H - -#define RESET_ARM 0 -#define RESET_COPRO 1 -/* Reserved 2 */ -/* Reserved 3 */ -#define RESET_USBHS 4 -#define RESET_USBHSPHY 5 -#define RESET_MAC 6 -#define RESET_PCI 7 -#define RESET_DMA 8 -#define RESET_DPE 9 -#define RESET_DDR 10 -#define RESET_SATA 11 -#define RESET_SATA_LINK 12 -#define RESET_SATA_PHY 13 - /* Reserved 14 */ -#define RESET_NAND 15 -#define RESET_GPIO 16 -#define RESET_UART1 17 -#define RESET_UART2 18 -#define RESET_MISC 19 -#define RESET_I2S 20 -#define RESET_AHB_MON 21 -#define RESET_UART3 22 -#define RESET_UART4 23 -#define RESET_SGDMA 24 -/* Reserved 25 */ -/* Reserved 26 */ -/* Reserved 27 */ -/* Reserved 28 */ -/* Reserved 29 */ -/* Reserved 30 */ -#define RESET_BUS 31 - -#endif /* DT_RESET_OXSEMI_OX810SE_H */ diff --git a/include/dt-bindings/reset/oxsemi,ox820.h b/include/dt-bindings/reset/oxsemi,ox820.h deleted file mode 100644 index 54b58e09c1c0..000000000000 --- a/include/dt-bindings/reset/oxsemi,ox820.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2016 Neil Armstrong - */ - -#ifndef DT_RESET_OXSEMI_OX820_H -#define DT_RESET_OXSEMI_OX820_H - -#define RESET_SCU 0 -#define RESET_LEON 1 -#define RESET_ARM0 2 -#define RESET_ARM1 3 -#define RESET_USBHS 4 -#define RESET_USBPHYA 5 -#define RESET_MAC 6 -#define RESET_PCIEA 7 -#define RESET_SGDMA 8 -#define RESET_CIPHER 9 -#define RESET_DDR 10 -#define RESET_SATA 11 -#define RESET_SATA_LINK 12 -#define RESET_SATA_PHY 13 -#define RESET_PCIEPHY 14 -#define RESET_NAND 15 -#define RESET_GPIO 16 -#define RESET_UART1 17 -#define RESET_UART2 18 -#define RESET_MISC 19 -#define RESET_I2S 20 -#define RESET_SD 21 -#define RESET_MAC_2 22 -#define RESET_PCIEB 23 -#define RESET_VIDEO 24 -#define RESET_DDR_PHY 25 -#define RESET_USBPHYB 26 -#define RESET_USBDEV 27 -/* Reserved 29 */ -#define RESET_ARMDBG 29 -#define RESET_PLLA 30 -#define RESET_PLLB 31 - -#endif /* DT_RESET_OXSEMI_OX820_H */ diff --git a/include/dt-bindings/sound/audio-jack-events.h b/include/dt-bindings/sound/audio-jack-events.h deleted file mode 100644 index 1b29b295126a..000000000000 --- a/include/dt-bindings/sound/audio-jack-events.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __AUDIO_JACK_EVENTS_H -#define __AUDIO_JACK_EVENTS_H - -#define JACK_HEADPHONE 1 -#define JACK_MICROPHONE 2 -#define JACK_LINEOUT 3 -#define JACK_LINEIN 4 - -#endif /* __AUDIO_JACK_EVENTS_H */ From 93fb82ec340953da264e1d5e3a274d4aa71f34a0 Mon Sep 17 00:00:00 2001 From: Ronak Jain Date: Fri, 12 Dec 2025 02:05:41 -0800 Subject: [PATCH 09/60] dt-bindings: firmware: xilinx: Add xlnx,zynqmp-firmware compatible The absence of a compatible property caused dt_binding_check to skip the zynqmp_firmware node. To address this, add "xlnx,zynqmp-firmware" to the compatible property in the example section for the zynqmp_firmware node. Signed-off-by: Ronak Jain Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20251212100542.2756757-2-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) --- .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index ab8f32c440df..20908db3c259 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -115,6 +115,7 @@ examples: #include firmware { zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; #power-domain-cells = <1>; soc-nvmem { compatible = "xlnx,zynqmp-nvmem-fw"; From 26dfe3a6d9a9ca055d5c8a2a40e1838ef09aff5e Mon Sep 17 00:00:00 2001 From: Ronak Jain Date: Fri, 12 Dec 2025 02:05:42 -0800 Subject: [PATCH 10/60] dt-bindings: firmware: xilinx: Add conditional pinctrl schema Updates the Device Tree bindings for Xilinx firmware by introducing conditional schema references for the pinctrl node. Previously, the pinctrl node directly referenced xlnx,zynqmp-pinctrl.yaml. However, this patch modifies the schema to conditionally apply the correct pinctrl schema based on the compatible property. Specifically: - If compatible contains "xlnx,zynqmp-pinctrl", reference xlnx,zynqmp-pinctrl.yaml. - If compatible contains "xlnx,versal-pinctrl", reference xlnx,versal-pinctrl.yaml. Additionally, an example entry for "xlnx,versal-pinctrl" has been added under the examples section. Signed-off-by: Ronak Jain Link: https://patch.msgid.link/20251212100542.2756757-3-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) --- .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 20 ++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index 20908db3c259..1903c072ed6f 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -76,7 +76,6 @@ properties: type: object pinctrl: - $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# description: The pinctrl node provides access to pinconfig and pincontrol functionality available in firmware. type: object @@ -105,6 +104,21 @@ properties: vector. type: object +allOf: + - if: + properties: + compatible: + contains: + const: xlnx,zynqmp-firmware + then: + properties: + pinctrl: + $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# + else: + properties: + pinctrl: + $ref: /schemas/pinctrl/xlnx,versal-pinctrl.yaml# + required: - compatible @@ -163,6 +177,10 @@ examples: compatible = "xlnx,versal-fpga"; }; + pinctrl { + compatible = "xlnx,versal-pinctrl"; + }; + xlnx_aes: zynqmp-aes { compatible = "xlnx,zynqmp-aes"; }; From 6c4de79bc4daa3f5bc93627cd7b725bd78b82539 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:25:32 -0600 Subject: [PATCH 11/60] dt-bindings: trivial-devices: Add socionext,uniphier-smpctrl The "socionext,uniphier-smpctrl" binding is just a "compatible" and "reg" entry, so add it to trivial-devices.yaml. Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251215212532.3318546-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index d0f7dbf15d6f..1b356cb674d2 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -414,6 +414,8 @@ properties: - smsc,emc6d103 # Temperature sensor with integrated fan control - smsc,emc6d103s + # Socionext Uniphier SMP control registers + - socionext,uniphier-smpctrl # SparkFun Qwiic Joystick (COM-15168) with i2c interface - sparkfun,qwiic-joystick # Sierra Wireless mangOH Green SPI IoT interface From d7d41a6bae2421241214396a680602cfa0749ffc Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 17 Dec 2025 14:43:08 +0100 Subject: [PATCH 12/60] of: replace strcmp_suffix() with strends() string.h now provides strends() which fulfills the same role as the locally implemented strcmp_suffix(). Use it in of/property.c. Signed-off-by: Bartosz Golaszewski Link: https://patch.msgid.link/20251217134308.33839-1-bartosz.golaszewski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/of/property.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/of/property.c b/drivers/of/property.c index 4e3524227720..ce5ada040d7e 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1294,17 +1294,6 @@ static struct device_node *parse_##fname(struct device_node *np, \ return parse_prop_cells(np, prop_name, index, name, cells); \ } -static int strcmp_suffix(const char *str, const char *suffix) -{ - unsigned int len, suffix_len; - - len = strlen(str); - suffix_len = strlen(suffix); - if (len <= suffix_len) - return -1; - return strcmp(str + len - suffix_len, suffix); -} - /** * parse_suffix_prop_cells - Suffix property parsing function for suppliers * @@ -1331,7 +1320,7 @@ static struct device_node *parse_suffix_prop_cells(struct device_node *np, { struct of_phandle_args sup_args; - if (strcmp_suffix(prop_name, suffix)) + if (!strends(prop_name, suffix)) return NULL; if (of_parse_phandle_with_args(np, prop_name, cells_name, index, @@ -1416,7 +1405,7 @@ DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells") static struct device_node *parse_gpios(struct device_node *np, const char *prop_name, int index) { - if (!strcmp_suffix(prop_name, ",nr-gpios")) + if (strends(prop_name, ",nr-gpios")) return NULL; return parse_suffix_prop_cells(np, prop_name, index, "-gpios", From 62fedca4ff8afd526bb02d8f08e8e1a7da01b073 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:25:43 -0600 Subject: [PATCH 13/60] dt-bindings: firmware: Convert cznic,turris-mox-rwtm to DT schema Convert the CZ.NIC Turris Mox rWTM firmware binding to DT schema format. Add the "marvell,armada-3700-rwtm-firmware" compatible which was not documented. Link: https://patch.msgid.link/20251215212545.3318816-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../firmware/cznic,turris-mox-rwtm.txt | 19 --------- .../firmware/cznic,turris-mox-rwtm.yaml | 40 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 41 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt create mode 100644 Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml diff --git a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt deleted file mode 100644 index 338169dea7bb..000000000000 --- a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt +++ /dev/null @@ -1,19 +0,0 @@ -Turris Mox rWTM firmware driver - -Required properties: - - compatible : Should be "cznic,turris-mox-rwtm" - - mboxes : Must contain a reference to associated mailbox - -This device tree node should be used on Turris Mox, or potentially another A3700 -compatible device running the Mox's rWTM firmware in the secure processor (for -example it is possible to flash this firmware into EspressoBin). - -Example: - - firmware { - turris-mox-rwtm { - compatible = "cznic,turris-mox-rwtm"; - mboxes = <&rwtm 0>; - status = "okay"; - }; - }; diff --git a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml new file mode 100644 index 000000000000..28caec137cc1 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/cznic,turris-mox-rwtm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CZ.NIC Turris Mox rWTM firmware + +maintainers: + - Marek Behún + +description: + This device tree node should be used on Turris Mox, or potentially another + A3700 compatible device running the Mox's rWTM firmware in the secure + processor (for example it is possible to flash this firmware into + EspressoBin). + +properties: + compatible: + oneOf: + - items: + - const: marvell,armada-3700-rwtm-firmware + - const: cznic,turris-mox-rwtm + - const: marvell,armada-3700-rwtm-firmware + + mboxes: + maxItems: 1 + +required: + - compatible + - mboxes + +additionalProperties: false + +examples: + - | + turris-mox-rwtm { + compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm"; + mboxes = <&rwtm 0>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index cfd00518df3c..beb371e8c541 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2711,7 +2711,7 @@ F: Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu F: Documentation/ABI/testing/sysfs-bus-moxtet-devices F: Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm F: Documentation/devicetree/bindings/bus/cznic,moxtet.yaml -F: Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt +F: Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml F: Documentation/devicetree/bindings/firmware/cznic,turris-omnia-mcu.yaml F: Documentation/devicetree/bindings/interrupt-controller/marvell,mpic.yaml F: Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml From df7358ab881f16e061efedc695a33e370f318fbc Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:35:14 -0600 Subject: [PATCH 14/60] dt-bindings: raspberrypi,bcm2835-firmware: Add 'power' and gpio-hog nodes Add missing child nodes for the RaspberryPi firmware. The firmware implements a power domain provider in a 'power' node. GPIO hog nodes are also already in use. Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20251215213513.3331128-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 8349c0a854d9..983ea80eaec9 100644 --- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -65,6 +65,11 @@ properties: gpio-line-names: minItems: 8 + patternProperties: + '-hog$': + required: + - gpio-hog + required: - compatible - gpio-controller @@ -87,6 +92,9 @@ properties: - compatible - "#reset-cells" + power: + $ref: /schemas/power/raspberrypi,bcm2835-power.yaml# + pwm: type: object additionalProperties: false From 91c6a33175ed0c78f51bc23caecadde324e36a9a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:27:08 -0600 Subject: [PATCH 15/60] dt-bindings: net: brcm,amac: Allow "dma-coherent" property The Broadcom AMAC controller is DMA coherent on some platforms, so allow the dma-coherent property. Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20251215212709.3320889-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/net/brcm,amac.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/brcm,amac.yaml b/Documentation/devicetree/bindings/net/brcm,amac.yaml index 210fb29c4e7b..be1bf07985e4 100644 --- a/Documentation/devicetree/bindings/net/brcm,amac.yaml +++ b/Documentation/devicetree/bindings/net/brcm,amac.yaml @@ -73,6 +73,8 @@ properties: - const: idm_base - const: nicpm_base + dma-coherent: true + unevaluatedProperties: false examples: From 515f85d0e7c209b2cda58edeeaa1eb4ba4982b4c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:30:21 -0600 Subject: [PATCH 16/60] dt-bindings: arm: Drop obsolete brcm,vulcan-soc binding The Cavium ThunderX2 aka Broadcom Vulcan doesn't use DT, but ACPI, so drop the SoC binding. Link: https://patch.msgid.link/20251215213022.3325133-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/bcm/brcm,vulcan-soc.yaml | 24 ------------------- MAINTAINERS | 7 ------ 2 files changed, 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml deleted file mode 100644 index 3f441352fbf0..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml +++ /dev/null @@ -1,24 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Broadcom Vulcan - -maintainers: - - Robert Richter - -properties: - $nodename: - const: '/' - compatible: - items: - - enum: - - brcm,vulcan-eval - - cavium,thunderx2-cn9900 - - const: brcm,vulcan-soc - -additionalProperties: true - -... diff --git a/MAINTAINERS b/MAINTAINERS index beb371e8c541..76f7409550a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5721,13 +5721,6 @@ S: Supported W: http://www.marvell.com F: drivers/crypto/cavium/cpt/ -CAVIUM THUNDERX2 ARM64 SOC -M: Robert Richter -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Odd Fixes -F: Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml -F: arch/arm64/boot/dts/cavium/thunder2-99xx* - CBS/ETF/TAPRIO QDISCS M: Vinicius Costa Gomes L: netdev@vger.kernel.org From 4ed31b0c4c583bd4ff1c3b38243c5eaf27ca1174 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 19 Dec 2025 08:40:36 +0100 Subject: [PATCH 17/60] dt-bindings: mediatek: Drop inactive MandyJH Liu There are no emails from MandyJH Liu, no reviews [1] of these bindings, so clearly no maintenance is happening here. Switch to Mediatek SoC maintainers. Cc: MandyJH Liu Link: https://lore.kernel.org/all/?q=f%3Amandyjh.liu%40mediatek.com [1] Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251219074035.13001-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml | 3 ++- .../devicetree/bindings/power/mediatek,power-controller.yaml | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml index 0e1d43c96fb9..1cb9d6797b92 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek System Control Processor System maintainers: - - MandyJH Liu + - AngeloGioacchino Del Regno + - Matthias Brugger description: MediaTek System Control Processor System (SCPSYS) has several diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index f8a13928f615..9507b342a7ee 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek Power Domains Controller maintainers: - - MandyJH Liu + - AngeloGioacchino Del Regno - Matthias Brugger description: | From 16f47ecae157a62490c68e2697462cc13c247d25 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 31 Dec 2025 13:09:27 +0100 Subject: [PATCH 18/60] of/platform: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251231120926.66185-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/of/platform.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/of/platform.c b/drivers/of/platform.c index f77cb19973a5..d4e169b3b5af 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -394,7 +394,6 @@ int of_platform_bus_probe(struct device_node *root, const struct of_device_id *matches, struct device *parent) { - struct device_node *child; int rc = 0; root = root ? of_node_get(root) : of_find_node_by_path("/"); @@ -407,13 +406,13 @@ int of_platform_bus_probe(struct device_node *root, /* Do a self check of bus type, if there's a match, create children */ if (of_match_node(matches, root)) { rc = of_platform_bus_create(root, matches, NULL, parent, false); - } else for_each_child_of_node(root, child) { - if (!of_match_node(matches, child)) - continue; - rc = of_platform_bus_create(child, matches, NULL, parent, false); - if (rc) { - of_node_put(child); - break; + } else { + for_each_child_of_node_scoped(root, child) { + if (!of_match_node(matches, child)) + continue; + rc = of_platform_bus_create(child, matches, NULL, parent, false); + if (rc) + break; } } From e03a631628db59b0fb7a4563594ed745c7adc2d8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:26:47 -0600 Subject: [PATCH 19/60] dt-bindings: reset: syscon-reboot: Allow both 'reg' and 'offset' For compatibility, it is necessary to support both 'reg' and 'offset' at the same time. Link: https://patch.msgid.link/20251215212648.3320333-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/power/reset/syscon-reboot.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index ccd555870094..b1c0bcb1e25d 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -79,7 +79,7 @@ allOf: required: - value - oneOf: + anyOf: - required: [offset] - required: [reg] From ec47eb49a332481d2e2947e75751f66560d2e7e2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 16 Dec 2025 15:15:55 -0600 Subject: [PATCH 20/60] dt-bindings: power: syscon-poweroff: Allow "reg" property Similar to "syscon-reset", allow using the standard "reg" property rather than "offset". Link: https://patch.msgid.link/20251216211556.3047726-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/power/reset/syscon-poweroff.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml index d342b113fca2..b5e92b500764 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml @@ -23,6 +23,9 @@ properties: compatible: const: syscon-poweroff + reg: + maxItems: 1 + mask: $ref: /schemas/types.yaml#/definitions/uint32 description: Update only the register bits defined by the mask (32 bit). @@ -44,7 +47,10 @@ properties: required: - compatible - - offset + +anyOf: + - required: [offset] + - required: [reg] additionalProperties: false From 08a953754a3b981024e9cf5a4201be6e858c77e4 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Sun, 4 Jan 2026 14:41:13 +0800 Subject: [PATCH 21/60] dt-bindings: interrupt-controller: loongson,liointc: Document address-cells The Loongson local I/O interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k1000.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou Link: https://patch.msgid.link/fb3811b6bc387aa23adfc0aaf9a0a31c2d468e79.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/loongson,liointc.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index f63b23f48d8e..9f532cb11d0c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -40,6 +40,9 @@ properties: - const: isr1 minItems: 2 + '#address-cells': + const: 0 + interrupt-controller: true interrupts: From 3efe078d9d49ad121bac602ae25d92c2ffac3029 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Sun, 4 Jan 2026 14:41:12 +0800 Subject: [PATCH 22/60] dt-bindings: interrupt-controller: loongson,eiointc: Document address-cells The Loongson Extend I/O interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k0500.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou Link: https://patch.msgid.link/3e903541d37432c88c27272094420b03418a607d.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/loongson,eiointc.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml index 393c128a41d8..3c03d90058ed 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml @@ -29,6 +29,9 @@ properties: interrupts: maxItems: 1 + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': From 5872df37c4ade93df81dd46020eef0e254cf7fb7 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Sun, 4 Jan 2026 14:41:49 +0800 Subject: [PATCH 23/60] dt-bindings: interrupt-controller: loongson,pch-pic: Document address-cells The Loongson PCH interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k2000.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou Link: https://patch.msgid.link/e531084ee65a695ec08d0f559caec067877fb9a5.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/loongson,pch-pic.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml index b7bc5cb1dff2..eee10abe9e48 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml @@ -29,6 +29,9 @@ properties: minimum: 0 maximum: 192 + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': From d289cb7fcefe41a54d8f9c6d0e0947f5f82b15c6 Mon Sep 17 00:00:00 2001 From: Tuo Li Date: Mon, 5 Jan 2026 15:14:38 +0800 Subject: [PATCH 24/60] of: unittest: fix possible null-pointer dereferences in of_unittest_property_copy() This function first duplicates p1 and p2 into new, and then checks whether the duplication succeeds. However, if the duplication fails (e.g., kzalloc() returns NULL in __of_prop_dup()), new will be NULL but is still dereferenced in __of_prop_free(). To ensure that the unit test continues to run even when duplication fails, add a NULL check before calling __of_prop_free(). Fixes: 1c5e3d9bf33b ("of: Add a helper to free property struct") Signed-off-by: Tuo Li Link: https://patch.msgid.link/20260105071438.156186-1-islituo@gmail.com Signed-off-by: Rob Herring (Arm) --- drivers/of/unittest.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 388e9ec2cccf..ea650a9ca2d9 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -804,11 +804,13 @@ static void __init of_unittest_property_copy(void) new = __of_prop_dup(&p1, GFP_KERNEL); unittest(new && propcmp(&p1, new), "empty property didn't copy correctly\n"); - __of_prop_free(new); + if (new) + __of_prop_free(new); new = __of_prop_dup(&p2, GFP_KERNEL); unittest(new && propcmp(&p2, new), "non-empty property didn't copy correctly\n"); - __of_prop_free(new); + if (new) + __of_prop_free(new); #endif } From b96b485755ca0e12e3981f14b789315fb41713ee Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Fri, 19 Dec 2025 13:18:11 +0100 Subject: [PATCH 25/60] of: property: stop creating callback for each pinctrl-N property While not a lot in the grand scheme of things, this eliminates 8*2 pointless function calls for almost every property present in the device tree (the exception are the few properties that were already matched). It also seems to reduce .text by about 1.5K - why gcc decides to inline parse_prop_cells() in every instantiation I don't know. Signed-off-by: Rasmus Villemoes Link: https://patch.msgid.link/20251219121811.390988-1-linux@rasmusvillemoes.dk [robh: Drop the commit msg comment that >9 doesn't work as it would] Signed-off-by: Rob Herring (Arm) --- drivers/of/property.c | 32 ++++++++++++++------------------ 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/drivers/of/property.c b/drivers/of/property.c index ce5ada040d7e..07110640cf32 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -21,6 +21,7 @@ #define pr_fmt(fmt) "OF: " fmt +#include #include #include #include @@ -1380,15 +1381,6 @@ DEFINE_SIMPLE_PROP(extcon, "extcon", NULL) DEFINE_SIMPLE_PROP(nvmem_cells, "nvmem-cells", "#nvmem-cell-cells") DEFINE_SIMPLE_PROP(phys, "phys", "#phy-cells") DEFINE_SIMPLE_PROP(wakeup_parent, "wakeup-parent", NULL) -DEFINE_SIMPLE_PROP(pinctrl0, "pinctrl-0", NULL) -DEFINE_SIMPLE_PROP(pinctrl1, "pinctrl-1", NULL) -DEFINE_SIMPLE_PROP(pinctrl2, "pinctrl-2", NULL) -DEFINE_SIMPLE_PROP(pinctrl3, "pinctrl-3", NULL) -DEFINE_SIMPLE_PROP(pinctrl4, "pinctrl-4", NULL) -DEFINE_SIMPLE_PROP(pinctrl5, "pinctrl-5", NULL) -DEFINE_SIMPLE_PROP(pinctrl6, "pinctrl-6", NULL) -DEFINE_SIMPLE_PROP(pinctrl7, "pinctrl-7", NULL) -DEFINE_SIMPLE_PROP(pinctrl8, "pinctrl-8", NULL) DEFINE_SIMPLE_PROP(pwms, "pwms", "#pwm-cells") DEFINE_SIMPLE_PROP(resets, "resets", "#reset-cells") DEFINE_SIMPLE_PROP(leds, "leds", NULL) @@ -1402,6 +1394,18 @@ DEFINE_SIMPLE_PROP(power_supplies, "power-supplies", NULL) DEFINE_SUFFIX_PROP(regulators, "-supply", NULL) DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells") +static struct device_node *parse_pinctrl_n(struct device_node *np, + const char *prop_name, int index) +{ + if (!strstarts(prop_name, "pinctrl-")) + return NULL; + + if (!isdigit(prop_name[strlen("pinctrl-")])) + return NULL; + + return of_parse_phandle(np, prop_name, index); +} + static struct device_node *parse_gpios(struct device_node *np, const char *prop_name, int index) { @@ -1525,15 +1529,7 @@ static const struct supplier_bindings of_supplier_bindings[] = { { .parse_prop = parse_nvmem_cells, }, { .parse_prop = parse_phys, }, { .parse_prop = parse_wakeup_parent, }, - { .parse_prop = parse_pinctrl0, }, - { .parse_prop = parse_pinctrl1, }, - { .parse_prop = parse_pinctrl2, }, - { .parse_prop = parse_pinctrl3, }, - { .parse_prop = parse_pinctrl4, }, - { .parse_prop = parse_pinctrl5, }, - { .parse_prop = parse_pinctrl6, }, - { .parse_prop = parse_pinctrl7, }, - { .parse_prop = parse_pinctrl8, }, + { .parse_prop = parse_pinctrl_n, }, { .parse_prop = parse_remote_endpoint, .get_con_dev = of_graph_get_port_parent, From 949c38ad4b9b41f8ef81bbad00e979b27ff918a5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 Jan 2026 15:12:54 -0600 Subject: [PATCH 26/60] dt-bindings: trivial-devices: Add some more undocumented devices Add a few trivial devices which are already in use in Nuvoton and ASpeed DTS files. Link: https://patch.msgid.link/20260105211255.3431856-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 1b356cb674d2..0cc2bf5455b4 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -91,6 +91,8 @@ properties: - delta,ahe50dc-fan # Delta Electronics DPS-650-AB power supply - delta,dps650ab + # Delta Electronics DPS-800-AB power supply + - delta,dps800 # Delta Electronics DPS920AB 920W 54V Power Supply - delta,dps920ab # 1/4 Brick DC/DC Regulated Power Module @@ -133,10 +135,14 @@ properties: - ibm,cffps2 # IBM On-Chip Controller hwmon device - ibm,p8-occ-hwmon + # Infineon Digital Multi-phase Controller + - infineon,ir35221 # Infineon IR36021 digital POL buck controller - infineon,ir36021 # Infineon IRPS5401 Voltage Regulator (PMIC) - infineon,irps5401 + # Infineon Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller + - infineon,pxe1610 # Infineon Hot-swap controller xdp710 - infineon,xdp710 # Infineon Multi-phase Digital VR Controller xdpe11280 From d93380833165df8f3f74500bffa65eb76028a88a Mon Sep 17 00:00:00 2001 From: Luka Kovacic Date: Tue, 24 Aug 2021 14:44:32 +0200 Subject: [PATCH 27/60] dt-bindings: Add IEI vendor prefix and IEI WT61P803 PUZZLE driver bindings Add the IEI WT61P803 PUZZLE Device Tree bindings for MFD, HWMON and LED drivers. A new vendor prefix is also added accordingly for IEI Integration Corp. Signed-off-by: Luka Kovacic Signed-off-by: Pavo Banicevic Cc: Luka Perkov Cc: Robert Marko Reviewed-by: Rob Herring Link: https://patch.msgid.link/20210824124438.14519-2-luka.kovacic@sartura.hr [robh: fix warnings from current tools] Signed-off-by: Rob Herring (Arm) --- .../hwmon/iei,wt61p803-puzzle-hwmon.yaml | 59 ++++++++++++++ .../leds/iei,wt61p803-puzzle-leds.yaml | 41 ++++++++++ .../bindings/mfd/iei,wt61p803-puzzle.yaml | 80 +++++++++++++++++++ 3 files changed, 180 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml create mode 100644 Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml create mode 100644 Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml diff --git a/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml new file mode 100644 index 000000000000..9406978f69ea --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp. + +maintainers: + - Luka Kovacic + +description: | + This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details + see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. + + The HWMON module is a sub-node of the MCU node in the Device Tree. + +properties: + compatible: + const: iei,wt61p803-puzzle-hwmon + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + '^fan-group@[0-1]$': + type: object + additionalProperties: false + + properties: + reg: + minimum: 0 + maximum: 1 + description: + Fan group ID + + '#cooling-cells': + const: 2 + + cooling-levels: + minItems: 1 + maxItems: 255 + description: + Cooling levels for the fans (PWM value mapping) + + required: + - reg + - '#cooling-cells' + - cooling-levels + +required: + - compatible + - '#address-cells' + - '#size-cells' + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml new file mode 100644 index 000000000000..fcaf8258bbc1 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp. + +maintainers: + - Luka Kovacic + +description: | + This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details + see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. + + The LED module is a sub-node of the MCU node in the Device Tree. + +properties: + compatible: + const: iei,wt61p803-puzzle-leds + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + led@0: + $ref: common.yaml + unevaluatedProperties: false + + properties: + reg: + const: 0 + +required: + - compatible + - '#address-cells' + - '#size-cells' + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml new file mode 100644 index 000000000000..28e488cdde2d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp. + +maintainers: + - Luka Kovacic + +description: | + IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards. + It's used for controlling system power states, fans, LEDs and temperature + sensors. + + For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the + binding documents under the respective subsystem directories. + +properties: + compatible: + const: iei,wt61p803-puzzle + + current-speed: true + + enable-beep: + type: boolean + + hwmon: + $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml + + leds: + $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml + +required: + - compatible + - current-speed + +additionalProperties: false + +examples: + - | + #include + serial { + mcu { + compatible = "iei,wt61p803-puzzle"; + current-speed = <115200>; + enable-beep; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + function = LED_FUNCTION_POWER; + color = ; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <64 102 170 230 250>; + }; + + fan-group@1 { + #cooling-cells = <2>; + reg = <0x01>; + cooling-levels = <64 102 170 230 250>; + }; + }; + }; + }; From 8aa2f0ac08d3b207ba54e98698c9d696b86452a7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 6 Jan 2026 02:22:20 +0100 Subject: [PATCH 28/60] dt-bindings: display: bridge: ldb: Add check for reg and reg-names Make "reg" property mandatory for all LDB devices and "reg-names" mandatory for i.MX8MP and i.MX93 which have two "reg" values. The i.MX6SX has only one "reg" value so the "reg-names" property there is optional and not needed. Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260106012236.295834-1-marek.vasut@mailbox.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/fsl,ldb.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml index 07388bf2b90d..49664101a353 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -59,6 +59,7 @@ required: - compatible - clocks - ports + - reg allOf: - if: @@ -73,6 +74,15 @@ allOf: ports: properties: port@2: false + - if: + not: + properties: + compatible: + contains: + const: fsl,imx6sx-ldb + then: + required: + - reg-names additionalProperties: false From 1638b8a34e1e2f89e923ca62ede78c1a4719d1da Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 7 Jan 2026 14:22:49 +0100 Subject: [PATCH 29/60] docs: dt: submitting-patches: Document prefixes for SCSI and UFS Devicetree bindings patches going through SCSI/UFS trees also use reversed subject prefix. Cc: Martin K. Petersen Cc: linux-scsi@vger.kernel.org Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260107132248.47877-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/submitting-patches.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index ce767b1eccf2..81e27e50f905 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -15,8 +15,8 @@ I. For patch submitters "dt-bindings: : ..." - Few subsystems, like ASoC, media, regulators and SPI, expect reverse order - of the prefixes:: + Few subsystems, like ASoC, media, regulators, SCSI, SPI and UFS, expect + reverse order of the prefixes, based on subsystem name:: ": dt-bindings: ..." From 04657c4060ef43c43821ace3d11e0ec12863fcd7 Mon Sep 17 00:00:00 2001 From: Francesco Valla Date: Sat, 10 Jan 2026 16:27:59 +0100 Subject: [PATCH 30/60] of: property: fw_devlink: Add support for "mmc-pwrseq" Add support for parsing MMC power sequencing (pwrseq) binding so that fw_devlink can enforce the dependency. Signed-off-by: Francesco Valla Reviewed-by: Ulf Hansson Link: https://patch.msgid.link/20260110-mmc-pwrseq-v1-1-73de9d6456f4@valla.it Signed-off-by: Rob Herring (Arm) --- drivers/of/property.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/of/property.c b/drivers/of/property.c index 07110640cf32..50d95d512bf5 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1391,6 +1391,7 @@ DEFINE_SIMPLE_PROP(post_init_providers, "post-init-providers", NULL) DEFINE_SIMPLE_PROP(access_controllers, "access-controllers", "#access-controller-cells") DEFINE_SIMPLE_PROP(pses, "pses", "#pse-cells") DEFINE_SIMPLE_PROP(power_supplies, "power-supplies", NULL) +DEFINE_SIMPLE_PROP(mmc_pwrseq, "mmc-pwrseq", NULL) DEFINE_SUFFIX_PROP(regulators, "-supply", NULL) DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells") @@ -1542,6 +1543,7 @@ static const struct supplier_bindings of_supplier_bindings[] = { { .parse_prop = parse_msi_parent, }, { .parse_prop = parse_pses, }, { .parse_prop = parse_power_supplies, }, + { .parse_prop = parse_mmc_pwrseq, }, { .parse_prop = parse_gpio_compat, }, { .parse_prop = parse_interrupts, }, { .parse_prop = parse_interrupt_map, }, From d80c9abe02fd18b8cc3b7802cf7ee6de55c76d96 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 7 Jan 2026 22:35:21 +0100 Subject: [PATCH 31/60] dt-bindings: display: bridge: tc358867: mark port 0 and 1 configuration as valid Current binding document enforces presence of either port@0 (DSI in) or port@1 (DPI IN/OUT), with port@2 (DP out) being optional. This bridge is capable of DSI->DP, DPI->DP and DPI->DP, it is therefore perfectly valid to have both port@0 and port@1 described in the DT, because this is fairy standard DPI->DP configuration of this bridge. Replace oneOf with anyOf to cover this configuration. Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260107213546.505137-1-marex@nabladev.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/toshiba,tc358767.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml index 70f229dc4e0c..75804114f71f 100644 --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml @@ -117,7 +117,7 @@ properties: - 1 # 3.5dB pre-emphasis - 2 # 6dB pre-emphasis - oneOf: + anyOf: - required: - port@0 - required: From d897a50e0c8720d1f987caadae056c7f4c7aa266 Mon Sep 17 00:00:00 2001 From: Kuan-Wei Chiu Date: Tue, 13 Jan 2026 09:26:02 +0000 Subject: [PATCH 32/60] dt-bindings: display: google,goldfish-fb: Convert to DT schema Convert the Android Goldfish Framebuffer binding to DT schema format. Update the example node name to 'display' to comply with generic node naming standards. Signed-off-by: Kuan-Wei Chiu Link: https://patch.msgid.link/20260113092602.3197681-7-visitorckw@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/display/google,goldfish-fb.txt | 17 --------- .../bindings/display/google,goldfish-fb.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/google,goldfish-fb.txt create mode 100644 Documentation/devicetree/bindings/display/google,goldfish-fb.yaml diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt deleted file mode 100644 index 751fa9f51e5d..000000000000 --- a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish framebuffer - -Android Goldfish framebuffer device used by Android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-fb" -- reg : -- interrupts : - -Example: - - display-controller@1f008000 { - compatible = "google,goldfish-fb"; - interrupts = <0x10>; - reg = <0x1f008000 0x100>; - }; diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml b/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml new file mode 100644 index 000000000000..36ed77cbbcd7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/google,goldfish-fb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish Framebuffer + +maintainers: + - Kuan-Wei Chiu + +description: + Android Goldfish framebuffer device used by Android emulator. + +properties: + compatible: + const: google,goldfish-fb + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + display@1f008000 { + compatible = "google,goldfish-fb"; + reg = <0x1f008000 0x100>; + interrupts = <16>; + }; From aa135288890cf18367eaefb221841fd97da74471 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 14 Jan 2026 09:13:23 +0100 Subject: [PATCH 33/60] dt-bindings: Fix I2C bus node names in examples I2C bus node names are expected to be just "i2c", if there is just one such node in given example. Replace remaining bad examples with scripted: git grep -l '\si2c[0-9] {' Documentation/devicetree/ | xargs sed -i -e 's/i2c[0-9] {/i2c {/' Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Reviewed-by: AngeloGioacchino Del Regno Link: https://patch.msgid.link/20260114081322.53411-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../bindings/embedded-controller/lenovo,yoga-c630-ec.yaml | 2 +- Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml | 2 +- Documentation/devicetree/bindings/usb/ite,it5205.yaml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml index a029b38e8dc0..c88fbd6ad940 100644 --- a/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml +++ b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml @@ -50,7 +50,7 @@ additionalProperties: false examples: - |+ #include - i2c1 { + i2c { clock-frequency = <400000>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml index a89f740214f7..dffd23ca4839 100644 --- a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml +++ b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml @@ -95,7 +95,7 @@ examples: #include #include - i2c0 { + i2c { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/usb/ite,it5205.yaml b/Documentation/devicetree/bindings/usb/ite,it5205.yaml index 889710733de5..045fcb41ac4b 100644 --- a/Documentation/devicetree/bindings/usb/ite,it5205.yaml +++ b/Documentation/devicetree/bindings/usb/ite,it5205.yaml @@ -49,7 +49,7 @@ additionalProperties: false examples: - | #include - i2c2 { + i2c { #address-cells = <1>; #size-cells = <0>; From dde77e6dc960969db3d756b802f5260ced9b9f1a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 16 Jan 2026 18:29:16 +0100 Subject: [PATCH 34/60] dt-bindings: mediatek: Replace Tinghan Shen in maintainers Emails to Tinghan Shen bounce permanently with "550 Relaying mail to tinghan.shen@mediatek.com is not allowed (in reply to RCPT TO command)", so switch to AngeloGioacchino Del Regno - Mediatek SoC platform maintainer. Signed-off-by: Krzysztof Kozlowski Acked-by: Mathieu Poirier Link: https://patch.msgid.link/20260116172915.99811-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml | 2 +- Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml index 88575da1e6d5..508b8c2f13a2 100644 --- a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek mt8186 DSP core maintainers: - - Tinghan Shen + - AngeloGioacchino Del Regno description: | MediaTek mt8186 SoC contains a DSP core used for diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 179c98b33b4d..bdbb12118da4 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek SCP maintainers: - - Tinghan Shen + - AngeloGioacchino Del Regno description: This binding provides support for ARM Cortex M4 Co-processor found on some From c0238bbba7c5a45afbfe61a31c3ba322f744feb0 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 15 Dec 2025 15:26:21 -0600 Subject: [PATCH 35/60] dt-bindings: mfd: Add Realtek RTD1xxx system controllers The Realtek system controllers are already in use with only generic '"syscon", "simple-mfd"' compatibles and are missing specific compatibles as required. Add a schema with specific compatibles. The labels used in .dts files serve as the basis for the names. It's doubtful the child nodes upstream are complete and I don't have documentation, so the specific child nodes aren't documented here. Of the ones in use, bindings already exist for them. Link: https://patch.msgid.link/20251215212624.3319681-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/mfd/realtek,rtd1xxx.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml b/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml new file mode 100644 index 000000000000..b0342df0e32a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/realtek,rtd1xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTD1xxx system controllers + +maintainers: + - Andreas Färber + +properties: + compatible: + items: + - enum: + - realtek,rtd1293-crt + - realtek,rtd1293-iso + - realtek,rtd1293-misc + - realtek,rtd1293-sb2 + - realtek,rtd1293-scpu-wrapper + - realtek,rtd1295-crt + - realtek,rtd1295-iso + - realtek,rtd1295-misc + - realtek,rtd1295-sb2 + - realtek,rtd1295-scpu-wrapper + - realtek,rtd1296-crt + - realtek,rtd1296-iso + - realtek,rtd1296-misc + - realtek,rtd1296-sb2 + - realtek,rtd1296-scpu-wrapper + - realtek,rtd1395-crt + - realtek,rtd1395-iso + - realtek,rtd1395-misc + - realtek,rtd1395-sb2 + - realtek,rtd1395-scpu-wrapper + - realtek,rtd1619-crt + - realtek,rtd1619-iso + - realtek,rtd1619-misc + - realtek,rtd1619-sb2 + - realtek,rtd1619-scpu-wrapper + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + reg-io-width: + const: 4 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + '@[0-9a-f]+$': + type: object + + required: + - compatible + +required: + - compatible + - reg + +additionalProperties: false From 554fb141654e555a51386b4d5855aa7a7a4a4a44 Mon Sep 17 00:00:00 2001 From: Nauman Sabir Date: Fri, 16 Jan 2026 00:00:58 +0100 Subject: [PATCH 36/60] dt-bindings: display: mediatek: Fix typo 'hardwares' to 'hardware' Fix incorrect plural form of the uncountable noun 'hardware' in the MediaTek DP binding description. Signed-off-by: Nauman Sabir Link: https://patch.msgid.link/20260115230058.7704-1-officialnaumansabir@gmail.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/mediatek/mediatek,dp.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml index 274f590807ca..8f4bd9fb560b 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -11,7 +11,7 @@ maintainers: - Jitao shi description: | - MediaTek DP and eDP are different hardwares and there are some features + MediaTek DP and eDP are different hardware and there are some features which are not supported for eDP. For example, audio is not supported for eDP. Therefore, we need to use two different compatibles to describe them. In addition, We just need to enable the power domain of DP, so the clock From 9dace5e4e2a3a8d162c0136e7b822f91cb9b8ea6 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Tue, 20 Jan 2026 19:54:23 +0100 Subject: [PATCH 37/60] dt-bindings: omap: ti,prm-inst: Convert to DT schema Convert prm-inst binding to DT schema. Use the closest matching standard node name in the example. Signed-off-by: Andreas Kemnade Link: https://patch.msgid.link/20260120-prm-inst-v2-1-a025873cee27@kemnade.info Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/omap/prm-inst.txt | 31 ----------- .../bindings/arm/ti/ti,omap-prm-inst.yaml | 55 +++++++++++++++++++ 2 files changed, 55 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/omap/prm-inst.txt create mode 100644 Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt deleted file mode 100644 index 42db138e091a..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt +++ /dev/null @@ -1,31 +0,0 @@ -OMAP PRM instance bindings - -Power and Reset Manager is an IP block on OMAP family of devices which -handle the power domains and their current state, and provide reset -handling for the domains and/or separate IP blocks under the power domain -hierarchy. - -Required properties: -- compatible: Must contain one of the following: - "ti,am3-prm-inst" - "ti,am4-prm-inst" - "ti,omap4-prm-inst" - "ti,omap5-prm-inst" - "ti,dra7-prm-inst" - and additionally must contain: - "ti,omap-prm-inst" -- reg: Contains PRM instance register address range - (base address and length) - -Optional properties: -- #power-domain-cells: Should be 0 if the instance is a power domain provider. -- #reset-cells: Should be 1 if the PRM instance in question supports resets. - -Example: - -prm_dsp2: prm@1b00 { - compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; - reg = <0x1b00 0x40>; - #power-domain-cells = <0>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml b/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml new file mode 100644 index 000000000000..2cce083dcfb0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/ti,omap-prm-inst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP PRM instances + +maintainers: + - Aaro Koskinen + - Andreas Kemnade + - Kevin Hilman + - Roger Quadros + - Tony Lindgren + +description: + Power and Reset Manager is an IP block on OMAP family of devices which + handle the power domains and their current state, and provide reset + handling for the domains and/or separate IP blocks under the power domain + hierarchy. + +properties: + compatible: + items: + - enum: + - ti,am3-prm-inst + - ti,am4-prm-inst + - ti,omap4-prm-inst + - ti,omap5-prm-inst + - ti,dra7-prm-inst + - const: ti,omap-prm-inst + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 0 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + reset-controller@1b00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b00 0x40>; + #power-domain-cells = <0>; + #reset-cells = <1>; + }; From febfd49a8cbde615804fb6614e5bd4fa6bf44fe7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 12 Jan 2026 17:02:40 +0100 Subject: [PATCH 38/60] dt-bindings: display: bridge: nxp,tda998x: Add missing clocks Some TDA998x variants (e.g. TDA19988) have an OSC_IN pin, to connect an external oscillator circuit or clock source. Signed-off-by: Geert Uytterhoeven Link: https://patch.msgid.link/2b66577296583a6787f770f0eb13c42a6b50768b.1768233569.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/nxp,tda998x.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml index 3fce9e698ea1..1205c8e9de32 100644 --- a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml @@ -19,6 +19,9 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + video-ports: $ref: /schemas/types.yaml#/definitions/uint32 default: 0x230145 From ec2ff23bf501b651e896143e3c7c0ca91b292c4a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 21 Jan 2026 09:53:19 +0100 Subject: [PATCH 39/60] dt-bindings: eeprom: at25: Document Microchip 25AA010A The Microchip 25AA010A is a 1 Kbit SPI EEPROM with 16 Byte page. Product page is at https://www.microchip.com/en-us/product/25AA010A Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260121085347.10368-1-marex@nabladev.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/eeprom/at25.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml index e1599ce10916..bb78e12b8823 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.yaml +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -31,6 +31,7 @@ properties: - fujitsu,mb85rs1mt - fujitsu,mb85rs256 - fujitsu,mb85rs64 + - microchip,25aa010a - microchip,at25160bn - microchip,25lc040 - st,m95m02 From 0365adafdb9bb9f7b5dc6793a8db3854beac0a94 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 21 Jan 2026 09:53:20 +0100 Subject: [PATCH 40/60] dt-bindings: display/lvds-codec: Document OnSemi FIN3385 Add compatible string for OnSemi FIN3385, a FlatLink LVDS transmitter. Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260121085347.10368-2-marex@nabladev.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 4f7d3e9cf0c2..4f52e35d0253 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -33,6 +33,7 @@ properties: oneOf: - items: - enum: + - onnn,fin3385 # OnSemi FIN3385 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter From 5dff92a7bde9a8ef3b709f65e347cb1c33260cf4 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Wed, 7 Jan 2026 14:04:52 +0100 Subject: [PATCH 41/60] of: reserved_mem: Fix placement of __free() annotation The __free() annotation was incorrectly placed before the variable name instead of after it, which resulted in the following checkpatch errors: ERROR: need consistent spacing around '*' (ctx:WxV) + struct device_node __free(device_node) *target = of_parse_phandle(np, "memory-region", idx); ^ WARNING: function definition argument 'idx' should also have an identifier name + struct device_node __free(device_node) *target = of_parse_phandle(np, "memory-region", idx); As part of this cleanup, also remove the useless return statement flagged by checkpatch. Signed-off-by: Gregory CLEMENT Link: https://patch.msgid.link/20260107-mtd-memregion-v3-1-f9fc9107b992@bootlin.com Signed-off-by: Rob Herring (Arm) --- drivers/of/of_reserved_mem.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 5619ec917858..1ab8f4153600 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -127,7 +127,6 @@ static void __init fdt_reserved_mem_save_node(unsigned long node, const char *un fdt_init_reserved_mem_node(rmem); reserved_mem_count++; - return; } static int __init early_init_dt_reserve_memory(phys_addr_t base, @@ -747,7 +746,7 @@ int of_reserved_mem_region_to_resource(const struct device_node *np, if (!np) return -EINVAL; - struct device_node __free(device_node) *target = of_parse_phandle(np, "memory-region", idx); + struct device_node *target __free(device_node) = of_parse_phandle(np, "memory-region", idx); if (!target || !of_device_is_available(target)) return -ENODEV; From ad0cfd9985c5bbca63aba42685e6b9c0eb3cae61 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 12 Jan 2026 15:55:55 +0100 Subject: [PATCH 42/60] dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles Add SoC specific compatibles for the SafeXcel crypto engine, including one for the EIP197B used by Marvell Armada CP110 and and two for the EIP97IES used by Marvell Armada 3700 and by MediaTek MT7986. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260112145558.54644-2-angelogioacchino.delregno@collabora.com Signed-off-by: Rob Herring (Arm) --- .../bindings/crypto/inside-secure,safexcel.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml index 343e2d04c797..1c8bfd6c958d 100644 --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml @@ -12,6 +12,14 @@ maintainers: properties: compatible: oneOf: + - items: + - const: marvell,armada-cp110-crypto + - const: inside-secure,safexcel-eip197b + - items: + - enum: + - marvell,armada-3700-crypto + - mediatek,mt7986-crypto + - const: inside-secure,safexcel-eip97ies - const: inside-secure,safexcel-eip197b - const: inside-secure,safexcel-eip197d - const: inside-secure,safexcel-eip97ies From e2bafe4d1b72e6cd06ed9c0921cb3cce674db351 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 12 Jan 2026 15:55:56 +0100 Subject: [PATCH 43/60] dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs Not all IP implementations of EIP97 and EIP197 have the EIP and MEM interrupts hooked up to the SoC, and those are not required for functionality as status for both can be polled (and anyway there's even no real need to poll, but that's another story). As an example of this, the MediaTek MT7986A and MT7986B SoCs do not have those two interrupts hooked up to their irq controlller. For this reason, make the EIP and MEM interrupt optional on the mediatek,mt7986-crypto. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260112145558.54644-3-angelogioacchino.delregno@collabora.com Signed-off-by: Rob Herring (Arm) --- .../bindings/crypto/inside-secure,safexcel.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml index 1c8bfd6c958d..3dc6c5f89d32 100644 --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml @@ -34,9 +34,11 @@ properties: maxItems: 1 interrupts: + minItems: 4 maxItems: 6 interrupt-names: + minItems: 4 items: - const: ring0 - const: ring1 @@ -73,6 +75,18 @@ allOf: minItems: 2 required: - clock-names + - if: + properties: + compatible: + not: + contains: + const: mediatek,mt7986-crypto + then: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 additionalProperties: false From dfe057874b34cb42b20474811398e0c79f472ebe Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 21 Jan 2026 12:49:42 -0600 Subject: [PATCH 44/60] scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8 This adds the following commits from upstream: a26ef6400bd8 Restore phandle references from __fixups__ node 05c524db44ff Restore phandle references from __local_fixups__ node db65a3a3f4f0 Restore labels from __symbols__ node 64330c682cac Improve type guessing when compiling to dts format cbb48690c697 Set DTSF_PLUGIN if needed when compiling from dtb ef3b1baf6370 Emit /plugin/ when compiling to .dts with DTSF_PLUGIN set 7c78c8542d73 Added empty node name check 14dd76b96732 fdtdump: Change FDT_PROP prob handling to ease future addition 9a1c801a1a3c Fix discarded const qualifiers 194ac9422ac9 libfdt: fdt_get_name: Add can_assume(VALID_DTB) check 39cae0bd0031 libfdt: Improve size savings in FDT_RO_PROBE slightly b12692473298 libfdt: libfdt_internal.h correct final comment in ASSUME block 7f3184a6c550 libfdt: Remove old MacOS strnlen workaround 9197f1ccd95c checks: Do not check overlays for alias paths e1284ee5dc20 livetree: Add only new data to fixup nodes instead of complete regeneration cba90ce82064 checks: Remove check for graph child addresses 763c6ab4189c livetree: Simplify append_to_property() 739403f22242 libfdt: Drop including string.h from libfdt_internal.h 1c6c51e51b29 Consider drive letters when checking for absolute paths on Windows. 617f3d9b60f7 ci: Add Cirrus CI configuration for FreeBSD testing 04f948e83fef ci: Add GitLab CI configuration for Linux builds e89680263137 ci: Tweaks to GitHub Actions setup 2ad738722b79 build: Add FreeBSD and non-GNU linker compatibility 4132ac08ba95 libfdt: Document most remaining functions 33e66ec845b8 tests: Add compatibility with uutils a0dd7b608102 fdtput: Use strtol() in preference to sscanf() 5b71660724d7 tests: Work around limitation in FreeBSD's printf(1) The graph_child_address check has been removed from upstream. Drop it from the makefiles. Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/Makefile | 1 - scripts/Makefile.dtbs | 1 - scripts/dtc/checks.c | 42 +-- scripts/dtc/dtc.c | 5 + scripts/dtc/dtc.h | 6 + scripts/dtc/flattree.c | 6 +- scripts/dtc/libfdt/fdt_overlay.c | 3 +- scripts/dtc/libfdt/fdt_ro.c | 4 +- scripts/dtc/libfdt/libfdt.h | 214 ++++++++++++++ scripts/dtc/libfdt/libfdt_env.h | 27 -- scripts/dtc/libfdt/libfdt_internal.h | 14 +- scripts/dtc/livetree.c | 311 ++++++++++++++++++--- scripts/dtc/srcpos.c | 22 +- scripts/dtc/treesource.c | 114 ++++++-- scripts/dtc/version_gen.h | 2 +- 15 files changed, 632 insertions(+), 140 deletions(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 1e116425ad70..7b668f7fd400 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -56,7 +56,6 @@ DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd))) override DTC_FLAGS := \ -Wno-avoid_unnecessary_addr_size \ - -Wno-graph_child_address \ -Wno-unique_unit_address \ -Wunique_unit_address_if_enabled diff --git a/scripts/Makefile.dtbs b/scripts/Makefile.dtbs index e092b460d5a1..c4e466390284 100644 --- a/scripts/Makefile.dtbs +++ b/scripts/Makefile.dtbs @@ -105,7 +105,6 @@ ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),) DTC_FLAGS += -Wno-unit_address_vs_reg \ -Wno-avoid_unnecessary_addr_size \ -Wno-alias_paths \ - -Wno-graph_child_address \ -Wno-interrupt_map \ -Wno-simple_bus_reg else diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index 7e3fed5005b3..45d0213f3bf3 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -340,6 +340,14 @@ static void check_node_name_format(struct check *c, struct dt_info *dti, } ERROR(node_name_format, check_node_name_format, NULL, &node_name_chars); +static void check_node_name_not_empty(struct check *c, struct dt_info *dti, + struct node *node) +{ + if (node->basenamelen == 0 && node->parent != NULL) + FAIL(c, dti, node, "Empty node name"); +} +ERROR(node_name_not_empty, check_node_name_not_empty, NULL, &node_name_chars); + static void check_node_name_vs_property_name(struct check *c, struct dt_info *dti, struct node *node) @@ -718,11 +726,14 @@ static void check_alias_paths(struct check *c, struct dt_info *dti, continue; } - if (!prop->val.val || !get_node_by_path(dti->dt, prop->val.val)) { + /* This check does not work for overlays with external paths */ + if (!(dti->dtsflags & DTSF_PLUGIN) && + (!prop->val.val || !get_node_by_path(dti->dt, prop->val.val))) { FAIL_PROP(c, dti, node, prop, "aliases property is not a valid node (%s)", prop->val.val); continue; } + if (strspn(prop->name, LOWERCASE DIGITS "-") != strlen(prop->name)) FAIL(c, dti, node, "aliases property name must include only lowercase and '-'"); } @@ -1894,34 +1905,9 @@ static void check_graph_endpoint(struct check *c, struct dt_info *dti, } WARNING(graph_endpoint, check_graph_endpoint, NULL, &graph_nodes); -static void check_graph_child_address(struct check *c, struct dt_info *dti, - struct node *node) -{ - int cnt = 0; - struct node *child; - - if (node->bus != &graph_ports_bus && node->bus != &graph_port_bus) - return; - - for_each_child(node, child) { - struct property *prop = get_property(child, "reg"); - - /* No error if we have any non-zero unit address */ - if (prop && propval_cell(prop) != 0 ) - return; - - cnt++; - } - - if (cnt == 1 && node->addr_cells != -1) - FAIL(c, dti, node, "graph node has single child node '%s', #address-cells/#size-cells are not necessary", - node->children->name); -} -WARNING(graph_child_address, check_graph_child_address, NULL, &graph_nodes, &graph_port, &graph_endpoint); - static struct check *check_table[] = { &duplicate_node_names, &duplicate_property_names, - &node_name_chars, &node_name_format, &property_name_chars, + &node_name_chars, &node_name_format, &node_name_not_empty, &property_name_chars, &name_is_string, &name_properties, &node_name_vs_property_name, &duplicate_label, @@ -2005,7 +1991,7 @@ static struct check *check_table[] = { &alias_paths, - &graph_nodes, &graph_child_address, &graph_port, &graph_endpoint, + &graph_nodes, &graph_port, &graph_endpoint, &always_fail, }; diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c index b3445b7d6473..6dae60de0ea5 100644 --- a/scripts/dtc/dtc.c +++ b/scripts/dtc/dtc.c @@ -338,9 +338,14 @@ int main(int argc, char *argv[]) if (auto_label_aliases) generate_label_tree(dti, "aliases", false); + generate_labels_from_tree(dti, "__symbols__"); + if (generate_symbols) generate_label_tree(dti, "__symbols__", true); + fixup_phandles(dti, "__fixups__"); + local_fixup_phandles(dti, "__local_fixups__"); + if (generate_fixups) { generate_fixups_tree(dti, "__fixups__"); generate_local_fixups_tree(dti, "__local_fixups__"); diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h index 3a220b9afc99..7231200e5d02 100644 --- a/scripts/dtc/dtc.h +++ b/scripts/dtc/dtc.h @@ -339,9 +339,12 @@ struct dt_info *build_dt_info(unsigned int dtsflags, struct reserve_info *reservelist, struct node *tree, uint32_t boot_cpuid_phys); void sort_tree(struct dt_info *dti); +void generate_labels_from_tree(struct dt_info *dti, const char *name); void generate_label_tree(struct dt_info *dti, const char *name, bool allocph); void generate_fixups_tree(struct dt_info *dti, const char *name); +void fixup_phandles(struct dt_info *dti, const char *name); void generate_local_fixups_tree(struct dt_info *dti, const char *name); +void local_fixup_phandles(struct dt_info *dti, const char *name); /* Checks */ @@ -357,6 +360,9 @@ struct dt_info *dt_from_blob(const char *fname); /* Tree source */ +void property_add_marker(struct property *prop, + enum markertype type, unsigned int offset, char *ref); +void add_phandle_marker(struct dt_info *dti, struct property *prop, unsigned int offset); void dt_to_source(FILE *f, struct dt_info *dti); struct dt_info *dt_from_source(const char *f); diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c index 30e6de2044b2..f3b698c17e89 100644 --- a/scripts/dtc/flattree.c +++ b/scripts/dtc/flattree.c @@ -807,6 +807,7 @@ struct dt_info *dt_from_blob(const char *fname) struct node *tree; uint32_t val; int flags = 0; + unsigned int dtsflags = DTSF_V1; f = srcfile_relative_open(fname, NULL); @@ -919,5 +920,8 @@ struct dt_info *dt_from_blob(const char *fname) fclose(f); - return build_dt_info(DTSF_V1, reservelist, tree, boot_cpuid_phys); + if (get_subnode(tree, "__fixups__") || get_subnode(tree, "__local_fixups__")) + dtsflags |= DTSF_PLUGIN; + + return build_dt_info(dtsflags, reservelist, tree, boot_cpuid_phys); } diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c index e6b9eb643958..51a3859620a4 100644 --- a/scripts/dtc/libfdt/fdt_overlay.c +++ b/scripts/dtc/libfdt/fdt_overlay.c @@ -407,7 +407,8 @@ static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off, const char *fixup_str = value; uint32_t path_len, name_len; uint32_t fixup_len; - char *sep, *endptr; + const char *sep; + char *endptr; int poffset, ret; fixup_end = memchr(value, '\0', len); diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c index b78c4e48f1cb..63494fb7ad90 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -306,8 +306,8 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) const char *nameptr; int err; - if (((err = fdt_ro_probe_(fdt)) < 0) - || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) + if (!can_assume(VALID_DTB) && (((err = fdt_ro_probe_(fdt)) < 0) + || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) goto fail; nameptr = nh->name; diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index 914bf90785ab..81aaf7cbae13 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -116,6 +116,20 @@ extern "C" { /* Low-level functions (you probably don't need these) */ /**********************************************************************/ +/** + * fdt_offset_ptr - safely get a byte range within the device tree blob + * @fdt: Pointer to the device tree blob + * @offset: Offset within the blob to the desired byte range + * @checklen: Required length of the byte range + * + * fdt_offset_ptr() returns a pointer to the byte range of length @checklen at + * the given @offset within the device tree blob, after verifying that the byte + * range fits entirely within the blob and does not overflow. + * + * returns: + * pointer to the byte range, on success + * NULL, if the requested range does not fit within the blob + */ #ifndef SWIG /* This function is not useful in Python */ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen); #endif @@ -124,6 +138,20 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen); } +/** + * fdt_next_tag - get next tag in the device tree + * @fdt: Pointer to the device tree blob + * @offset: Offset within the blob to start searching + * @nextoffset: Pointer to variable to store the offset of the next tag + * + * fdt_next_tag() returns the tag type of the next tag in the device tree + * blob starting from the given @offset. If @nextoffset is non-NULL, it will + * be set to the offset immediately following the tag. + * + * returns: + * the tag type (FDT_BEGIN_NODE, FDT_END_NODE, FDT_PROP, FDT_NOP, FDT_END), + * FDT_END, if offset is out of bounds + */ uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); /* @@ -334,6 +362,23 @@ int fdt_move(const void *fdt, void *buf, int bufsize); /* Read-only functions */ /**********************************************************************/ +/** + * fdt_check_full - check device tree validity + * @fdt: pointer to the device tree blob + * @bufsize: size of the buffer containing the device tree + * + * fdt_check_full() checks that the given buffer contains a valid + * flattened device tree and that the tree structure is internally + * consistent. This is a more thorough check than fdt_check_header(). + * + * returns: + * 0, on success + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_TRUNCATED, standard meanings + */ int fdt_check_full(const void *fdt, size_t bufsize); /** @@ -1540,10 +1585,90 @@ int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags); */ int fdt_create(void *buf, int bufsize); +/** + * fdt_resize - move and resize a device tree in sequential write state + * @fdt: Pointer to the device tree to resize + * @buf: Buffer where resized tree should be placed + * @bufsize: Size of the buffer at @buf + * + * fdt_resize() moves the device tree blob from @fdt to @buf and + * resizes it to fit in the new buffer size. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if @bufsize is too small + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, standard meanings + */ int fdt_resize(void *fdt, void *buf, int bufsize); + +/** + * fdt_add_reservemap_entry - add an entry to the memory reserve map + * @fdt: Pointer to the device tree blob + * @addr: Start address of the reserve map entry + * @size: Size of the reserved region + * + * fdt_add_reservemap_entry() adds a memory reserve map entry to the + * device tree blob during the sequential write process. This function + * can only be called after fdt_create() and before fdt_finish_reservemap(). + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if there is insufficient space in the blob + * -FDT_ERR_BADSTATE, if not in the correct sequential write state + */ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size); + +/** + * fdt_finish_reservemap - complete the memory reserve map + * @fdt: Pointer to the device tree blob + * + * fdt_finish_reservemap() completes the memory reserve map section + * of the device tree blob during sequential write. After calling this + * function, no more reserve map entries can be added and the blob + * moves to the structure creation phase. + * + * returns: + * 0, on success + * -FDT_ERR_BADSTATE, if not in the correct sequential write state + */ int fdt_finish_reservemap(void *fdt); + +/** + * fdt_begin_node - start creation of a new node + * @fdt: Pointer to the device tree blob + * @name: Name of the node to create + * + * fdt_begin_node() starts the creation of a new node with the given + * @name during sequential write. After calling this function, properties + * can be added with fdt_property() and subnodes can be created with + * additional fdt_begin_node() calls. The node must be completed with + * fdt_end_node(). + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if there is insufficient space in the blob + * -FDT_ERR_BADSTATE, if not in the correct sequential write state + */ int fdt_begin_node(void *fdt, const char *name); + +/** + * fdt_property - add a property to the current node + * @fdt: Pointer to the device tree blob + * @name: Name of the property to add + * @val: Pointer to the property value + * @len: Length of the property value in bytes + * + * fdt_property() adds a property with the given @name and value to + * the current node during sequential write. This function can only + * be called between fdt_begin_node() and fdt_end_node(). + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if there is insufficient space in the blob + * -FDT_ERR_BADSTATE, if not currently within a node + */ int fdt_property(void *fdt, const char *name, const void *val, int len); static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val) { @@ -1580,15 +1705,94 @@ int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp); #define fdt_property_string(fdt, name, str) \ fdt_property(fdt, name, str, strlen(str)+1) + +/** + * fdt_end_node - complete the current node + * @fdt: Pointer to the device tree blob + * + * fdt_end_node() completes the current node during sequential write. This + * function must be called to close each node started with + * fdt_begin_node(). After calling this function, no more properties or subnodes + * can be added to the node. + * + * returns: + * 0, on success + * -FDT_ERR_BADSTATE, if not currently within a node + */ int fdt_end_node(void *fdt); + +/** + * fdt_finish - complete device tree creation + * @fdt: Pointer to the device tree blob + * + * fdt_finish() completes the device tree creation process started with + * fdt_create(). This function finalizes the device tree blob and makes it ready + * for use. After calling this function, the blob is complete and can be used + * with libfdt read-only and read-write functions, but not with sequential write + * functions. + * + * returns: + * 0, on success + * -FDT_ERR_BADSTATE, if the sequential write process is incomplete + */ int fdt_finish(void *fdt); /**********************************************************************/ /* Read-write functions */ /**********************************************************************/ +/** + * fdt_create_empty_tree - create an empty device tree + * @buf: Buffer where the empty tree should be created + * @bufsize: Size of the buffer at @buf + * + * fdt_create_empty_tree() creates a minimal empty device tree blob + * in the given buffer. The tree contains only a root node with no + * properties or subnodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if @bufsize is too small for even an empty tree + */ int fdt_create_empty_tree(void *buf, int bufsize); + +/** + * fdt_open_into - move a device tree into a new buffer and make editable + * @fdt: Pointer to the device tree to move + * @buf: Buffer where the editable tree should be placed + * @bufsize: Size of the buffer at @buf + * + * fdt_open_into() moves and reorganizes the device tree blob from @fdt + * into @buf, converting it to a format suitable for read-write operations. + * The new buffer should allow space for modifications. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, if @bufsize is too small + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_TRUNCATED, standard meanings + */ int fdt_open_into(const void *fdt, void *buf, int bufsize); + +/** + * fdt_pack - pack a device tree blob + * @fdt: Pointer to the device tree blob + * + * fdt_pack() reorganizes the device tree blob to eliminate any free space + * and pack it into the minimum possible size. This is useful after making + * modifications that might have left gaps in the blob. + * + * returns: + * 0, on success + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, standard meanings + */ int fdt_pack(void *fdt); /** @@ -2317,6 +2521,16 @@ int fdt_overlay_target_offset(const void *fdt, const void *fdto, /* Debugging / informational functions */ /**********************************************************************/ +/** + * fdt_strerror - return string description of error code + * @errval: Error code returned by a libfdt function + * + * fdt_strerror() returns a string description of the error code passed + * in @errval. + * + * returns: + * pointer to a string describing the error code + */ const char *fdt_strerror(int errval); #ifdef __cplusplus diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h index 73b6d40450ac..5580b483e6a9 100644 --- a/scripts/dtc/libfdt/libfdt_env.h +++ b/scripts/dtc/libfdt/libfdt_env.h @@ -66,31 +66,4 @@ static inline fdt64_t cpu_to_fdt64(uint64_t x) #undef CPU_TO_FDT16 #undef EXTRACT_BYTE -#ifdef __APPLE__ -#include - -/* strnlen() is not available on Mac OS < 10.7 */ -# if !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < \ - MAC_OS_X_VERSION_10_7) - -#define strnlen fdt_strnlen - -/* - * fdt_strnlen: returns the length of a string or max_count - which ever is - * smallest. - * Input 1 string: the string whose size is to be determined - * Input 2 max_count: the maximum value returned by this function - * Output: length of the string or max_count (the smallest of the two) - */ -static inline size_t fdt_strnlen(const char *string, size_t max_count) -{ - const char *p = memchr(string, 0, max_count); - return p ? p - string : max_count; -} - -#endif /* !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < - MAC_OS_X_VERSION_10_7) */ - -#endif /* __APPLE__ */ - #endif /* LIBFDT_ENV_H */ diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h index b60b5456f596..0e103cafa714 100644 --- a/scripts/dtc/libfdt/libfdt_internal.h +++ b/scripts/dtc/libfdt/libfdt_internal.h @@ -11,11 +11,13 @@ #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) int32_t fdt_ro_probe_(const void *fdt); -#define FDT_RO_PROBE(fdt) \ - { \ - int32_t totalsize_; \ - if ((totalsize_ = fdt_ro_probe_(fdt)) < 0) \ - return totalsize_; \ +#define FDT_RO_PROBE(fdt) \ + { \ + if (!can_assume(VALID_DTB)) { \ + int32_t totalsize_; \ + if ((totalsize_ = fdt_ro_probe_(fdt)) < 0) \ + return totalsize_; \ + } \ } int fdt_check_node_offset_(const void *fdt, int offset); @@ -92,7 +94,7 @@ static inline uint64_t fdt64_ld_(const fdt64_t *p) * signature or hash check before using libfdt. * * For situations where security is not a concern it may be safe to enable - * ASSUME_SANE. + * ASSUME_PERFECT. */ enum { /* diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c index d51d05830b18..5d72abceb526 100644 --- a/scripts/dtc/livetree.c +++ b/scripts/dtc/livetree.c @@ -340,20 +340,73 @@ void append_to_property(struct node *node, char *name, const void *data, int len, enum markertype type) { - struct data d; + struct property *p; + + p = get_property(node, name); + if (!p) { + p = build_property(name, empty_data, NULL); + add_property(node, p); + } + + p->val = data_add_marker(p->val, type, name); + p->val = data_append_data(p->val, data, len); +} + +static int append_unique_str_to_property(struct node *node, + char *name, const char *data, int len) +{ struct property *p; p = get_property(node, name); if (p) { - d = data_add_marker(p->val, type, name); - d = data_append_data(d, data, len); - p->val = d; + const char *s; + + if (p->val.len && p->val.val[p->val.len - 1] != '\0') + /* The current content doesn't look like a string */ + return -1; + + for (s = p->val.val; s < p->val.val + p->val.len; s = strchr(s, '\0') + 1) { + if (strcmp(data, s) == 0) + /* data already contained in node.name */ + return 0; + } } else { - d = data_add_marker(empty_data, type, name); - d = data_append_data(d, data, len); - p = build_property(name, d, NULL); + p = build_property(name, empty_data, NULL); add_property(node, p); } + + p->val = data_add_marker(p->val, TYPE_STRING, name); + p->val = data_append_data(p->val, data, len); + + return 0; +} + +static int append_unique_u32_to_property(struct node *node, char *name, fdt32_t value) +{ + struct property *p; + + p = get_property(node, name); + if (p) { + const fdt32_t *v, *val_end = (const fdt32_t *)p->val.val + p->val.len / 4; + + if (p->val.len % 4 != 0) + /* The current content doesn't look like a u32 array */ + return -1; + + for (v = (const void *)p->val.val; v < val_end; v++) { + if (*v == value) + /* value already contained */ + return 0; + } + } else { + p = build_property(name, empty_data, NULL); + add_property(node, p); + } + + p->val = data_add_marker(p->val, TYPE_UINT32, name); + p->val = data_append_data(p->val, &value, 4); + + return 0; } struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size) @@ -918,11 +971,12 @@ static bool any_fixup_tree(struct dt_info *dti, struct node *node) return false; } -static void add_fixup_entry(struct dt_info *dti, struct node *fn, - struct node *node, struct property *prop, - struct marker *m) +static int add_fixup_entry(struct dt_info *dti, struct node *fn, + struct node *node, struct property *prop, + struct marker *m) { char *entry; + int ret; /* m->ref can only be a REF_PHANDLE, but check anyway */ assert(m->type == REF_PHANDLE); @@ -939,32 +993,39 @@ static void add_fixup_entry(struct dt_info *dti, struct node *fn, xasprintf(&entry, "%s:%s:%u", node->fullpath, prop->name, m->offset); - append_to_property(fn, m->ref, entry, strlen(entry) + 1, TYPE_STRING); + ret = append_unique_str_to_property(fn, m->ref, entry, strlen(entry) + 1); free(entry); + + return ret; } -static void generate_fixups_tree_internal(struct dt_info *dti, - struct node *fn, - struct node *node) +static int generate_fixups_tree_internal(struct dt_info *dti, + struct node *fn, + struct node *node) { struct node *dt = dti->dt; struct node *c; struct property *prop; struct marker *m; struct node *refnode; + int ret = 0; for_each_property(node, prop) { m = prop->val.markers; for_each_marker_of_type(m, REF_PHANDLE) { refnode = get_node_by_ref(dt, m->ref); if (!refnode) - add_fixup_entry(dti, fn, node, prop, m); + if (add_fixup_entry(dti, fn, node, prop, m)) + ret = -1; } } for_each_child(node, c) - generate_fixups_tree_internal(dti, fn, c); + if (generate_fixups_tree_internal(dti, fn, c)) + ret = -1; + + return ret; } static bool any_local_fixup_tree(struct dt_info *dti, struct node *node) @@ -989,7 +1050,7 @@ static bool any_local_fixup_tree(struct dt_info *dti, struct node *node) return false; } -static void add_local_fixup_entry(struct dt_info *dti, +static int add_local_fixup_entry(struct dt_info *dti, struct node *lfn, struct node *node, struct property *prop, struct marker *m, struct node *refnode) @@ -1020,30 +1081,56 @@ static void add_local_fixup_entry(struct dt_info *dti, free(compp); value_32 = cpu_to_fdt32(m->offset); - append_to_property(wn, prop->name, &value_32, sizeof(value_32), TYPE_UINT32); + return append_unique_u32_to_property(wn, prop->name, value_32); } -static void generate_local_fixups_tree_internal(struct dt_info *dti, - struct node *lfn, - struct node *node) +static int generate_local_fixups_tree_internal(struct dt_info *dti, + struct node *lfn, + struct node *node) { struct node *dt = dti->dt; struct node *c; struct property *prop; struct marker *m; struct node *refnode; + int ret = 0; for_each_property(node, prop) { m = prop->val.markers; for_each_marker_of_type(m, REF_PHANDLE) { refnode = get_node_by_ref(dt, m->ref); if (refnode) - add_local_fixup_entry(dti, lfn, node, prop, m, refnode); + if (add_local_fixup_entry(dti, lfn, node, prop, m, refnode)) + ret = -1; } } for_each_child(node, c) - generate_local_fixups_tree_internal(dti, lfn, c); + if (generate_local_fixups_tree_internal(dti, lfn, c)) + ret = -1; + + return ret; +} + +void generate_labels_from_tree(struct dt_info *dti, const char *name) +{ + struct node *an; + struct property *p; + + an = get_subnode(dti->dt, name); + if (!an) + return; + + for_each_property(an, p) { + struct node *labeled_node; + + labeled_node = get_node_by_path(dti->dt, p->val.val); + if (labeled_node) + add_label(&labeled_node->labels, p->name); + else if (quiet < 1) + fprintf(stderr, "Warning: Path %s referenced in property %s/%s missing", + p->val.val, name, p->name); + } } void generate_label_tree(struct dt_info *dti, const char *name, bool allocph) @@ -1056,29 +1143,173 @@ void generate_label_tree(struct dt_info *dti, const char *name, bool allocph) void generate_fixups_tree(struct dt_info *dti, const char *name) { - struct node *n = get_subnode(dti->dt, name); - - /* Start with an empty __fixups__ node to not get duplicates */ - if (n) - n->deleted = true; - if (!any_fixup_tree(dti, dti->dt)) return; - generate_fixups_tree_internal(dti, - build_and_name_child_node(dti->dt, name), - dti->dt); + if (generate_fixups_tree_internal(dti, build_root_node(dti->dt, name), dti->dt)) + fprintf(stderr, + "Warning: Preexisting data in %s malformed, some content could not be added.\n", + name); +} + +void fixup_phandles(struct dt_info *dti, const char *name) +{ + struct node *an; + struct property *fp; + + an = get_subnode(dti->dt, name); + if (!an) + return; + + for_each_property(an, fp) { + char *fnext = fp->val.val; + char *fv; + unsigned int fl; + + while ((fl = fp->val.len - (fnext - fp->val.val))) { + char *propname, *soffset; + struct node *n; + struct property *p; + long offset; + + fv = fnext; + fnext = memchr(fv, 0, fl); + + if (!fnext) { + if (quiet < 1) + fprintf(stderr, "Warning: Malformed fixup entry for label %s\n", + fp->name); + break; + } + fnext += 1; + + propname = memchr(fv, ':', fnext - 1 - fv); + if (!propname) { + if (quiet < 1) + fprintf(stderr, "Warning: Malformed fixup entry for label %s\n", + fp->name); + continue; + } + propname++; + + soffset = memchr(propname, ':', fnext - 1 - propname); + if (!soffset) { + if (quiet < 1) + fprintf(stderr, "Warning: Malformed fixup entry for label %s\n", + fp->name); + continue; + } + soffset++; + + /* + * temporarily modify the property to not have to create + * a copy for the node path. + */ + *(propname - 1) = '\0'; + + n = get_node_by_path(dti->dt, fv); + if (!n && quiet < 1) + fprintf(stderr, "Warning: Label %s references non-existing node %s\n", + fp->name, fv); + + *(propname - 1) = ':'; + + if (!n) + continue; + + /* + * temporarily modify the property to not have to create + * a copy for the property name. + */ + *(soffset - 1) = '\0'; + + p = get_property(n, propname); + + if (!p && quiet < 1) + fprintf(stderr, "Warning: Label %s references non-existing property %s in node %s\n", + fp->name, n->fullpath, propname); + + *(soffset - 1) = ':'; + + if (!p) + continue; + + offset = strtol(soffset, NULL, 0); + if (offset < 0 || offset + 4 > p->val.len) { + if (quiet < 1) + fprintf(stderr, + "Warning: Label %s contains invalid offset for property %s in node %s\n", + fp->name, p->name, n->fullpath); + continue; + } + + property_add_marker(p, REF_PHANDLE, offset, fp->name); + } + } } void generate_local_fixups_tree(struct dt_info *dti, const char *name) { - struct node *n = get_subnode(dti->dt, name); - - /* Start with an empty __local_fixups__ node to not get duplicates */ - if (n) - n->deleted = true; if (!any_local_fixup_tree(dti, dti->dt)) return; - generate_local_fixups_tree_internal(dti, - build_and_name_child_node(dti->dt, name), - dti->dt); + if (generate_local_fixups_tree_internal(dti, build_root_node(dti->dt, name), dti->dt)) + fprintf(stderr, + "Warning: Preexisting data in %s malformed, some content could not be added.\n", + name); +} + +static void local_fixup_phandles_node(struct dt_info *dti, struct node *lf, struct node *n) +{ + struct property *lfp; + struct node *lfsubnode; + + for_each_property(lf, lfp) { + struct property *p = get_property(n, lfp->name); + fdt32_t *offsets = (fdt32_t *)lfp->val.val; + size_t i; + + if (!p) { + if (quiet < 1) + fprintf(stderr, "Warning: Property %s in %s referenced in __local_fixups__ missing\n", + lfp->name, n->fullpath); + continue; + } + + /* + * Each property in the __local_fixups__ tree is a concatenation + * of offsets, so it must be a multiple of sizeof(fdt32_t). + */ + if (lfp->val.len % sizeof(fdt32_t)) { + if (quiet < 1) + fprintf(stderr, "Warning: property %s in /__local_fixups__%s malformed\n", + lfp->name, n->fullpath); + continue; + } + + for (i = 0; i < lfp->val.len / sizeof(fdt32_t); i++) + add_phandle_marker(dti, p, dtb_ld32(offsets + i)); + } + + for_each_child(lf, lfsubnode) { + struct node *subnode = get_subnode(n, lfsubnode->name); + + if (!subnode) { + if (quiet < 1) + fprintf(stderr, "Warning: node %s/%s referenced in __local_fixups__ missing\n", + lfsubnode->name, n->fullpath); + continue; + } + + local_fixup_phandles_node(dti, lfsubnode, subnode); + } +} + +void local_fixup_phandles(struct dt_info *dti, const char *name) +{ + struct node *an; + + an = get_subnode(dti->dt, name); + if (!an) + return; + + local_fixup_phandles_node(dti, an, dti->dt); } diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c index 5bb57bf6856c..fef892fb6fdd 100644 --- a/scripts/dtc/srcpos.c +++ b/scripts/dtc/srcpos.c @@ -88,6 +88,26 @@ static char *shorten_to_initial_path(char *fname) return NULL; } +/** + * Returns true if the given path is an absolute one. + * + * On Windows, it either needs to begin with a forward slash or with a drive + * letter (e.g. "C:"). + * On all other operating systems, it must begin with a forward slash to be + * considered an absolute path. + */ +static bool is_absolute_path(const char *path) +{ +#ifdef WIN32 + return ( + path[0] == '/' || + (((path[0] >= 'A' && path[0] <= 'Z') || (path[0] >= 'a' && path[0] <= 'z')) && path[1] == ':') + ); +#else + return (path[0] == '/'); +#endif +} + /** * Try to open a file in a given directory. * @@ -103,7 +123,7 @@ static char *try_open(const char *dirname, const char *fname, FILE **fp) { char *fullname; - if (!dirname || fname[0] == '/') + if (!dirname || is_absolute_path(fname)) fullname = xstrdup(fname); else fullname = join_path(dirname, fname); diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c index d25f01fc6937..bf648bf6c21a 100644 --- a/scripts/dtc/treesource.c +++ b/scripts/dtc/treesource.c @@ -173,23 +173,59 @@ static struct marker **add_marker(struct marker **mi, return &nm->next; } -static void add_string_markers(struct property *prop) +void property_add_marker(struct property *prop, + enum markertype type, unsigned int offset, char *ref) { - int l, len = prop->val.len; - const char *p = prop->val.val; + add_marker(&prop->val.markers, type, offset, ref); +} + +static void add_string_markers(struct property *prop, unsigned int offset, int len) +{ + int l; + const char *p = prop->val.val + offset; struct marker **mi = &prop->val.markers; for (l = strlen(p) + 1; l < len; l += strlen(p + l) + 1) - mi = add_marker(mi, TYPE_STRING, l, NULL); + mi = add_marker(mi, TYPE_STRING, offset + l, NULL); } -static enum markertype guess_value_type(struct property *prop) +void add_phandle_marker(struct dt_info *dti, struct property *prop, unsigned int offset) { - int len = prop->val.len; - const char *p = prop->val.val; - struct marker *m = prop->val.markers; + cell_t phandle; + struct node *refn; + char *ref; + + if (prop->val.len < offset + 4) { + if (quiet < 1) + fprintf(stderr, + "Warning: property %s too short to contain a phandle at offset %u\n", + prop->name, offset); + return; + } + + phandle = dtb_ld32(prop->val.val + offset); + refn = get_node_by_phandle(dti->dt, phandle); + + if (!refn) { + if (quiet < 1) + fprintf(stderr, + "Warning: node referenced by phandle 0x%x in property %s not found\n", + phandle, prop->name); + return; + } + + if (refn->labels) + ref = refn->labels->label; + else + ref = refn->fullpath; + + add_marker(&prop->val.markers, REF_PHANDLE, offset, ref); +} + +static enum markertype guess_value_type(struct property *prop, unsigned int offset, int len) +{ + const char *p = prop->val.val + offset; int nnotstring = 0, nnul = 0; - int nnotstringlbl = 0, nnotcelllbl = 0; int i; for (i = 0; i < len; i++) { @@ -199,30 +235,49 @@ static enum markertype guess_value_type(struct property *prop) nnul++; } - for_each_marker_of_type(m, LABEL) { - if ((m->offset > 0) && (prop->val.val[m->offset - 1] != '\0')) - nnotstringlbl++; - if ((m->offset % sizeof(cell_t)) != 0) - nnotcelllbl++; - } - - if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul <= (len-nnul)) - && (nnotstringlbl == 0)) { + if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul <= len - nnul)) { if (nnul > 1) - add_string_markers(prop); + add_string_markers(prop, offset, len); return TYPE_STRING; - } else if (((len % sizeof(cell_t)) == 0) && (nnotcelllbl == 0)) { + } else if ((len % sizeof(cell_t)) == 0) { return TYPE_UINT32; } return TYPE_UINT8; } +static void guess_type_markers(struct property *prop) +{ + struct marker **m = &prop->val.markers; + unsigned int offset = 0; + + for (m = &prop->val.markers; *m; m = &((*m)->next)) { + if (is_type_marker((*m)->type)) + /* assume the whole property is already marked */ + return; + + if ((*m)->offset > offset) { + m = add_marker(m, guess_value_type(prop, offset, (*m)->offset - offset), + offset, NULL); + + offset = (*m)->offset; + } + + if ((*m)->type == REF_PHANDLE) { + m = add_marker(m, TYPE_UINT32, offset, NULL); + offset += 4; + } + } + + if (offset < prop->val.len) + add_marker(m, guess_value_type(prop, offset, prop->val.len - offset), + offset, NULL); +} + static void write_propval(FILE *f, struct property *prop) { size_t len = prop->val.len; - struct marker *m = prop->val.markers; - struct marker dummy_marker; + struct marker *m; enum markertype emit_type = TYPE_NONE; char *srcstr; @@ -241,14 +296,8 @@ static void write_propval(FILE *f, struct property *prop) fprintf(f, " ="); - if (!next_type_marker(m)) { - /* data type information missing, need to guess */ - dummy_marker.type = guess_value_type(prop); - dummy_marker.next = prop->val.markers; - dummy_marker.offset = 0; - dummy_marker.ref = NULL; - m = &dummy_marker; - } + guess_type_markers(prop); + m = prop->val.markers; for_each_marker(m) { size_t chunk_len = (m->next ? m->next->offset : len) - m->offset; @@ -369,7 +418,10 @@ void dt_to_source(FILE *f, struct dt_info *dti) { struct reserve_info *re; - fprintf(f, "/dts-v1/;\n\n"); + fprintf(f, "/dts-v1/;\n"); + if (dti->dtsflags & DTSF_PLUGIN) + fprintf(f, "/plugin/;\n"); + fprintf(f, "\n"); for (re = dti->reservelist; re; re = re->next) { struct label *l; diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index 226c48bf75dc..5730bf457b33 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.7.2-g52f07dcc" +#define DTC_VERSION "DTC 1.7.2-ga26ef640" From c75afcb4a8e708747534d8b88a1bcd912cdf9223 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 26 Jan 2026 10:47:22 -0600 Subject: [PATCH 45/60] dt-bindings: Fix emails with spaces or missing brackets Fix email addresses with spaces or missing brackets. A pending dtschema meta-schema change will check for these. Acked-by: Manivannan Sadhasivam Acked-by: Dmitry Torokhov Acked-by: Guenter Roeck Link: https://patch.msgid.link/20260126164724.2832009-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml | 2 +- Documentation/devicetree/bindings/input/syna,rmi4.yaml | 2 +- .../devicetree/bindings/media/samsung,exynos5250-gsc.yaml | 2 +- Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml index 3d14d5fc96c5..7b38f2182ffa 100644 --- a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml +++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Sensirion SHTC1 Humidity and Temperature Sensor IC maintainers: - - Christopher Ruehl chris.ruehl@gtsys.com.hk + - Christopher Ruehl description: | The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors diff --git a/Documentation/devicetree/bindings/input/syna,rmi4.yaml b/Documentation/devicetree/bindings/input/syna,rmi4.yaml index f369385ffaf0..8685ef4481f4 100644 --- a/Documentation/devicetree/bindings/input/syna,rmi4.yaml +++ b/Documentation/devicetree/bindings/input/syna,rmi4.yaml @@ -8,7 +8,7 @@ title: Synaptics RMI4 compliant devices maintainers: - Jason A. Donenfeld - - Matthias Schiffer - Vincent Huang description: | diff --git a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml index 878397830a4d..9196cf5dac0f 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml @@ -9,7 +9,7 @@ title: Samsung Exynos SoC G-Scaler maintainers: - Inki Dae - Krzysztof Kozlowski - - Seung-Woo Kim description: G-Scaler is used for scaling and color space conversion on Samsung Exynos diff --git a/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml b/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml index d286b77921e0..8f5d33050348 100644 --- a/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mobiveil AXI PCIe Host Bridge maintainers: - - Frank Li + - Frank Li description: Mobiveil's GPEX 4.0 is a PCIe Gen4 host bridge IP. This configurable IP From 620097c6c070fb01259b5fcab915065ce746e5a1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:45 +0100 Subject: [PATCH 46/60] of: Add for_each_compatible_node_scoped() helper Just like looping through children and available children, add a scoped helper for for_each_compatible_node() so error paths can drop of_node_put() leading to simpler code. Suggested-by: Jonathan Cameron Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-1-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .clang-format | 1 + include/linux/of.h | 7 +++++++ scripts/dtc/dt-extract-compatibles | 1 + 3 files changed, 9 insertions(+) diff --git a/.clang-format b/.clang-format index 2ceca764122f..1f2429c47433 100644 --- a/.clang-format +++ b/.clang-format @@ -259,6 +259,7 @@ ForEachMacros: - 'for_each_collection' - 'for_each_comp_order' - 'for_each_compatible_node' + - 'for_each_compatible_node_scoped' - 'for_each_component_dais' - 'for_each_component_dais_safe' - 'for_each_conduit' diff --git a/include/linux/of.h b/include/linux/of.h index 9bbdcf25a2b4..be6ec4916adf 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1485,6 +1485,13 @@ static inline int of_property_read_s32(const struct device_node *np, #define for_each_compatible_node(dn, type, compatible) \ for (dn = of_find_compatible_node(NULL, type, compatible); dn; \ dn = of_find_compatible_node(dn, type, compatible)) + +#define for_each_compatible_node_scoped(dn, type, compatible) \ + for (struct device_node *dn __free(device_node) = \ + of_find_compatible_node(NULL, type, compatible); \ + dn; \ + dn = of_find_compatible_node(dn, type, compatible)) + #define for_each_matching_node(dn, matches) \ for (dn = of_find_matching_node(NULL, matches); dn; \ dn = of_find_matching_node(dn, matches)) diff --git a/scripts/dtc/dt-extract-compatibles b/scripts/dtc/dt-extract-compatibles index 6570efabaa64..87999d707390 100755 --- a/scripts/dtc/dt-extract-compatibles +++ b/scripts/dtc/dt-extract-compatibles @@ -72,6 +72,7 @@ def parse_compatibles(file, compat_ignore_list): compat_list += parse_of_functions(data, "_is_compatible") compat_list += parse_of_functions(data, "of_find_compatible_node") compat_list += parse_of_functions(data, "for_each_compatible_node") + compat_list += parse_of_functions(data, "for_each_compatible_node_scoped") compat_list += parse_of_functions(data, "of_get_compatible_child") return compat_list From 9d4ba117ecb3cb6fa907cc8273c73c5c03f19cb6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:46 +0100 Subject: [PATCH 47/60] ARM: at91: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Acked-by: Nicolas Ferre Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Reviewed-by: Claudiu Beznea Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-2-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- arch/arm/mach-at91/pm.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 35058b99069c..68bb4a86cd94 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -982,15 +982,12 @@ static void __init at91_pm_sram_init(void) struct gen_pool *sram_pool; phys_addr_t sram_pbase; unsigned long sram_base; - struct device_node *node; struct platform_device *pdev = NULL; - for_each_compatible_node(node, NULL, "mmio-sram") { + for_each_compatible_node_scoped(node, NULL, "mmio-sram") { pdev = of_find_device_by_node(node); - if (pdev) { - of_node_put(node); + if (pdev) break; - } } if (!pdev) { From 1adce508e946075bd62883f2003013bae2082a51 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:47 +0100 Subject: [PATCH 48/60] ARM: exynos: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-3-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- arch/arm/mach-exynos/exynos.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 2e8099479ffa..18695076c34e 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -47,9 +47,7 @@ unsigned int exynos_rev(void) void __init exynos_sysram_init(void) { - struct device_node *node; - - for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { + for_each_compatible_node_scoped(node, NULL, "samsung,exynos4210-sysram") { struct resource res; if (!of_device_is_available(node)) continue; @@ -57,15 +55,13 @@ void __init exynos_sysram_init(void) of_address_to_resource(node, 0, &res); sysram_base_addr = ioremap(res.start, resource_size(&res)); sysram_base_phys = res.start; - of_node_put(node); break; } - for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { + for_each_compatible_node_scoped(node, NULL, "samsung,exynos4210-sysram-ns") { if (!of_device_is_available(node)) continue; sysram_ns_base_addr = of_iomap(node, 0); - of_node_put(node); break; } } From e0af14088e25564e9a37ca40964e555546f22295 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:48 +0100 Subject: [PATCH 49/60] powerpc/fsp2: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Reviewed-by: Christophe Leroy (CS GROUP) Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-4-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- arch/powerpc/platforms/44x/fsp2.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/powerpc/platforms/44x/fsp2.c b/arch/powerpc/platforms/44x/fsp2.c index f6b8d02e08b0..b06d9220844c 100644 --- a/arch/powerpc/platforms/44x/fsp2.c +++ b/arch/powerpc/platforms/44x/fsp2.c @@ -199,16 +199,14 @@ static irqreturn_t rst_wrn_handler(int irq, void *data) { static void __init node_irq_request(const char *compat, irq_handler_t errirq_handler) { - struct device_node *np; unsigned int irq; int32_t rc; - for_each_compatible_node(np, NULL, compat) { + for_each_compatible_node_scoped(np, NULL, compat) { irq = irq_of_parse_and_map(np, 0); if (!irq) { pr_err("device tree node %pOFn is missing a interrupt", np); - of_node_put(np); return; } @@ -216,7 +214,6 @@ static void __init node_irq_request(const char *compat, irq_handler_t errirq_han if (rc) { pr_err("fsp_of_probe: request_irq failed: np=%pOF rc=%d", np, rc); - of_node_put(np); return; } } From 9572933b5692470340dcf7df9a1bff07b41525fa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:49 +0100 Subject: [PATCH 50/60] powerpc/wii: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Reviewed-by: Christophe Leroy (CS GROUP) Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-5-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c index b57e87b0b3ce..1522a8bece29 100644 --- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c @@ -201,11 +201,10 @@ unsigned int hlwd_pic_get_irq(void) void __init hlwd_pic_probe(void) { struct irq_domain *host; - struct device_node *np; const u32 *interrupts; int cascade_virq; - for_each_compatible_node(np, NULL, "nintendo,hollywood-pic") { + for_each_compatible_node_scoped(np, NULL, "nintendo,hollywood-pic") { interrupts = of_get_property(np, "interrupts", NULL); if (interrupts) { host = hlwd_pic_init(np); @@ -215,7 +214,6 @@ void __init hlwd_pic_probe(void) irq_set_chained_handler(cascade_virq, hlwd_pic_irq_cascade); hlwd_irq_host = host; - of_node_put(np); break; } } From 2ff81fe310167349ea17c8b2b1d8fb2bc2d755ae Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:50 +0100 Subject: [PATCH 51/60] cdx: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Jonathan Cameron Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-6-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/cdx/cdx.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/cdx/cdx.c b/drivers/cdx/cdx.c index b39af2f1937f..bbde529aaa93 100644 --- a/drivers/cdx/cdx.c +++ b/drivers/cdx/cdx.c @@ -608,7 +608,6 @@ static ssize_t rescan_store(const struct bus_type *bus, { struct cdx_controller *cdx; struct platform_device *pd; - struct device_node *np; bool val; if (kstrtobool(buf, &val) < 0) @@ -623,10 +622,9 @@ static ssize_t rescan_store(const struct bus_type *bus, cdx_unregister_devices(&cdx_bus_type); /* Rescan all the devices */ - for_each_compatible_node(np, NULL, compat_node_name) { + for_each_compatible_node_scoped(np, NULL, compat_node_name) { pd = of_find_device_by_node(np); if (!pd) { - of_node_put(np); count = -EINVAL; goto unlock; } From 3bf312f30bdafd8ac40c995a34bbbf35681d6a4b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:51 +0100 Subject: [PATCH 52/60] cdx: Use mutex guard to simplify error handling Mutex guard allows to drop one goto/break in error handling and the less expected code of assigning -EINVAL to unsigned size_t count variable. Suggested-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Reviewed-by: Jonathan Cameron Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-7-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/cdx/cdx.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/cdx/cdx.c b/drivers/cdx/cdx.c index bbde529aaa93..588dd12e8105 100644 --- a/drivers/cdx/cdx.c +++ b/drivers/cdx/cdx.c @@ -616,7 +616,7 @@ static ssize_t rescan_store(const struct bus_type *bus, if (!val) return -EINVAL; - mutex_lock(&cdx_controller_lock); + guard(mutex)(&cdx_controller_lock); /* Unregister all the devices on the bus */ cdx_unregister_devices(&cdx_bus_type); @@ -624,10 +624,8 @@ static ssize_t rescan_store(const struct bus_type *bus, /* Rescan all the devices */ for_each_compatible_node_scoped(np, NULL, compat_node_name) { pd = of_find_device_by_node(np); - if (!pd) { - count = -EINVAL; - goto unlock; - } + if (!pd) + return -EINVAL; cdx = platform_get_drvdata(pd); if (cdx && cdx->controller_registered && cdx->ops->scan) @@ -636,9 +634,6 @@ static ssize_t rescan_store(const struct bus_type *bus, put_device(&pd->dev); } -unlock: - mutex_unlock(&cdx_controller_lock); - return count; } static BUS_ATTR_WO(rescan); From f82fa1d592021642b89977f77b4c3fc6eb9404ce Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:52 +0100 Subject: [PATCH 53/60] clk: imx: imx27: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Peng Fan Reviewed-by: Jonathan Cameron Acked-by: Abel Vesa Reviewed-by: Frank Li Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-8-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/clk/imx/clk-imx27.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c index 99618ded0939..f2f0d3fe5c52 100644 --- a/drivers/clk/imx/clk-imx27.c +++ b/drivers/clk/imx/clk-imx27.c @@ -171,17 +171,14 @@ static void __init _mx27_clocks_init(unsigned long fref) static void __init mx27_clocks_init_dt(struct device_node *np) { - struct device_node *refnp; u32 fref = 26000000; /* default */ - for_each_compatible_node(refnp, NULL, "fixed-clock") { + for_each_compatible_node_scoped(refnp, NULL, "fixed-clock") { if (!of_device_is_compatible(refnp, "fsl,imx-osc26m")) continue; - if (!of_property_read_u32(refnp, "clock-frequency", &fref)) { - of_node_put(refnp); + if (!of_property_read_u32(refnp, "clock-frequency", &fref)) break; - } } ccm = of_iomap(np, 0); From 122b6c28c0d604b5939402a8ccbd0627fcc74136 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:53 +0100 Subject: [PATCH 54/60] clk: imx: imx31: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Peng Fan Reviewed-by: Jonathan Cameron Acked-by: Abel Vesa Reviewed-by: Frank Li Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-9-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/clk/imx/clk-imx31.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index 4c8d9ff0b2ad..962eccac63ce 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -123,18 +123,15 @@ static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref) static void __init mx31_clocks_init_dt(struct device_node *np) { - struct device_node *osc_np; u32 fref = 26000000; /* default */ void __iomem *ccm; - for_each_compatible_node(osc_np, NULL, "fixed-clock") { + for_each_compatible_node_scoped(osc_np, NULL, "fixed-clock") { if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m")) continue; - if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) { - of_node_put(osc_np); + if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) break; - } } ccm = of_iomap(np, 0); From 69c8cbb4bac450b262e148e4687d507a256871b8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:54 +0100 Subject: [PATCH 55/60] dmaengine: fsl_raid: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Jonathan Cameron Acked-by: Vinod Koul Reviewed-by: Frank Li Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-10-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/dma/fsl_raid.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/dma/fsl_raid.c b/drivers/dma/fsl_raid.c index 6aa97e258a55..6e6d7e0e475e 100644 --- a/drivers/dma/fsl_raid.c +++ b/drivers/dma/fsl_raid.c @@ -746,7 +746,6 @@ err_free: static int fsl_re_probe(struct platform_device *ofdev) { struct fsl_re_drv_private *re_priv; - struct device_node *np; struct device_node *child; u32 off; u8 ridx = 0; @@ -823,11 +822,10 @@ static int fsl_re_probe(struct platform_device *ofdev) dev_set_drvdata(dev, re_priv); /* Parse Device tree to find out the total number of JQs present */ - for_each_compatible_node(np, NULL, "fsl,raideng-v1.0-job-queue") { + for_each_compatible_node_scoped(np, NULL, "fsl,raideng-v1.0-job-queue") { rc = of_property_read_u32(np, "reg", &off); if (rc) { dev_err(dev, "Reg property not found in JQ node\n"); - of_node_put(np); return -ENODEV; } /* Find out the Job Rings present under each JQ */ From a91b99fa779a2097f147b6a2a05fa7a6207013c7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 Jan 2026 17:57:55 +0100 Subject: [PATCH 56/60] cpufreq: s5pv210: Simplify with scoped for each OF child loop Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Note that there is another part of code using "np" variable, so scoped loop should not shadow it. Acked-by: Viresh Kumar Reviewed-by: Jonathan Cameron Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-11-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/cpufreq/s5pv210-cpufreq.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c index ba8a1c96427a..e64e84e1ee79 100644 --- a/drivers/cpufreq/s5pv210-cpufreq.c +++ b/drivers/cpufreq/s5pv210-cpufreq.c @@ -629,19 +629,17 @@ static int s5pv210_cpufreq_probe(struct platform_device *pdev) goto err_clock; } - for_each_compatible_node(np, NULL, "samsung,s5pv210-dmc") { - id = of_alias_get_id(np, "dmc"); + for_each_compatible_node_scoped(dmc, NULL, "samsung,s5pv210-dmc") { + id = of_alias_get_id(dmc, "dmc"); if (id < 0 || id >= ARRAY_SIZE(dmc_base)) { - dev_err(dev, "failed to get alias of dmc node '%pOFn'\n", np); - of_node_put(np); + dev_err(dev, "failed to get alias of dmc node '%pOFn'\n", dmc); result = id; goto err_clk_base; } - dmc_base[id] = of_iomap(np, 0); + dmc_base[id] = of_iomap(dmc, 0); if (!dmc_base[id]) { dev_err(dev, "failed to map dmc%d registers\n", id); - of_node_put(np); result = -EFAULT; goto err_dmc; } From 39451ebcf7fe19f21c65b39b03fbfb90c3d1a350 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 27 Jan 2026 07:06:00 +0800 Subject: [PATCH 57/60] dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated The SCU MU driver has already supported the simple and efficient single-TX and single-RX channel layout since 2021. The older multi-channel MU configurations (tx0..tx3 and rx0..rx3) are less efficient in practice and not needed. Mark these legacy mbox-names and mboxes tuple layouts as deprecated in the binding schema. The driver continues to support them for backward compatibility in case firmware publishes the legacy properties. The example section is updated accordingly to demonstrate the recommended layout. Signed-off-by: Peng Fan Reviewed-by: Frank Li Link: https://patch.msgid.link/20260127-scu-v2-1-03f3aaa56e1b@nxp.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/firmware/fsl,scu.yaml | 20 ++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml index f9ba18f06369..307f1c627853 100644 --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml @@ -76,7 +76,8 @@ properties: - description: TX0 MU channel - description: RX0 MU channel - description: optional MU channel for general interrupt - - items: + - deprecated: true + items: - description: TX0 MU channel - description: TX1 MU channel - description: TX2 MU channel @@ -85,7 +86,8 @@ properties: - description: RX1 MU channel - description: RX2 MU channel - description: RX3 MU channel - - items: + - deprecated: true + items: - description: TX0 MU channel - description: TX1 MU channel - description: TX2 MU channel @@ -105,7 +107,8 @@ properties: - const: tx0 - const: rx0 - const: gip3 - - items: + - deprecated: true + items: - const: tx0 - const: tx1 - const: tx2 @@ -114,7 +117,8 @@ properties: - const: rx1 - const: rx2 - const: rx3 - - items: + - deprecated: true + items: - const: tx0 - const: tx1 - const: tx2 @@ -167,11 +171,9 @@ examples: firmware { system-controller { compatible = "fsl,imx-scu"; - mbox-names = "tx0", "tx1", "tx2", "tx3", - "rx0", "rx1", "rx2", "rx3", - "gip3"; - mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3 - &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3 + mbox-names = "tx0", "rx0", "gip3"; + mboxes = <&lsio_mu1 0 0 + &lsio_mu1 1 0 &lsio_mu1 3 3>; clock-controller { From eb83cb510979f6b47da7f14c0ee42cbeb746534c Mon Sep 17 00:00:00 2001 From: Dominik Haller Date: Fri, 30 Jan 2026 12:58:15 -0800 Subject: [PATCH 58/60] dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement Drop the gpio reset from the list of required properties. The bridge works fine with a reset not managed by Linux. In the driver itself the gpio is already flagged as optional. Signed-off-by: Dominik Haller Link: https://patch.msgid.link/20260130205820.83189-6-d.haller@phytec.de Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/lontium,lt8912b.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml index 2cef25215798..63f000ebc9c5 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml @@ -79,7 +79,6 @@ properties: required: - compatible - reg - - reset-gpios - ports additionalProperties: false From 55d43aab478db869f57281e947020605f9ff6b16 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Sat, 31 Jan 2026 20:19:13 -0500 Subject: [PATCH 59/60] dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings Add the fsl,aips and fsl,emi compatible strings for legacy i.MX3 SoCs (over 15 years old). Signed-off-by: Frank Li Link: https://patch.msgid.link/20260201011913.2419626-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/bus/fsl,spba-bus.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml b/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml index d42dbb0bbc2e..00bbde203f59 100644 --- a/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml +++ b/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml @@ -19,21 +19,29 @@ description: | the SDMA can access. There are no special clocks for the bus, because the SDMA controller itself has its interrupt and clock assignments. + EMI (External Memory Interface) for legacy i.MX35. + select: properties: compatible: contains: - const: fsl,spba-bus + enum: + - fsl,aips + - fsl,emi + - fsl,spba-bus required: - compatible properties: $nodename: - pattern: "^spba-bus(@[0-9a-f]+)?$" + pattern: "^((spba|emi)-bus|bus)(@[0-9a-f]+)?$" compatible: items: - - const: fsl,spba-bus + - enum: + - fsl,aips + - fsl,emi + - fsl,spba-bus - const: simple-bus '#address-cells': From a16f91f80735e653b88370b840d5c771f2c175c5 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 10 Feb 2026 17:12:14 -0500 Subject: [PATCH 60/60] dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic Add compatiblie string fsl,imx(1|25|27|31|35)-avic for i.MX3 SoCs (over 15 years old). Signed-off-by: Frank Li Link: https://patch.msgid.link/20260210221215.1575844-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/fsl,tzic.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml index 5f2c8761a31d..e4674a9cc2c1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml @@ -12,6 +12,14 @@ maintainers: properties: compatible: oneOf: + - items: + - enum: + - fsl,imx1-aitc + - fsl,imx25-asic + - fsl,imx27-aitc + - fsl,imx31-avic + - fsl,imx35-avic + - const: fsl,avic - items: - enum: - fsl,imx51-tzic