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drm/amdgpu: Clean the functions pointer set as NULL
We dont need to set the functions to NULL which arent needed as global structure members are by default set to zero or NULL for pointers. Cc: Leo Liu <leo.liu@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
8231e3af96
commit
0016e87054
68 changed files with 0 additions and 228 deletions
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@ -603,8 +603,6 @@ static int acp_set_powergating_state(void *handle,
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static const struct amd_ip_funcs acp_ip_funcs = {
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.name = "acp_ip",
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.early_init = NULL,
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.late_init = NULL,
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.sw_init = acp_sw_init,
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.sw_fini = acp_sw_fini,
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.hw_init = acp_hw_init,
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@ -614,8 +612,6 @@ static const struct amd_ip_funcs acp_ip_funcs = {
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.is_idle = acp_is_idle,
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.set_clockgating_state = acp_set_clockgating_state,
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.set_powergating_state = acp_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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const struct amdgpu_ip_block_version acp_ip_block = {
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@ -143,7 +143,6 @@ static int isp_set_powergating_state(void *handle,
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static const struct amd_ip_funcs isp_ip_funcs = {
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.name = "isp_ip",
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.early_init = isp_early_init,
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.late_init = NULL,
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.hw_init = isp_hw_init,
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.hw_fini = isp_hw_fini,
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.is_idle = isp_is_idle,
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@ -4095,17 +4095,12 @@ const struct attribute_group amdgpu_flash_attr_group = {
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const struct amd_ip_funcs psp_ip_funcs = {
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.name = "psp",
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.early_init = psp_early_init,
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.late_init = NULL,
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.sw_init = psp_sw_init,
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.sw_fini = psp_sw_fini,
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.hw_init = psp_hw_init,
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.hw_fini = psp_hw_fini,
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.suspend = psp_suspend,
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.resume = psp_resume,
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.is_idle = NULL,
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.check_soft_reset = NULL,
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.wait_for_idle = NULL,
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.soft_reset = NULL,
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.set_clockgating_state = psp_set_clockgating_state,
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.set_powergating_state = psp_set_powergating_state,
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};
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@ -993,8 +993,6 @@ static const struct amd_ip_funcs umsch_mm_v4_0_ip_funcs = {
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.hw_fini = umsch_mm_hw_fini,
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.suspend = umsch_mm_suspend,
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.resume = umsch_mm_resume,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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const struct amdgpu_ip_block_version umsch_mm_v4_0_ip_block = {
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@ -646,8 +646,6 @@ static int amdgpu_vkms_set_powergating_state(void *handle,
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static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {
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.name = "amdgpu_vkms",
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.early_init = NULL,
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.late_init = NULL,
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.sw_init = amdgpu_vkms_sw_init,
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.sw_fini = amdgpu_vkms_sw_fini,
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.hw_init = amdgpu_vkms_hw_init,
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@ -657,8 +655,6 @@ static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {
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.is_idle = amdgpu_vkms_is_idle,
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.set_clockgating_state = amdgpu_vkms_set_clockgating_state,
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.set_powergating_state = amdgpu_vkms_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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const struct amdgpu_ip_block_version amdgpu_vkms_ip_block = {
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@ -906,14 +906,12 @@ static void vpe_set_ring_funcs(struct amdgpu_device *adev)
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const struct amd_ip_funcs vpe_ip_funcs = {
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.name = "vpe_v6_1",
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.early_init = vpe_early_init,
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.late_init = NULL,
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.sw_init = vpe_sw_init,
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.sw_fini = vpe_sw_fini,
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.hw_init = vpe_hw_init,
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.hw_fini = vpe_hw_fini,
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.suspend = vpe_suspend,
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.resume = vpe_resume,
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.soft_reset = NULL,
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.set_clockgating_state = vpe_set_clockgating_state,
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.set_powergating_state = vpe_set_powergating_state,
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};
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@ -2176,7 +2176,6 @@ static int cik_common_set_powergating_state(void *handle,
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static const struct amd_ip_funcs cik_common_ip_funcs = {
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.name = "cik_common",
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.early_init = cik_common_early_init,
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.late_init = NULL,
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.hw_init = cik_common_hw_init,
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.hw_fini = cik_common_hw_fini,
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.resume = cik_common_resume,
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@ -2184,8 +2183,6 @@ static const struct amd_ip_funcs cik_common_ip_funcs = {
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.soft_reset = cik_common_soft_reset,
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.set_clockgating_state = cik_common_set_clockgating_state,
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.set_powergating_state = cik_common_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ip_block_version cik_common_ip_block =
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@ -417,7 +417,6 @@ static int cik_ih_set_powergating_state(void *handle,
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static const struct amd_ip_funcs cik_ih_ip_funcs = {
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.name = "cik_ih",
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.early_init = cik_ih_early_init,
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.late_init = NULL,
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.sw_init = cik_ih_sw_init,
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.sw_fini = cik_ih_sw_fini,
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.hw_init = cik_ih_hw_init,
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@ -429,8 +428,6 @@ static const struct amd_ip_funcs cik_ih_ip_funcs = {
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.soft_reset = cik_ih_soft_reset,
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.set_clockgating_state = cik_ih_set_clockgating_state,
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.set_powergating_state = cik_ih_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ih_funcs cik_ih_funcs = {
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@ -1213,7 +1213,6 @@ static int cik_sdma_set_powergating_state(void *handle,
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static const struct amd_ip_funcs cik_sdma_ip_funcs = {
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.name = "cik_sdma",
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.early_init = cik_sdma_early_init,
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.late_init = NULL,
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.sw_init = cik_sdma_sw_init,
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.sw_fini = cik_sdma_sw_fini,
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.hw_init = cik_sdma_hw_init,
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@ -1225,8 +1224,6 @@ static const struct amd_ip_funcs cik_sdma_ip_funcs = {
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.soft_reset = cik_sdma_soft_reset,
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.set_clockgating_state = cik_sdma_set_clockgating_state,
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.set_powergating_state = cik_sdma_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = {
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@ -415,7 +415,6 @@ static int cz_ih_set_powergating_state(void *handle,
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static const struct amd_ip_funcs cz_ih_ip_funcs = {
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.name = "cz_ih",
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.early_init = cz_ih_early_init,
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.late_init = NULL,
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.sw_init = cz_ih_sw_init,
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.sw_fini = cz_ih_sw_fini,
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.hw_init = cz_ih_hw_init,
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@ -427,8 +426,6 @@ static const struct amd_ip_funcs cz_ih_ip_funcs = {
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.soft_reset = cz_ih_soft_reset,
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.set_clockgating_state = cz_ih_set_clockgating_state,
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.set_powergating_state = cz_ih_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ih_funcs cz_ih_funcs = {
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@ -3317,7 +3317,6 @@ static int dce_v10_0_set_powergating_state(void *handle,
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static const struct amd_ip_funcs dce_v10_0_ip_funcs = {
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.name = "dce_v10_0",
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.early_init = dce_v10_0_early_init,
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.late_init = NULL,
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.sw_init = dce_v10_0_sw_init,
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.sw_fini = dce_v10_0_sw_fini,
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.hw_init = dce_v10_0_hw_init,
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@ -3329,8 +3328,6 @@ static const struct amd_ip_funcs dce_v10_0_ip_funcs = {
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.soft_reset = dce_v10_0_soft_reset,
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.set_clockgating_state = dce_v10_0_set_clockgating_state,
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.set_powergating_state = dce_v10_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static void
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@ -3449,7 +3449,6 @@ static int dce_v11_0_set_powergating_state(void *handle,
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static const struct amd_ip_funcs dce_v11_0_ip_funcs = {
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.name = "dce_v11_0",
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.early_init = dce_v11_0_early_init,
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.late_init = NULL,
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.sw_init = dce_v11_0_sw_init,
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.sw_fini = dce_v11_0_sw_fini,
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.hw_init = dce_v11_0_hw_init,
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@ -3460,8 +3459,6 @@ static const struct amd_ip_funcs dce_v11_0_ip_funcs = {
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.soft_reset = dce_v11_0_soft_reset,
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.set_clockgating_state = dce_v11_0_set_clockgating_state,
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.set_powergating_state = dce_v11_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static void
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@ -3139,7 +3139,6 @@ static int dce_v6_0_set_powergating_state(void *handle,
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static const struct amd_ip_funcs dce_v6_0_ip_funcs = {
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.name = "dce_v6_0",
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.early_init = dce_v6_0_early_init,
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.late_init = NULL,
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.sw_init = dce_v6_0_sw_init,
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.sw_fini = dce_v6_0_sw_fini,
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.hw_init = dce_v6_0_hw_init,
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@ -3150,8 +3149,6 @@ static const struct amd_ip_funcs dce_v6_0_ip_funcs = {
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.soft_reset = dce_v6_0_soft_reset,
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.set_clockgating_state = dce_v6_0_set_clockgating_state,
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.set_powergating_state = dce_v6_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static void
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@ -3227,7 +3227,6 @@ static int dce_v8_0_set_powergating_state(void *handle,
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static const struct amd_ip_funcs dce_v8_0_ip_funcs = {
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.name = "dce_v8_0",
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.early_init = dce_v8_0_early_init,
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.late_init = NULL,
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.sw_init = dce_v8_0_sw_init,
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.sw_fini = dce_v8_0_sw_fini,
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.hw_init = dce_v8_0_hw_init,
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@ -3238,8 +3237,6 @@ static const struct amd_ip_funcs dce_v8_0_ip_funcs = {
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.soft_reset = dce_v8_0_soft_reset,
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.set_clockgating_state = dce_v8_0_set_clockgating_state,
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.set_powergating_state = dce_v8_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static void
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@ -3435,7 +3435,6 @@ static void gfx_v6_0_emit_mem_sync(struct amdgpu_ring *ring)
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static const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
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.name = "gfx_v6_0",
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.early_init = gfx_v6_0_early_init,
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.late_init = NULL,
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.sw_init = gfx_v6_0_sw_init,
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.sw_fini = gfx_v6_0_sw_fini,
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.hw_init = gfx_v6_0_hw_init,
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@ -3446,8 +3445,6 @@ static const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
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.wait_for_idle = gfx_v6_0_wait_for_idle,
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.set_clockgating_state = gfx_v6_0_set_clockgating_state,
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.set_powergating_state = gfx_v6_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
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@ -5005,8 +5005,6 @@ static const struct amd_ip_funcs gfx_v7_0_ip_funcs = {
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.soft_reset = gfx_v7_0_soft_reset,
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.set_clockgating_state = gfx_v7_0_set_clockgating_state,
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.set_powergating_state = gfx_v7_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
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@ -6948,8 +6948,6 @@ static const struct amd_ip_funcs gfx_v8_0_ip_funcs = {
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.set_clockgating_state = gfx_v8_0_set_clockgating_state,
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.set_powergating_state = gfx_v8_0_set_powergating_state,
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.get_clockgating_state = gfx_v8_0_get_clockgating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
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@ -1121,8 +1121,6 @@ static const struct amd_ip_funcs gmc_v6_0_ip_funcs = {
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.soft_reset = gmc_v6_0_soft_reset,
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.set_clockgating_state = gmc_v6_0_set_clockgating_state,
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.set_powergating_state = gmc_v6_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_gmc_funcs gmc_v6_0_gmc_funcs = {
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@ -1348,8 +1348,6 @@ static const struct amd_ip_funcs gmc_v7_0_ip_funcs = {
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.soft_reset = gmc_v7_0_soft_reset,
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.set_clockgating_state = gmc_v7_0_set_clockgating_state,
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.set_powergating_state = gmc_v7_0_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_gmc_funcs gmc_v7_0_gmc_funcs = {
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@ -1722,8 +1722,6 @@ static const struct amd_ip_funcs gmc_v8_0_ip_funcs = {
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.set_clockgating_state = gmc_v8_0_set_clockgating_state,
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.set_powergating_state = gmc_v8_0_set_powergating_state,
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.get_clockgating_state = gmc_v8_0_get_clockgating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_gmc_funcs gmc_v8_0_gmc_funcs = {
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@ -407,7 +407,6 @@ static int iceland_ih_set_powergating_state(void *handle,
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static const struct amd_ip_funcs iceland_ih_ip_funcs = {
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.name = "iceland_ih",
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.early_init = iceland_ih_early_init,
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.late_init = NULL,
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.sw_init = iceland_ih_sw_init,
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.sw_fini = iceland_ih_sw_fini,
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.hw_init = iceland_ih_hw_init,
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@ -419,8 +418,6 @@ static const struct amd_ip_funcs iceland_ih_ip_funcs = {
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.soft_reset = iceland_ih_soft_reset,
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.set_clockgating_state = iceland_ih_set_clockgating_state,
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.set_powergating_state = iceland_ih_set_powergating_state,
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.dump_ip_state = NULL,
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.print_ip_state = NULL,
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};
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static const struct amdgpu_ih_funcs iceland_ih_funcs = {
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@ -779,7 +779,6 @@ static void ih_v6_0_get_clockgating_state(void *handle, u64 *flags)
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static const struct amd_ip_funcs ih_v6_0_ip_funcs = {
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.name = "ih_v6_0",
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.early_init = ih_v6_0_early_init,
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.late_init = NULL,
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.sw_init = ih_v6_0_sw_init,
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.sw_fini = ih_v6_0_sw_fini,
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.hw_init = ih_v6_0_hw_init,
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@ -792,8 +791,6 @@ static const struct amd_ip_funcs ih_v6_0_ip_funcs = {
|
|||
.set_clockgating_state = ih_v6_0_set_clockgating_state,
|
||||
.set_powergating_state = ih_v6_0_set_powergating_state,
|
||||
.get_clockgating_state = ih_v6_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs ih_v6_0_funcs = {
|
||||
|
|
|
|||
|
|
@ -762,7 +762,6 @@ static void ih_v6_1_get_clockgating_state(void *handle, u64 *flags)
|
|||
static const struct amd_ip_funcs ih_v6_1_ip_funcs = {
|
||||
.name = "ih_v6_1",
|
||||
.early_init = ih_v6_1_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = ih_v6_1_sw_init,
|
||||
.sw_fini = ih_v6_1_sw_fini,
|
||||
.hw_init = ih_v6_1_hw_init,
|
||||
|
|
@ -775,8 +774,6 @@ static const struct amd_ip_funcs ih_v6_1_ip_funcs = {
|
|||
.set_clockgating_state = ih_v6_1_set_clockgating_state,
|
||||
.set_powergating_state = ih_v6_1_set_powergating_state,
|
||||
.get_clockgating_state = ih_v6_1_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs ih_v6_1_funcs = {
|
||||
|
|
|
|||
|
|
@ -752,7 +752,6 @@ static void ih_v7_0_get_clockgating_state(void *handle, u64 *flags)
|
|||
static const struct amd_ip_funcs ih_v7_0_ip_funcs = {
|
||||
.name = "ih_v7_0",
|
||||
.early_init = ih_v7_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = ih_v7_0_sw_init,
|
||||
.sw_fini = ih_v7_0_sw_fini,
|
||||
.hw_init = ih_v7_0_hw_init,
|
||||
|
|
@ -765,8 +764,6 @@ static const struct amd_ip_funcs ih_v7_0_ip_funcs = {
|
|||
.set_clockgating_state = ih_v7_0_set_clockgating_state,
|
||||
.set_powergating_state = ih_v7_0_set_powergating_state,
|
||||
.get_clockgating_state = ih_v7_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs ih_v7_0_funcs = {
|
||||
|
|
|
|||
|
|
@ -742,7 +742,6 @@ static int jpeg_v2_0_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v2_0_ip_funcs = {
|
||||
.name = "jpeg_v2_0",
|
||||
.early_init = jpeg_v2_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v2_0_sw_init,
|
||||
.sw_fini = jpeg_v2_0_sw_fini,
|
||||
.hw_init = jpeg_v2_0_hw_init,
|
||||
|
|
@ -751,14 +750,8 @@ static const struct amd_ip_funcs jpeg_v2_0_ip_funcs = {
|
|||
.resume = jpeg_v2_0_resume,
|
||||
.is_idle = jpeg_v2_0_is_idle,
|
||||
.wait_for_idle = jpeg_v2_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v2_0_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v2_0_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -613,7 +613,6 @@ static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v2_5_ip_funcs = {
|
||||
.name = "jpeg_v2_5",
|
||||
.early_init = jpeg_v2_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v2_5_sw_init,
|
||||
.sw_fini = jpeg_v2_5_sw_fini,
|
||||
.hw_init = jpeg_v2_5_hw_init,
|
||||
|
|
@ -622,20 +621,13 @@ static const struct amd_ip_funcs jpeg_v2_5_ip_funcs = {
|
|||
.resume = jpeg_v2_5_resume,
|
||||
.is_idle = jpeg_v2_5_is_idle,
|
||||
.wait_for_idle = jpeg_v2_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v2_5_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v2_5_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amd_ip_funcs jpeg_v2_6_ip_funcs = {
|
||||
.name = "jpeg_v2_6",
|
||||
.early_init = jpeg_v2_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v2_5_sw_init,
|
||||
.sw_fini = jpeg_v2_5_sw_fini,
|
||||
.hw_init = jpeg_v2_5_hw_init,
|
||||
|
|
@ -644,14 +636,8 @@ static const struct amd_ip_funcs jpeg_v2_6_ip_funcs = {
|
|||
.resume = jpeg_v2_5_resume,
|
||||
.is_idle = jpeg_v2_5_is_idle,
|
||||
.wait_for_idle = jpeg_v2_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v2_5_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v2_5_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v2_5_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -533,7 +533,6 @@ static int jpeg_v3_0_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v3_0_ip_funcs = {
|
||||
.name = "jpeg_v3_0",
|
||||
.early_init = jpeg_v3_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v3_0_sw_init,
|
||||
.sw_fini = jpeg_v3_0_sw_fini,
|
||||
.hw_init = jpeg_v3_0_hw_init,
|
||||
|
|
@ -542,14 +541,8 @@ static const struct amd_ip_funcs jpeg_v3_0_ip_funcs = {
|
|||
.resume = jpeg_v3_0_resume,
|
||||
.is_idle = jpeg_v3_0_is_idle,
|
||||
.wait_for_idle = jpeg_v3_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v3_0_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v3_0_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -700,7 +700,6 @@ static int jpeg_v4_0_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {
|
||||
.name = "jpeg_v4_0",
|
||||
.early_init = jpeg_v4_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v4_0_sw_init,
|
||||
.sw_fini = jpeg_v4_0_sw_fini,
|
||||
.hw_init = jpeg_v4_0_hw_init,
|
||||
|
|
@ -709,14 +708,8 @@ static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {
|
|||
.resume = jpeg_v4_0_resume,
|
||||
.is_idle = jpeg_v4_0_is_idle,
|
||||
.wait_for_idle = jpeg_v4_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v4_0_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v4_0_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -1050,7 +1050,6 @@ static int jpeg_v4_0_3_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v4_0_3_ip_funcs = {
|
||||
.name = "jpeg_v4_0_3",
|
||||
.early_init = jpeg_v4_0_3_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v4_0_3_sw_init,
|
||||
.sw_fini = jpeg_v4_0_3_sw_fini,
|
||||
.hw_init = jpeg_v4_0_3_hw_init,
|
||||
|
|
@ -1059,14 +1058,8 @@ static const struct amd_ip_funcs jpeg_v4_0_3_ip_funcs = {
|
|||
.resume = jpeg_v4_0_3_resume,
|
||||
.is_idle = jpeg_v4_0_3_is_idle,
|
||||
.wait_for_idle = jpeg_v4_0_3_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v4_0_3_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v4_0_3_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v4_0_3_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -741,7 +741,6 @@ static int jpeg_v4_0_5_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v4_0_5_ip_funcs = {
|
||||
.name = "jpeg_v4_0_5",
|
||||
.early_init = jpeg_v4_0_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v4_0_5_sw_init,
|
||||
.sw_fini = jpeg_v4_0_5_sw_fini,
|
||||
.hw_init = jpeg_v4_0_5_hw_init,
|
||||
|
|
@ -750,14 +749,8 @@ static const struct amd_ip_funcs jpeg_v4_0_5_ip_funcs = {
|
|||
.resume = jpeg_v4_0_5_resume,
|
||||
.is_idle = jpeg_v4_0_5_is_idle,
|
||||
.wait_for_idle = jpeg_v4_0_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v4_0_5_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v4_0_5_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v4_0_5_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -620,7 +620,6 @@ static int jpeg_v5_0_0_process_interrupt(struct amdgpu_device *adev,
|
|||
static const struct amd_ip_funcs jpeg_v5_0_0_ip_funcs = {
|
||||
.name = "jpeg_v5_0_0",
|
||||
.early_init = jpeg_v5_0_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = jpeg_v5_0_0_sw_init,
|
||||
.sw_fini = jpeg_v5_0_0_sw_fini,
|
||||
.hw_init = jpeg_v5_0_0_hw_init,
|
||||
|
|
@ -629,14 +628,8 @@ static const struct amd_ip_funcs jpeg_v5_0_0_ip_funcs = {
|
|||
.resume = jpeg_v5_0_0_resume,
|
||||
.is_idle = jpeg_v5_0_0_is_idle,
|
||||
.wait_for_idle = jpeg_v5_0_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = jpeg_v5_0_0_set_clockgating_state,
|
||||
.set_powergating_state = jpeg_v5_0_0_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs jpeg_v5_0_0_dec_ring_vm_funcs = {
|
||||
|
|
|
|||
|
|
@ -1696,8 +1696,6 @@ static const struct amd_ip_funcs mes_v11_0_ip_funcs = {
|
|||
.hw_fini = mes_v11_0_hw_fini,
|
||||
.suspend = mes_v11_0_suspend,
|
||||
.resume = mes_v11_0_resume,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version mes_v11_0_ip_block = {
|
||||
|
|
|
|||
|
|
@ -694,7 +694,6 @@ static void navi10_ih_get_clockgating_state(void *handle, u64 *flags)
|
|||
static const struct amd_ip_funcs navi10_ih_ip_funcs = {
|
||||
.name = "navi10_ih",
|
||||
.early_init = navi10_ih_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = navi10_ih_sw_init,
|
||||
.sw_fini = navi10_ih_sw_fini,
|
||||
.hw_init = navi10_ih_hw_init,
|
||||
|
|
@ -707,8 +706,6 @@ static const struct amd_ip_funcs navi10_ih_ip_funcs = {
|
|||
.set_clockgating_state = navi10_ih_set_clockgating_state,
|
||||
.set_powergating_state = navi10_ih_set_powergating_state,
|
||||
.get_clockgating_state = navi10_ih_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs navi10_ih_funcs = {
|
||||
|
|
|
|||
|
|
@ -1104,6 +1104,4 @@ static const struct amd_ip_funcs nv_common_ip_funcs = {
|
|||
.set_clockgating_state = nv_common_set_clockgating_state,
|
||||
.set_powergating_state = nv_common_set_powergating_state,
|
||||
.get_clockgating_state = nv_common_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1096,7 +1096,6 @@ static int sdma_v2_4_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs sdma_v2_4_ip_funcs = {
|
||||
.name = "sdma_v2_4",
|
||||
.early_init = sdma_v2_4_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = sdma_v2_4_sw_init,
|
||||
.sw_fini = sdma_v2_4_sw_fini,
|
||||
.hw_init = sdma_v2_4_hw_init,
|
||||
|
|
@ -1108,8 +1107,6 @@ static const struct amd_ip_funcs sdma_v2_4_ip_funcs = {
|
|||
.soft_reset = sdma_v2_4_soft_reset,
|
||||
.set_clockgating_state = sdma_v2_4_set_clockgating_state,
|
||||
.set_powergating_state = sdma_v2_4_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -1534,7 +1534,6 @@ static void sdma_v3_0_get_clockgating_state(void *handle, u64 *flags)
|
|||
static const struct amd_ip_funcs sdma_v3_0_ip_funcs = {
|
||||
.name = "sdma_v3_0",
|
||||
.early_init = sdma_v3_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = sdma_v3_0_sw_init,
|
||||
.sw_fini = sdma_v3_0_sw_fini,
|
||||
.hw_init = sdma_v3_0_hw_init,
|
||||
|
|
@ -1550,8 +1549,6 @@ static const struct amd_ip_funcs sdma_v3_0_ip_funcs = {
|
|||
.set_clockgating_state = sdma_v3_0_set_clockgating_state,
|
||||
.set_powergating_state = sdma_v3_0_set_powergating_state,
|
||||
.get_clockgating_state = sdma_v3_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -1929,7 +1929,6 @@ static void sdma_v5_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs sdma_v5_0_ip_funcs = {
|
||||
.name = "sdma_v5_0",
|
||||
.early_init = sdma_v5_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = sdma_v5_0_sw_init,
|
||||
.sw_fini = sdma_v5_0_sw_fini,
|
||||
.hw_init = sdma_v5_0_hw_init,
|
||||
|
|
|
|||
|
|
@ -1918,7 +1918,6 @@ static void sdma_v5_2_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs sdma_v5_2_ip_funcs = {
|
||||
.name = "sdma_v5_2",
|
||||
.early_init = sdma_v5_2_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = sdma_v5_2_sw_init,
|
||||
.sw_fini = sdma_v5_2_sw_fini,
|
||||
.hw_init = sdma_v5_2_hw_init,
|
||||
|
|
|
|||
|
|
@ -1644,7 +1644,6 @@ static void sdma_v6_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
const struct amd_ip_funcs sdma_v6_0_ip_funcs = {
|
||||
.name = "sdma_v6_0",
|
||||
.early_init = sdma_v6_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = sdma_v6_0_sw_init,
|
||||
.sw_fini = sdma_v6_0_sw_fini,
|
||||
.hw_init = sdma_v6_0_hw_init,
|
||||
|
|
|
|||
|
|
@ -2664,15 +2664,12 @@ static int si_common_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs si_common_ip_funcs = {
|
||||
.name = "si_common",
|
||||
.early_init = si_common_early_init,
|
||||
.late_init = NULL,
|
||||
.hw_init = si_common_hw_init,
|
||||
.hw_fini = si_common_hw_fini,
|
||||
.resume = si_common_resume,
|
||||
.is_idle = si_common_is_idle,
|
||||
.set_clockgating_state = si_common_set_clockgating_state,
|
||||
.set_powergating_state = si_common_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ip_block_version si_common_ip_block =
|
||||
|
|
|
|||
|
|
@ -691,7 +691,6 @@ static int si_dma_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs si_dma_ip_funcs = {
|
||||
.name = "si_dma",
|
||||
.early_init = si_dma_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = si_dma_sw_init,
|
||||
.sw_fini = si_dma_sw_fini,
|
||||
.hw_init = si_dma_hw_init,
|
||||
|
|
@ -703,8 +702,6 @@ static const struct amd_ip_funcs si_dma_ip_funcs = {
|
|||
.soft_reset = si_dma_soft_reset,
|
||||
.set_clockgating_state = si_dma_set_clockgating_state,
|
||||
.set_powergating_state = si_dma_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs si_dma_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -278,7 +278,6 @@ static int si_ih_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs si_ih_ip_funcs = {
|
||||
.name = "si_ih",
|
||||
.early_init = si_ih_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = si_ih_sw_init,
|
||||
.sw_fini = si_ih_sw_fini,
|
||||
.hw_init = si_ih_hw_init,
|
||||
|
|
@ -290,8 +289,6 @@ static const struct amd_ip_funcs si_ih_ip_funcs = {
|
|||
.soft_reset = si_ih_soft_reset,
|
||||
.set_clockgating_state = si_ih_set_clockgating_state,
|
||||
.set_powergating_state = si_ih_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs si_ih_funcs = {
|
||||
|
|
|
|||
|
|
@ -1494,6 +1494,4 @@ static const struct amd_ip_funcs soc15_common_ip_funcs = {
|
|||
.set_clockgating_state = soc15_common_set_clockgating_state,
|
||||
.set_powergating_state = soc15_common_set_powergating_state,
|
||||
.get_clockgating_state= soc15_common_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -993,6 +993,4 @@ static const struct amd_ip_funcs soc21_common_ip_funcs = {
|
|||
.set_clockgating_state = soc21_common_set_clockgating_state,
|
||||
.set_powergating_state = soc21_common_set_powergating_state,
|
||||
.get_clockgating_state = soc21_common_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -463,7 +463,6 @@ static int tonga_ih_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs tonga_ih_ip_funcs = {
|
||||
.name = "tonga_ih",
|
||||
.early_init = tonga_ih_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = tonga_ih_sw_init,
|
||||
.sw_fini = tonga_ih_sw_fini,
|
||||
.hw_init = tonga_ih_hw_init,
|
||||
|
|
@ -478,8 +477,6 @@ static const struct amd_ip_funcs tonga_ih_ip_funcs = {
|
|||
.post_soft_reset = tonga_ih_post_soft_reset,
|
||||
.set_clockgating_state = tonga_ih_set_clockgating_state,
|
||||
.set_powergating_state = tonga_ih_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ih_funcs tonga_ih_funcs = {
|
||||
|
|
|
|||
|
|
@ -805,7 +805,6 @@ static int uvd_v3_1_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs uvd_v3_1_ip_funcs = {
|
||||
.name = "uvd_v3_1",
|
||||
.early_init = uvd_v3_1_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = uvd_v3_1_sw_init,
|
||||
.sw_fini = uvd_v3_1_sw_fini,
|
||||
.hw_init = uvd_v3_1_hw_init,
|
||||
|
|
@ -818,8 +817,6 @@ static const struct amd_ip_funcs uvd_v3_1_ip_funcs = {
|
|||
.soft_reset = uvd_v3_1_soft_reset,
|
||||
.set_clockgating_state = uvd_v3_1_set_clockgating_state,
|
||||
.set_powergating_state = uvd_v3_1_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version uvd_v3_1_ip_block = {
|
||||
|
|
|
|||
|
|
@ -755,7 +755,6 @@ static int uvd_v4_2_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs uvd_v4_2_ip_funcs = {
|
||||
.name = "uvd_v4_2",
|
||||
.early_init = uvd_v4_2_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = uvd_v4_2_sw_init,
|
||||
.sw_fini = uvd_v4_2_sw_fini,
|
||||
.hw_init = uvd_v4_2_hw_init,
|
||||
|
|
@ -768,8 +767,6 @@ static const struct amd_ip_funcs uvd_v4_2_ip_funcs = {
|
|||
.soft_reset = uvd_v4_2_soft_reset,
|
||||
.set_clockgating_state = uvd_v4_2_set_clockgating_state,
|
||||
.set_powergating_state = uvd_v4_2_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -867,7 +867,6 @@ out:
|
|||
static const struct amd_ip_funcs uvd_v5_0_ip_funcs = {
|
||||
.name = "uvd_v5_0",
|
||||
.early_init = uvd_v5_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = uvd_v5_0_sw_init,
|
||||
.sw_fini = uvd_v5_0_sw_fini,
|
||||
.hw_init = uvd_v5_0_hw_init,
|
||||
|
|
@ -881,8 +880,6 @@ static const struct amd_ip_funcs uvd_v5_0_ip_funcs = {
|
|||
.set_clockgating_state = uvd_v5_0_set_clockgating_state,
|
||||
.set_powergating_state = uvd_v5_0_set_powergating_state,
|
||||
.get_clockgating_state = uvd_v5_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -1532,7 +1532,6 @@ out:
|
|||
static const struct amd_ip_funcs uvd_v6_0_ip_funcs = {
|
||||
.name = "uvd_v6_0",
|
||||
.early_init = uvd_v6_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = uvd_v6_0_sw_init,
|
||||
.sw_fini = uvd_v6_0_sw_fini,
|
||||
.hw_init = uvd_v6_0_hw_init,
|
||||
|
|
@ -1549,8 +1548,6 @@ static const struct amd_ip_funcs uvd_v6_0_ip_funcs = {
|
|||
.set_clockgating_state = uvd_v6_0_set_clockgating_state,
|
||||
.set_powergating_state = uvd_v6_0_set_powergating_state,
|
||||
.get_clockgating_state = uvd_v6_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
|
||||
|
|
|
|||
|
|
@ -1789,7 +1789,6 @@ static int uvd_v7_0_set_clockgating_state(void *handle,
|
|||
const struct amd_ip_funcs uvd_v7_0_ip_funcs = {
|
||||
.name = "uvd_v7_0",
|
||||
.early_init = uvd_v7_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = uvd_v7_0_sw_init,
|
||||
.sw_fini = uvd_v7_0_sw_fini,
|
||||
.hw_init = uvd_v7_0_hw_init,
|
||||
|
|
|
|||
|
|
@ -617,7 +617,6 @@ static int vce_v2_0_set_powergating_state(void *handle,
|
|||
static const struct amd_ip_funcs vce_v2_0_ip_funcs = {
|
||||
.name = "vce_v2_0",
|
||||
.early_init = vce_v2_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vce_v2_0_sw_init,
|
||||
.sw_fini = vce_v2_0_sw_fini,
|
||||
.hw_init = vce_v2_0_hw_init,
|
||||
|
|
@ -629,8 +628,6 @@ static const struct amd_ip_funcs vce_v2_0_ip_funcs = {
|
|||
.soft_reset = vce_v2_0_soft_reset,
|
||||
.set_clockgating_state = vce_v2_0_set_clockgating_state,
|
||||
.set_powergating_state = vce_v2_0_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {
|
||||
|
|
|
|||
|
|
@ -896,7 +896,6 @@ static void vce_v3_0_emit_pipeline_sync(struct amdgpu_ring *ring)
|
|||
static const struct amd_ip_funcs vce_v3_0_ip_funcs = {
|
||||
.name = "vce_v3_0",
|
||||
.early_init = vce_v3_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vce_v3_0_sw_init,
|
||||
.sw_fini = vce_v3_0_sw_fini,
|
||||
.hw_init = vce_v3_0_hw_init,
|
||||
|
|
@ -912,8 +911,6 @@ static const struct amd_ip_funcs vce_v3_0_ip_funcs = {
|
|||
.set_clockgating_state = vce_v3_0_set_clockgating_state,
|
||||
.set_powergating_state = vce_v3_0_set_powergating_state,
|
||||
.get_clockgating_state = vce_v3_0_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {
|
||||
|
|
|
|||
|
|
@ -1076,7 +1076,6 @@ static int vce_v4_0_process_interrupt(struct amdgpu_device *adev,
|
|||
const struct amd_ip_funcs vce_v4_0_ip_funcs = {
|
||||
.name = "vce_v4_0",
|
||||
.early_init = vce_v4_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vce_v4_0_sw_init,
|
||||
.sw_fini = vce_v4_0_sw_fini,
|
||||
.hw_init = vce_v4_0_hw_init,
|
||||
|
|
|
|||
|
|
@ -1987,7 +1987,6 @@ static void vcn_v1_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v1_0_ip_funcs = {
|
||||
.name = "vcn_v1_0",
|
||||
.early_init = vcn_v1_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v1_0_sw_init,
|
||||
.sw_fini = vcn_v1_0_sw_fini,
|
||||
.hw_init = vcn_v1_0_hw_init,
|
||||
|
|
|
|||
|
|
@ -2095,7 +2095,6 @@ static void vcn_v2_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v2_0_ip_funcs = {
|
||||
.name = "vcn_v2_0",
|
||||
.early_init = vcn_v2_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v2_0_sw_init,
|
||||
.sw_fini = vcn_v2_0_sw_fini,
|
||||
.hw_init = vcn_v2_0_hw_init,
|
||||
|
|
@ -2104,10 +2103,6 @@ static const struct amd_ip_funcs vcn_v2_0_ip_funcs = {
|
|||
.resume = vcn_v2_0_resume,
|
||||
.is_idle = vcn_v2_0_is_idle,
|
||||
.wait_for_idle = vcn_v2_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v2_0_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v2_0_set_powergating_state,
|
||||
.dump_ip_state = vcn_v2_0_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -1987,7 +1987,6 @@ static void vcn_v2_5_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v2_5_ip_funcs = {
|
||||
.name = "vcn_v2_5",
|
||||
.early_init = vcn_v2_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v2_5_sw_init,
|
||||
.sw_fini = vcn_v2_5_sw_fini,
|
||||
.hw_init = vcn_v2_5_hw_init,
|
||||
|
|
@ -1996,10 +1995,6 @@ static const struct amd_ip_funcs vcn_v2_5_ip_funcs = {
|
|||
.resume = vcn_v2_5_resume,
|
||||
.is_idle = vcn_v2_5_is_idle,
|
||||
.wait_for_idle = vcn_v2_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v2_5_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v2_5_set_powergating_state,
|
||||
.dump_ip_state = vcn_v2_5_dump_ip_state,
|
||||
|
|
@ -2009,7 +2004,6 @@ static const struct amd_ip_funcs vcn_v2_5_ip_funcs = {
|
|||
static const struct amd_ip_funcs vcn_v2_6_ip_funcs = {
|
||||
.name = "vcn_v2_6",
|
||||
.early_init = vcn_v2_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v2_5_sw_init,
|
||||
.sw_fini = vcn_v2_5_sw_fini,
|
||||
.hw_init = vcn_v2_5_hw_init,
|
||||
|
|
@ -2018,10 +2012,6 @@ static const struct amd_ip_funcs vcn_v2_6_ip_funcs = {
|
|||
.resume = vcn_v2_5_resume,
|
||||
.is_idle = vcn_v2_5_is_idle,
|
||||
.wait_for_idle = vcn_v2_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v2_5_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v2_5_set_powergating_state,
|
||||
.dump_ip_state = vcn_v2_5_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -2313,7 +2313,6 @@ static void vcn_v3_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v3_0_ip_funcs = {
|
||||
.name = "vcn_v3_0",
|
||||
.early_init = vcn_v3_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v3_0_sw_init,
|
||||
.sw_fini = vcn_v3_0_sw_fini,
|
||||
.hw_init = vcn_v3_0_hw_init,
|
||||
|
|
@ -2322,10 +2321,6 @@ static const struct amd_ip_funcs vcn_v3_0_ip_funcs = {
|
|||
.resume = vcn_v3_0_resume,
|
||||
.is_idle = vcn_v3_0_is_idle,
|
||||
.wait_for_idle = vcn_v3_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v3_0_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v3_0_set_powergating_state,
|
||||
.dump_ip_state = vcn_v3_0_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -2220,7 +2220,6 @@ static void vcn_v4_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {
|
||||
.name = "vcn_v4_0",
|
||||
.early_init = vcn_v4_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v4_0_sw_init,
|
||||
.sw_fini = vcn_v4_0_sw_fini,
|
||||
.hw_init = vcn_v4_0_hw_init,
|
||||
|
|
@ -2229,10 +2228,6 @@ static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {
|
|||
.resume = vcn_v4_0_resume,
|
||||
.is_idle = vcn_v4_0_is_idle,
|
||||
.wait_for_idle = vcn_v4_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v4_0_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v4_0_set_powergating_state,
|
||||
.dump_ip_state = vcn_v4_0_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -1796,7 +1796,6 @@ static void vcn_v4_0_3_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {
|
||||
.name = "vcn_v4_0_3",
|
||||
.early_init = vcn_v4_0_3_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v4_0_3_sw_init,
|
||||
.sw_fini = vcn_v4_0_3_sw_fini,
|
||||
.hw_init = vcn_v4_0_3_hw_init,
|
||||
|
|
@ -1805,10 +1804,6 @@ static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {
|
|||
.resume = vcn_v4_0_3_resume,
|
||||
.is_idle = vcn_v4_0_3_is_idle,
|
||||
.wait_for_idle = vcn_v4_0_3_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v4_0_3_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v4_0_3_set_powergating_state,
|
||||
.dump_ip_state = vcn_v4_0_3_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -1678,7 +1678,6 @@ static void vcn_v4_0_5_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v4_0_5_ip_funcs = {
|
||||
.name = "vcn_v4_0_5",
|
||||
.early_init = vcn_v4_0_5_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v4_0_5_sw_init,
|
||||
.sw_fini = vcn_v4_0_5_sw_fini,
|
||||
.hw_init = vcn_v4_0_5_hw_init,
|
||||
|
|
@ -1687,10 +1686,6 @@ static const struct amd_ip_funcs vcn_v4_0_5_ip_funcs = {
|
|||
.resume = vcn_v4_0_5_resume,
|
||||
.is_idle = vcn_v4_0_5_is_idle,
|
||||
.wait_for_idle = vcn_v4_0_5_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v4_0_5_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v4_0_5_set_powergating_state,
|
||||
.dump_ip_state = vcn_v4_0_5_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -1404,7 +1404,6 @@ static void vcn_v5_0_dump_ip_state(struct amdgpu_ip_block *ip_block)
|
|||
static const struct amd_ip_funcs vcn_v5_0_0_ip_funcs = {
|
||||
.name = "vcn_v5_0_0",
|
||||
.early_init = vcn_v5_0_0_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vcn_v5_0_0_sw_init,
|
||||
.sw_fini = vcn_v5_0_0_sw_fini,
|
||||
.hw_init = vcn_v5_0_0_hw_init,
|
||||
|
|
@ -1413,10 +1412,6 @@ static const struct amd_ip_funcs vcn_v5_0_0_ip_funcs = {
|
|||
.resume = vcn_v5_0_0_resume,
|
||||
.is_idle = vcn_v5_0_0_is_idle,
|
||||
.wait_for_idle = vcn_v5_0_0_wait_for_idle,
|
||||
.check_soft_reset = NULL,
|
||||
.pre_soft_reset = NULL,
|
||||
.soft_reset = NULL,
|
||||
.post_soft_reset = NULL,
|
||||
.set_clockgating_state = vcn_v5_0_0_set_clockgating_state,
|
||||
.set_powergating_state = vcn_v5_0_0_set_powergating_state,
|
||||
.dump_ip_state = vcn_v5_0_dump_ip_state,
|
||||
|
|
|
|||
|
|
@ -625,7 +625,6 @@ static int vega10_ih_set_powergating_state(void *handle,
|
|||
const struct amd_ip_funcs vega10_ih_ip_funcs = {
|
||||
.name = "vega10_ih",
|
||||
.early_init = vega10_ih_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vega10_ih_sw_init,
|
||||
.sw_fini = vega10_ih_sw_fini,
|
||||
.hw_init = vega10_ih_hw_init,
|
||||
|
|
|
|||
|
|
@ -690,7 +690,6 @@ static int vega20_ih_set_powergating_state(void *handle,
|
|||
const struct amd_ip_funcs vega20_ih_ip_funcs = {
|
||||
.name = "vega20_ih",
|
||||
.early_init = vega20_ih_early_init,
|
||||
.late_init = NULL,
|
||||
.sw_init = vega20_ih_sw_init,
|
||||
.sw_fini = vega20_ih_sw_fini,
|
||||
.hw_init = vega20_ih_hw_init,
|
||||
|
|
|
|||
|
|
@ -2036,8 +2036,6 @@ static const struct amd_ip_funcs vi_common_ip_funcs = {
|
|||
.set_clockgating_state = vi_common_set_clockgating_state,
|
||||
.set_powergating_state = vi_common_set_powergating_state,
|
||||
.get_clockgating_state = vi_common_get_clockgating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
static const struct amdgpu_ip_block_version vi_common_ip_block =
|
||||
|
|
|
|||
|
|
@ -3407,8 +3407,6 @@ static const struct amd_ip_funcs amdgpu_dm_funcs = {
|
|||
.soft_reset = dm_soft_reset,
|
||||
.set_clockgating_state = dm_set_clockgating_state,
|
||||
.set_powergating_state = dm_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version dm_ip_block = {
|
||||
|
|
|
|||
|
|
@ -3304,8 +3304,6 @@ static const struct amd_ip_funcs kv_dpm_ip_funcs = {
|
|||
.is_idle = kv_dpm_is_idle,
|
||||
.set_clockgating_state = kv_dpm_set_clockgating_state,
|
||||
.set_powergating_state = kv_dpm_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version kv_smu_ip_block = {
|
||||
|
|
|
|||
|
|
@ -8046,8 +8046,6 @@ static const struct amd_ip_funcs si_dpm_ip_funcs = {
|
|||
.wait_for_idle = si_dpm_wait_for_idle,
|
||||
.set_clockgating_state = si_dpm_set_clockgating_state,
|
||||
.set_powergating_state = si_dpm_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version si_smu_ip_block =
|
||||
|
|
|
|||
|
|
@ -287,8 +287,6 @@ static const struct amd_ip_funcs pp_ip_funcs = {
|
|||
.is_idle = pp_is_idle,
|
||||
.set_clockgating_state = pp_set_clockgating_state,
|
||||
.set_powergating_state = pp_set_powergating_state,
|
||||
.dump_ip_state = NULL,
|
||||
.print_ip_state = NULL,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version pp_smu_ip_block =
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue